- 1b3ef1f [AMDGPU] Make SIShrinkInstructions pass return valid changed state (#168833) by Vikram Hegde · 2 hours ago main master
- 2b2f461 MIPSr6: Set SETCC CondCode not supported by hardware to Expand (#173541) by YunQiang Su · 3 hours ago
- 9ae5868 [PowerPC] Check isPhysical() before converting Register to MCRegister. NFC (#173531) by Craig Topper · 3 hours ago
- a79f1c9 [cmake] Simplify LLVM_ON_WIN32 logic (#173525) by Reid Kleckner · 6 hours ago
- e894aa6 [VPlan] Support truncated IVs in getSCEVExprForVPValue. (NFCI) by Florian Hahn · 6 hours ago
- 431b73a [SLP]Enable float point math ops as copyables elements. by Alexey Bataev · 4 days ago
- eeafb3e [PassManager] Use ListSeparator. NFC (#173462) by Zakk Chen · 9 hours ago
- 7a1b75a [SLP]Check if the value has uselist before asking for uses by Alexey Bataev · 10 hours ago
- cc8ccd1 [NFC][AMDGPU] Improve the alignment of some TableGen code (#173524) by Shilei Tian · 11 hours ago
- fe52536 [AVR] Set mayLoad/mayStore flags of some load/store instructions (#172986) by Ben Shi · 14 hours ago
- f741370 [VPlan] Split off VPReductionRecipe creation for in-loop reductions (NFC) (#168784) by Florian Hahn · 14 hours ago
- ac0155b [SCCP] Use mergeInValue instead of markConstant when folding CastInst (#173190) by Miloš Poletanović · 16 hours ago
- 882274f [LV][IRBuilder] Allow implicit truncation of step vector (#173229) by Nikita Popov · 17 hours ago
- 8f2b117 [LLVM][LangRef] Redefine out-of-range stepvector values as being truncated. (#173494) by Paul Walker · 18 hours ago
- c76e8fe [RISCV] Use TargetConstant for intrinsic IDs (#173517) by Sudharsan Veeravalli · 25 hours ago
- aa8b076 [BPF] Use Register instead of MCRegister for virtual reg. NFC by Craig Topper · 26 hours ago
- 5c4d009 [IR] Change PHINode::removeIncomingValueIf() to loop incoming values backwards (#173444) by Mingjie Xu · 27 hours ago
- 62d404e ValueTracking: Avoid calling computeKnownFPClass on matched constant (#173248) by Matt Arsenault · 29 hours ago
- 8993568 [VPlan] Support binary add/sub in getSCEVExprForVPValue. (NFCI) by Florian Hahn · 29 hours ago
- 5d77c4c ValueTracking: Improve computeKnownFPClass fmul handling (#173247) by Matt Arsenault · 30 hours ago
- 62bafcf [SLP]Recalculate dependencies for all cleared entries by Alexey Bataev · 35 hours ago
- 7a68d79 ValueTracking: Add baseline tests for fmul computeKnownFPClass (#173246) by Matt Arsenault · 31 hours ago
- 1104eeb [NewPM][X86] Port X86ExpandPseudo to NPM (#173463) by Aiden Grossman · 33 hours ago
- 93b5f33 [SLP]Do not vectorize buildvector tree will scalars in first node, which should remain scalars by Alexey Bataev · 2 days ago
- c268c64 [AArch64] Support lowering v4i16/f16 VECTOR_COMPRESS nodes to SVE (#173256) by Benjamin Maxwell · 2 days ago
- 92079b3 [InstCombine][X86] Try to convert BLENDV(X,Y,SHL()) -> SELECT(ICMP_SGT(0,SHL()),Y,X) (#173389) by Simon Pilgrim · 2 days ago
- 2a46900 [LLVM][CodeGen][SVE] Fix CCValAssign::Indirect assert to allow all scalable types. (#173372) by Paul Walker · 2 days ago
- abe8aa4 [ORC] Fix ReOptimizeLayer buggy jit-dispatch signature in fa7f7a4cab4. (#173457) by Lang Hames · 2 days ago
- bebbdb8 [llvm][RISCV] Support Zvfofp8min llvm intrinsics and codegen (#172585) by Brandon Wu · 2 days ago
- 9e05583 [RISCV] Pre-commit RVV instructions to the Ands45 scheduling model and tests (#171954) by Jim Lin · 2 days ago
- 7927442 [RISCV] Mark the Xqci Qualcomm uC Vendor Extension as non-experimental (#173331) by Sudharsan Veeravalli · 2 days ago
- 1d9db26 [AMDGPU][GlobalISel] Add RegBankLegalize support for G_AMDGPU_FMED3 (#173085) by vangthao95 · 2 days ago
- 3daadaf [ConstantFolding] Add edge cases for llvm.log{,2,10} (#173304) by Stefan Weigl-Bosker · 2 days ago
- 94ef28f [SLP][NFC]Add a floating point test with potentially copyable operands, NFC by Alexey Bataev · 2 days ago
- 984d92e [VPlan] Only use isAddressSCEVForCost in getAddressAccessSCEV (NFC) by Florian Hahn · 2 days ago
- 696d412 [ORC] Pass JITDispatchHandler argument buffers as WrapperFunctionBuffer. (#173334) by Lang Hames · 2 days ago
- c03ef76 [RISCV] Support srx/slx for P extension. (#173225) by Craig Topper · 2 days ago
- 1891d44 [ProfCheck] Exclude merge functions test by Aiden Grossman · 2 days ago
- 0e2142b [DAGCombiner] Relax nsz constraint with fp->int->fp optimizations (#164503) by Guy David · 2 days ago
- 2b4be2d [AMDGPU][GlobalISel] Add RegBankLegalize mul24 and fmul.legacy (#173123) by vangthao95 · 2 days ago
- c340d76a [DirectX] Disallow ElementIndex for raw buffer accesses (#173320) by Justin Bogner · 2 days ago
- 655f0ee [X86] Add tests showing failure to concat fma chain which share concatenated operands (#173403) by Simon Pilgrim · 2 days ago
- b5b1a52 InstCombine: Add baseline test for canonicalize SimplifyDemandedFPClass (#173188) by Matt Arsenault · 2 days ago
- 4569127 [DAGCombiner] Extend fp->int->fp optimizations to include clamping (#164502) by Guy David · 2 days ago
- 69933e9 Fixed build with C++20 standard (#169772) by Vedran Miletić · 2 days ago
- 5e93c70 AMDGPU: Stop requiring afn for f32 rsq formation (#172082) by Matt Arsenault · 2 days ago
- 17475c8 [GlobalISel][AArch64] Add support for sli/sri intrinsics (#173364) by Joshua Rodriguez · 3 days ago
- 8636959 [SPIRV] Fix recently introduced test case that depends on assertions. (#173388) by Manuel Carrasco · 3 days ago
- a422b50 [X86] Add instcombine tests showing potential to fold shifted blendv masks into regular cmp+select sequences (#173383) by Simon Pilgrim · 3 days ago
- 165aee7 [X86] EmitX86BuiltinExpr - attempt to convert SSE41/AVX1 roundps/d/ss/sd builtins to regular rounding modes (#171227) by Gergo Stomfai · 3 days ago
- 8a758a7 [X86] combineSelect - relax "vselect (X & C == 0), LHS, RHS" --> "vselect (X & C != 0), RHS, LHS" type limitation (#173366) by Simon Pilgrim · 3 days ago
- 123dda8 [NFC][CodeGen][SVE] Use DAG.getConstant(1) in place of getPTrue(AArch64SVEPredPattern::all). by Paul Walker · 3 days ago
- be1a2c4 [VectorCombine] foldShuffleOfSelects - support multiple uses of shuffled selects (#173166) by Marcell Leleszi · 3 days ago
- 8f9d70f [AsmParser] Fix crash when hex literal exceeds 16-bit float range (#172669) by Miloš Poletanović · 3 days ago
- 89f5308 [NFC][LLVM][ConstantFolding] Use Type* variant of ConstantFP::get when folding scalar intrinsics. (#172709) by Paul Walker · 3 days ago
- c9d07fa [X86] vselect-pcmp.ll - add test showing failure to fold icmp_eq(and(x,pow2),0) to shl(x,c) for v4f32 select masks (#173359) by Simon Pilgrim · 3 days ago
- 5f0ebb1 [LLVM][DAGCombiner] Look through freeze when combining extensions of extending-masked-loads. (#172484) by Paul Walker · 3 days ago
- 086c06a [NFC] clang-format llvm/include/llvm/Support/Registry.h (#173295) by Balázs Benics · 3 days ago
- 81ce0d4 [SCEV] Avoid tests not passing the verifier (NFC) by Florian Hahn · 3 days ago
- 64089e1 [SPIRV] Add support for non-interposable function aliases (#172730) by Manuel Carrasco · 3 days ago
- 9f11414 [AArch64] Improve SIMD immediate generation with SVE. (#173273) by Ricardo Jesus · 3 days ago
- edfe4e6 [ValueTracking] Support ptrtoaddr in isKnownNonZero() (#173275) by Nikita Popov · 3 days ago
- 7fe87c0 AMDGPU: Teach lowering that exp and log intrinsics cannot return denormals (#172296) by Matt Arsenault · 3 days ago
- 0fa53c8 [ADT] Make use of subsetOf and anyCommon methods of BitVector (NFC) (#170876) by Anatoly Trosinenko · 3 days ago
- 1bdefa3 [ORC] Add, and call through, reoptimize function in ReOptimizeLayer. (#173204) by Lang Hames · 3 days ago
- 720501f [MemProf] Remove unused declaration (NFC) (#173323) by Teresa Johnson · 3 days ago
- c93b578 [SLP] Skip MMRA metadata if instruction can't have it (#173319) by Jinsong Ji · 3 days ago
- 8bcfef9 [llvm][CMake] Remove -fno-lifetime-dse (#173322) by Aiden Grossman · 3 days ago
- 8f28279 [PtrAuth] Add ConstantPtrAuth comparator to FunctionComparator.cpp (#159480) by Oskar Wirga · 3 days ago
- 634e8ff [CodeGen][NPM] Do not implicitly flush pipeline when switching to CGSCC (#173315) by Aiden Grossman · 3 days ago
- cb8332d [IR] Fix User use-after-destroy by zapping in ~User (#170575) by Reid Kleckner · 3 days ago
- 626f76f Mips: Improve MipsAsmParser::expandDivRem (#172967) by YunQiang Su · 3 days ago
- f0f796e [IR] Value::setNameImpl: fix use-after-free when new name aliases old storage (#173258) by Wenju He · 3 days ago
- 9b6fb55 Reapply "[VPlan] Use predicate from VPValue VPWidenSelectR::computeCost." (#173170) by Florian Hahn · 3 days ago
- faf9631 [LV] Add additional select cost test with live-in compare cond (NFC). by Florian Hahn · 3 days ago
- b9c9462 [MemProf] Propagate size info used for hint reporting to duplicates (#172535) by Teresa Johnson · 3 days ago
- 6a7eee9 [DirectX] Teach MemIntrinsics about structs and nested arrays (#173078) by Justin Bogner · 3 days ago
- 28dd8b3 [llvm][utils] Make git-llvm-push not convert remote URLs (#173303) by Aiden Grossman · 3 days ago
- e4f3ee3 [gn build] Port bbd60c052310 by LLVM GN Syncbot · 3 days ago
- 2be2e30 [gn] port llvm/lib/Plugins changes by Nico Weber · 3 days ago
- a05bdda [VectorCombine] foldShuffleOfIntrinsics - support multiple uses of shuffled ops (#173183) by Dhruva Narayan K · 3 days ago
- 4b81c3e [DirectX] Resources and simple GEP traversal in DXILMemIntrinsics (#173054) by Justin Bogner · 3 days ago
- 452b205 [SelectionDAG] Make SSHLSAT/USHLSAT obey getShiftAmountTy(). (#173216) by Craig Topper · 3 days ago
- 23ffe48 [VectorCombine] foldPermuteOfBinops - support multi-use binary ops and operands in shuffle folding (#173153) by Miloš Poletanović · 3 days ago
- f49b0a9 Avoid merging globals residing in different comdats (#172835) by eleviant · 3 days ago
- 2fba72a [LLVM][NFC] Move PassPlugin from Passes to separate library by Alexis Engelke · 3 days ago
- ec0db31 [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FMAD, G_FMA (#172941) by vangthao95 · 3 days ago
- 87699a9 [AsmParser] Faster location -> value lookups (#172702) by Bertik23 · 3 days ago
- 08a0034 [StackProtector] Add metadata to opt-out (#170229) by cooperp · 4 days ago
- 74430db Revert "[LLVM][NFC] Move PassPlugin from Passes to Extensions lib" and subsequent commit by Alexis Engelke · 4 days ago
- a98d4a7 AMDGPU: Introduce f64 rsq pattern in AMDGPUCodeGenPrepare (#172053) by Matt Arsenault · 4 days ago
- e8c6de5 Revert "[SLP]Enable float point math ops as copyables elements." by Alexey Bataev · 4 days ago
- c95f851 Revert "[SLP][NFC]Add parens to silence a warning message, NFC" by Alexey Bataev · 4 days ago
- a7d7b15 [AArch64][SVE] Add MOVPRFX hints for unary undef pseudos. (#173031) by Ricardo Jesus · 4 days ago
- 2642ead [X86] isFNEG - add concat_vectors(fneg(x),fneg(y)) -> concat_vectors(x,y) handling (#173255) by Simon Pilgrim · 4 days ago
- ef2b34f [gn] fix mistake from 2815358c68ddd by Nico Weber · 4 days ago
- 518bfe4 [gn] port f7ed3d44a198b more by Nico Weber · 4 days ago
- 9001813 [gn] port 8f766e382b77 more by Nico Weber · 4 days ago
- 849e07f [gn build] Port d87b47d3a893 by Nico Weber · 4 days ago
- 415fd12 [gn] port f7ed3d44a198b by Nico Weber · 4 days ago