)]}' { "log": [ { "commit": "30e10ba06db8cd50c23affc89840a93d98730da0", "tree": "68c8c3c4478d573497c158d4f5b30b2acd768ce9", "parents": [ "be696cc373c8bac350ead64bc1101ac1fd69cef8" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 21:34:44 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 18:43:50 2026 -0700" }, "message": "[SLP]Fix crash in bool bitmask reduction match after tree vectorization\n\nThe known bits of the narrowed reduction leaves were computed after the\ntree vectorization, which drops the operands of the vectorized scalars,\nso the analysis dereferenced null operands. Match the bitmask form before\nthe vectorization and pass the result to the emission.\n\nFixes #225538\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225568\n\nGitOrigin-RevId: 1f01cb40300e3a76fe0b6b97e0cf1ad36e9b631f\n" }, { "commit": "be696cc373c8bac350ead64bc1101ac1fd69cef8", "tree": "afacdf004e812499216374012f06db2531fd681e", "parents": [ "a86033c37cd970d7e0125804fce19b8d1e3467c3" ], "author": { "name": "weiguozhi", "email": "57237827+weiguozhi@users.noreply.github.com", "time": "Tue Sep 22 18:16:40 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 18:26:25 2026 -0700" }, "message": "[RegAlloc] [X86] Enable callee saved register optimization for x86 (#220090)\n\nEnable callee saved register optimization implemented in\nRAGreedy::tryAssignCSRFirstTime() for x86. It can replace save/restore\ninstructions in prologue/epilogue with register spill/reload in cold\nblocks or register splits.\n\nSpec cpu 2006 int result with fdo on skylake.\n```\nregalloc-csr-cost-scale 0 30\n\n400.perlbench 42.0 42.7\n401.bzip2 25.5 26.3\n403.gcc 42.1 41.4\n429.mcf 45.0 44.4\n456.hmmer 38.2 38.2\n458.sjeng 32.3 32.0\n462.libquantum 68.0 68.9\n471.omnetpp 26.9 27.3\n473.astar 24.3 24.1\n```\n445.gobmk, 464.h264ref and 483.xalancbmk didn\u0027t work with my base\ncompiler.\n\nThis PR is split from https://github.com/llvm/llvm-project/pull/188609.\n\nGitOrigin-RevId: 82ea1d26eca4bb8d12513d29a71536c35f3ff47b\n" }, { "commit": "a86033c37cd970d7e0125804fce19b8d1e3467c3", "tree": "b9f4baa53b456be0b49cf25b9a11f3239074c779", "parents": [ "958aab81dcb233d2c93d5d44b1c494abb9cd7f50" ], "author": { "name": "Craig Topper", "email": "craig.topper@sifive.com", "time": "Tue Sep 22 18:10:28 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 18:19:39 2026 -0700" }, "message": "[SelectionDAG] Add ISD::ARITH_FENCE to SelectionDAGDumper. (#225485)\n\nWe seem to have no consistency on CamelCase or snake_case in node\nnaming. I\u0027ve gone with CamelCase to match the nearby nodes, but happy to\nchange.\n\nGitOrigin-RevId: 71122e716c7f507cb98df69961dbce21a187aa91\n" }, { "commit": "958aab81dcb233d2c93d5d44b1c494abb9cd7f50", "tree": "e42db81431a9a6cd83591de8474cc32123dd58eb", "parents": [ "853f260ba3c26dfce6e110d1c7273545db575c94" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 19:22:24 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 16:30:50 2026 -0700" }, "message": "[SLP][NFC]Update/add some new tests for fmuladd cases, NFC\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225553\n\nGitOrigin-RevId: 943c30efb207f7143395fa8b21b94e59f6704d2c\n" }, { "commit": "853f260ba3c26dfce6e110d1c7273545db575c94", "tree": "5d88803fe7906d0425ae4e584d6263e0ed79fe5e", "parents": [ "ebdc626e1cb05eb7a8d6c46098aad26936ae2823" ], "author": { "name": "Kazu Hirata", "email": "kazu@google.com", "time": "Tue Sep 22 16:20:37 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 16:29:59 2026 -0700" }, "message": "[CI] Ignore \u0027;\u0027 comments in .ll files in undef deprecator (#225509)\n\nWithout this patch, UndefGetFormatHelper matches across \u0027;\u0027 comment\nmarkers on added lines in .ll files, flagging false positives whenever\nthe word \u0027undef\u0027 appears in a test comment.\n\nThis patch stops matching at \u0027;\u0027 on added lines in .ll files so comments\nare ignored while uses of undef in IR instructions are still caught.\n\nAssisted-by: Antigravity\nGitOrigin-RevId: 8a251309cb33a35faf1d591379b50c3047c0d5dc\n" }, { "commit": "ebdc626e1cb05eb7a8d6c46098aad26936ae2823", "tree": "e859300a6e7ce18e4fae838c58ffbb96018b9957", "parents": [ "5bb5ee5963ff52ce6a5412549d9cde3175658668" ], "author": { "name": "Eli Friedman", "email": "efriedma@qti.qualcomm.com", "time": "Tue Sep 22 15:45:53 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 15:53:41 2026 -0700" }, "message": "[AArch64][GISel][FastISel] Fix Windows \"sret inreg\". (#225190)\n\n5dc8aeb26d2896c65cbea0d3b87f090241444bb6 added a special case to\nSelectionDAG ISel for \"sret inreg\" parameters: they are copied to x0 on\nreturn. There was a review comment suggesting that GISel and FastISel\nalso needed fixes, but through some mixup the followup never happened.\n\nFixes #225060\n\nGitOrigin-RevId: 8890be35705834c5af8e21424d7900639be03180\n" }, { "commit": "5bb5ee5963ff52ce6a5412549d9cde3175658668", "tree": "0c25af2924825c71dfefcdd6ecf493ea377655ad", "parents": [ "bbb0a4b37511024f95950bd82cca168233043021" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 23:30:39 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 15:39:47 2026 -0700" }, "message": "[LV] Add test for miscompile after #195823. (#225531)\n\nGitOrigin-RevId: 9b65fa01b029854d34e4ceea17d646b7fb74944f\n" }, { "commit": "bbb0a4b37511024f95950bd82cca168233043021", "tree": "c620e469db0a78eef7fb14a1207131e287056e46", "parents": [ "e720a7a8159871eb95c4cc12793d739316f35ae7" ], "author": { "name": "Krzysztof Parzyszek", "email": "Krzysztof.Parzyszek@amd.com", "time": "Tue Sep 22 17:23:10 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 15:31:49 2026 -0700" }, "message": "[flang][OpenMP] NONTEMPORAL clause is allowed on DO SIMD in 5.0+ (#225082)\n\nThe set of allowed clauses on DO SIMD was missing the NONTEMPORAL\nclause.\n\nGitOrigin-RevId: a2ff3cc78a3f88316a616ea90ef0fdd422bfb417\n" }, { "commit": "e720a7a8159871eb95c4cc12793d739316f35ae7", "tree": "9149dcb5930675d04937d0a811582915ed2e3fd2", "parents": [ "87d497bf348500dfde1a3f2b1de2f8f8586cfb6f" ], "author": { "name": "Simon Pilgrim", "email": "llvm-dev@redking.me.uk", "time": "Tue Sep 22 23:21:07 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 15:30:42 2026 -0700" }, "message": "[X86] combineTargetShuffle - cleanup PSHUFD/LW/HW folds (#225477)\n\nHandle all PSHUFD/LW/HW folds in the main switch statement - we\nsimplified the combineRedundantDWordShuffle folds ages ago, but never\nmerged the 2 switch statements back together.\n\nThe isNoopShuffleMask check should have already been taken care of by\ncombineShuffle.\n\nGitOrigin-RevId: 7bc44f4408de554b0ad337ed3a128a24702f79d7\n" }, { "commit": "87d497bf348500dfde1a3f2b1de2f8f8586cfb6f", "tree": "bf8511f53146ee058b6f62d38378abb9f5fef606", "parents": [ "863fc17052e0f6848b6725c4152a629072839e0e" ], "author": { "name": "Lang Hames", "email": "lhames@gmail.com", "time": "Wed Sep 23 07:57:25 2026 +1000" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 15:06:32 2026 -0700" }, "message": "[ORC] Mangle Dlfcn CI names as C (fixes MachO dlopen lookup) (#225392)\n\nThe __orc_rt_jit_dl{open,update,close}_wrapper functions are C symbols\nin the ORC runtime, so on Darwin their linker names carry a leading\nunderscore. The controller must resolve them under the C-mangled name.\nThe original LLJIT code did this via mangleAndIntern; the Proxy\nconversion (#224881) used Verbatim by mistake, so on MachO the lookup\nsearched for the unmangled name and failed (\"Symbols not found:\n__orc_rt_jit_dlopen_wrapper\"). Flip the Dlfcn descriptors to C to\nrestore the mangling. No runtime change is needed -- compiler-rt already\nexports these as C symbols.\n\nGitOrigin-RevId: 5f7ace54653f8d5b27369c912912d3e6edc72455\n" }, { "commit": "863fc17052e0f6848b6725c4152a629072839e0e", "tree": "74128291aab9775cdfcf631188cbe59224e42d3d", "parents": [ "7444995ffbef5c1f6132e808e30a69ac7e71925d" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 17:33:50 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 14:41:59 2026 -0700" }, "message": "[SLP]Do not propagate reduction fast-math flags to the loop bypass select\n\nThe select between the final loop accumulator reduction and the values\nbypassing the loop inherited the reduction fast-math flags from the\nbuilder, so a NaN or Inf bypass value became poison under nnan/ninf.\n\nFixes https://github.com/llvm/llvm-project/pull/221598#issuecomment-5782195781\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225532\n\nGitOrigin-RevId: a8ccbb407250d6c83a7bf2a33f3cd0d2f0096424\n" }, { "commit": "7444995ffbef5c1f6132e808e30a69ac7e71925d", "tree": "17f73e3c195401df772b988b422316fe9d12cbf8", "parents": [ "4be27a8eea4fd8f72813eb9cd157182ef096d6b5" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 22:30:49 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 14:40:56 2026 -0700" }, "message": "[ConstraintElim] Cache decompositions to avoid compile-time blow-up. (#225207)\n\nWith the recent improvements to isKnownNoWrap, we now can call decompose\nagain on (sub-) expressions multiple times for a given query.\n\nIn some cases, this can lead to exponential compile-time increases, as\nas each decompose sub-call can lead to many more repeated decompose\ncalls via isKnownNoWrap.\n\nFor the test case in the patch, compile-time without the patch is \u003e 250s\non my system, vs \u003c 0.5s with the patch.\n\nThe caching is mostly beneficial to avoid exponential compile-time, and\ndoes not translate to compile-time improvements in\n\nhttps://llvm-compile-time-tracker.com/compare.php?from\u003d150f8999285d07bdebc6a73dfdeae520dbdf1468\u0026to\u003d5f64294359fb513d62e257e95988779b2d5b8d77\u0026stat\u003dinstructions:u.\n\nNote that mayLookThrough is needed to avoid going through the cache\nunnecessarily for leave nodes. Without that bypass, I measured a\nnoticeable compile-time increase (around +0.05% geomean).\n\nThe test case for the patch is synthetic, but I hit the same issue on\nllvm-opt-benchmark-nightly for a patch adding a new rule to\nisKnownNoWrap.\n\nPR: https://github.com/llvm/llvm-project/pull/225207\nGitOrigin-RevId: d2d86dc298e6d10f8e019448061316b4d046caf9\n" }, { "commit": "4be27a8eea4fd8f72813eb9cd157182ef096d6b5", "tree": "3d52d55c06a09ef24fe3448dc1f4052c9582b6bc", "parents": [ "53ed80172a521854a10ce1566d82582b796b6cb9" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 17:20:50 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 14:29:30 2026 -0700" }, "message": "[SLP]Keep splat subtree load roots in memory order\n\nThe roots have no users and the gathers reuse their lanes by value, but\nthe group or reordering-pass order added a reorder shuffle and non-free\nextracts, so the profitable vector load was dropped.\n\nFixes the perf regression from #221717.\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225527\n\nGitOrigin-RevId: 8afb2a08d8b8d429ecd290e1052a9ca2fd2ed701\n" }, { "commit": "53ed80172a521854a10ce1566d82582b796b6cb9", "tree": "e67a3ce43d1523f6d71d1227349359d635b94d80", "parents": [ "68889ecc3b0f116decacd39b89b8dfb1a573568e" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 17:15:58 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 14:23:49 2026 -0700" }, "message": "[SLP][NFC]Add an extra test for missing reordering skipping, NFC\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225525\n\nGitOrigin-RevId: ab49f3315d5bcf9f0d852e960587fa3eb5d849b0\n" }, { "commit": "68889ecc3b0f116decacd39b89b8dfb1a573568e", "tree": "c63a7ef26e61d9d8d6ae75ab06b46acd3d63ade5", "parents": [ "f6649de487b979dea18865e73c70eb6234740d4b" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Tue Sep 22 22:04:29 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 14:10:09 2026 -0700" }, "message": "[ValueTracking] Strip computeKnownBits variant from ABI (NFC) (#225478)\n\nIt is unused.\n\nGitOrigin-RevId: b864af16366b87a0bf8d10bfbc9f8d62795b501e\n" }, { "commit": "f6649de487b979dea18865e73c70eb6234740d4b", "tree": "f628b0ef2d9bdcb2bdc62cc90c026b501ff84aa9", "parents": [ "0c01b4c64b99ea64c4ae53f009f09ce646433662" ], "author": { "name": "Kyungwoo Lee", "email": "kyulee@meta.com", "time": "Tue Sep 22 14:04:21 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 14:09:19 2026 -0700" }, "message": "[MachineOutliner] Preserve debug locations on outlined call sequences (#224189)\n\nMachine Outliner replacement call sequences currently have no DebugLoc.\nWhen one immediately follows another call, its address can be emitted\nwith DWARF line 0, meaning “unknown source location,” so symbolication\nfinds the function but not the source line.\n\nCopy the first usable source location from each candidate to its\nreplacement call sequence, including any target-inserted save and\nrestore instructions. If none exists, leave the sequence locationless.\nThis matches the IR Outliner’s policy: preserve each replacement call’s\nlocation while leaving the shared outlined body locationless because it\nrepresents multiple source regions.\n\nGitOrigin-RevId: 6ad70274f35f15ff2ac8c2f2b1425a52b3bfcc48\n" }, { "commit": "0c01b4c64b99ea64c4ae53f009f09ce646433662", "tree": "9c5cbd99e1743aa2f61395df5cdaa7404631a1dd", "parents": [ "08682f474576238ff6a3ecc56b8ad4e60f82e56c" ], "author": { "name": "Chinmay Deshpande", "email": "chdeshpa@amd.com", "time": "Tue Sep 22 13:46:40 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 13:55:18 2026 -0700" }, "message": "[SelectionDAG] Fix FP8 conversions to half for subnormals and overflow (#224984)\n\nThis PR contains 2 fixes:\n\n* Preserve subnormal values when the source format and destination have\nthe same exponent bias. Normalizing these inputs previously produced a\nnonpositive destination exponent and an invalid floating-point encoding.\n\n* Convert finite values beyond the destination exponent range to\ninfinity, while preserving the existing NaN handling. This fixes\nFloat8E5M3FNU to half conversions that previously produced NaNs on\noverflow.\n\nAssisted by: Codex (Astra)\n\nGitOrigin-RevId: 755e4d429f11a17ba386cdf4d4ff7883294368dd\n" }, { "commit": "08682f474576238ff6a3ecc56b8ad4e60f82e56c", "tree": "3863592b33ca8a22d4308d8301f12e1a5e50a86c", "parents": [ "3d9cb927f692fa18e99b53c2056d05738323e6fa" ], "author": { "name": "Nico Weber", "email": "thakis@chromium.org", "time": "Tue Sep 22 16:39:14 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 13:47:14 2026 -0700" }, "message": "[gn build] Port aa7a0c3c318b (#225517)\n\nGitOrigin-RevId: eaf501b5f70fa622b9707b7a33b38452e45e8034\n" }, { "commit": "3d9cb927f692fa18e99b53c2056d05738323e6fa", "tree": "b5d053645b2c5a3851c61de42c3384bcbf048aa8", "parents": [ "59c38d546e7c4584b3949b9b70166921e5b07a79" ], "author": { "name": "Nico Weber", "email": "thakis@chromium.org", "time": "Tue Sep 22 16:36:56 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 13:46:13 2026 -0700" }, "message": "[gn build] Port 4acbf9b61c3f (#225421)\n\nGitOrigin-RevId: fb3120e777b08805ac7da4487d06642bbc56cba5\n" }, { "commit": "59c38d546e7c4584b3949b9b70166921e5b07a79", "tree": "013e3db6d4ffa74590955c5e72d21af4561e436e", "parents": [ "a6d68b71d3f5dc98b452728922c4a6ac961067ab" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 16:30:20 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 13:40:09 2026 -0700" }, "message": "[SLP][NFC]Add a test with splat reverse vectorization, NFC\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225514\n\nGitOrigin-RevId: 134c06c276da7411f1e1d95fa39f23b305ca4832\n" }, { "commit": "a6d68b71d3f5dc98b452728922c4a6ac961067ab", "tree": "4862894228d0145acd5cc79e3749d2c3c0250427", "parents": [ "9e603a443776683fd964f865bd3ecb1801bdd075" ], "author": { "name": "Arseniy Obolenskiy", "email": "arseniy.obolenskiy@amd.com", "time": "Tue Sep 22 22:22:26 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 13:39:13 2026 -0700" }, "message": "[SPIR-V] Fold same type conversions into a copy (#223365)\n\nOpSConvert/OpUConvert/OpFConvert reject an operand whose type matches\nthe result, so convert_uint(int) and friends produced invalid SPIR-V\n\nGitOrigin-RevId: b316c1a0df16f96151960970aced9e1b33c85820\n" }, { "commit": "9e603a443776683fd964f865bd3ecb1801bdd075", "tree": "88dbc2b53db0309c7a92c4c8c85b8ab2cd3a6549", "parents": [ "960412959bd7e8caf216ce0556e0568baaf9a302" ], "author": { "name": "Nico Weber", "email": "thakis@chromium.org", "time": "Tue Sep 22 16:16:49 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 13:26:05 2026 -0700" }, "message": "[gn] port 854a9b8d7036ef524 more (#225510)\n\nGitOrigin-RevId: 2e2f186211834a0f7564c9e68e0421e9ca77d50d\n" }, { "commit": "960412959bd7e8caf216ce0556e0568baaf9a302", "tree": "10bb2278a89c3c296375e07c89b977002258a4d6", "parents": [ "461819b2a1fc13fcab97b4e4abd84836bb25c25f" ], "author": { "name": "Domenic Nutile", "email": "domenic.nutile@gmail.com", "time": "Tue Sep 22 15:53:34 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 12:59:13 2026 -0700" }, "message": "[NFC][AMDGPU] Refactor isDPALU_DPP to only check if the instruction requires the feature (#224373)\n\nPreviously the helper function was a combination of checking if the\ninstruction required the feature and if the feature is available. This\nbehavior diverges from similar isDPALU_DPP32BitOpc and can cause\nconfusion. This refactor aligns the two for consistency, and users\nshould also check if the feature is available if needed.\n\nGitOrigin-RevId: 2bb58d1595ac9a00c2b33336b65672ff7a81a752\n" }, { "commit": "461819b2a1fc13fcab97b4e4abd84836bb25c25f", "tree": "3029fef5a3300629ddc69b608ac1b7fe0c61f801", "parents": [ "36e4809bcba9938b5b0aa744a477e49e206056a7" ], "author": { "name": "vangthao95", "email": "vang.thao@amd.com", "time": "Tue Sep 22 12:48:40 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 12:54:45 2026 -0700" }, "message": "[AMDGPU][NFC] Auto-generate llvm.amdgcn.wqm.vote test checks (#224772)\n\nGitOrigin-RevId: cdaed31318e9d49fcfa47d7229c18168611f062f\n" }, { "commit": "36e4809bcba9938b5b0aa744a477e49e206056a7", "tree": "82be1f97506f24e1b90effc181247eab0437eacf", "parents": [ "7a1903be123e5300cf2dc2b32635250ed9ac243d" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 20:27:21 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 12:54:07 2026 -0700" }, "message": "[SCEV] Use SCEVUse to access MulOpLists. (#225450)\n\nAfter https://github.com/llvm/llvm-project/pull/224974, we can reach\nthis patch with SCEV Mul expressions with operands that have use-flags.\n\nUpdate loop to access map with SCEVUse instead of const SCEV *.\n\nFixes a crash in the added test case.\n\nGitOrigin-RevId: adaa302ea3f8e95e800342ae5b8cb9f9556bdd54\n" }, { "commit": "7a1903be123e5300cf2dc2b32635250ed9ac243d", "tree": "dff593e9ae9a8b576fef110aa773781faf478df3", "parents": [ "8b711121e64096f9e72c1d22292a6308c5185df9" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Tue Sep 22 21:16:53 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 12:24:03 2026 -0700" }, "message": "DAG: Fix cross-block gc.relocate of constants and allocas (#222894)\n\nThis fixes latent \"Register not marked live out of predecessor\" verifier errors in\nexisting statepoint tests when LiveIntervals is run earlier in the pass pipeline. This\nis observable today when using -verify-coalescing in statepoint tests. The verifier\ncheck only runs with LiveIntervals, which is first computed as a dependency for the\nRegisterCoalescer, but the coalescer happens to hide the problem before the first\nverifier run with computed LiveIntervals in the existing testcases.\n\nWhen constants and static allocas are relocated in an invoke statepoint\u0027s landing pad,\nLowerAsSTATEPOINT places the virtual register definition after the STATEPOINT call:\n\n bb.0.entry:\n STATEPOINT ... ; unwinds to bb.2 before %0 is defined\n %0:gr64 \u003d MOV64ri 1\n\n bb.2.lpad (landing-pad):\n $rax \u003d COPY %0:gr64 ; reads uninitialized %0 (folded to undef)\n\nThis happens because LowerAsSTATEPOINT calls ExportFromCurrentBlock(V)\nfor cross-block NoRelocate values, queuing a CopyToReg in PendingExports\nthat is chained after the STATEPOINT call node.\n\nThis patch fixes the problem by recording the directly-lowered leaf in\nStatepointRelocationRecord and rematerializing it in visitGCRelocate,\nresolving both the wrong-code miscompile on the unwind path and the\nmachine verifier error with -early-live-intervals.\n\nCo-authored-by: Claude (Claude-Opus-4.8)\nGitOrigin-RevId: 941601e5da23c567ff8fdd2377392ca6dcba672d\n" }, { "commit": "8b711121e64096f9e72c1d22292a6308c5185df9", "tree": "3f6ccaeb09117c5a6db9fc969cfd1cbe58ed711c", "parents": [ "2cc099ce42132362ee0b9f8f475c6abe550ab8b8" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 20:06:33 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 12:16:30 2026 -0700" }, "message": "[ConstraintElim] Link values to decompositions during queries if needed. (#224623)\n\nDecomposition is context sensitive and uses information at the query\npoint to determine if operations have the required wrap flags.\n\nThis can lead to situation where at the time facts are added, we fail to\ndecompose an operation (like `%y \u003d add %x, 1`), and only add it as\nvariable `%y`.\n\nIf at query time, we can decompose `%y`, the query will contains `%x`\nand `1`\nas variable/constant, with no connection to the fact added earlier.\n\nThis can pessimize results in some cases. To avoid this, add additional\nrows connecting the variable and the decomposition (e.g.` %y \u003d\u003d\ndecompose\n(add %x, 1))` and re-try the query.\n\nFor now, only check top-level operands. This helps with a few cases in\npractice. But is not complete, as this issue could happen at each step\nof the\ndecompose recursion. We can investigate this as follow-up.\n\nThere are 2 additional folds in\nhttps://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1351, a fold\nin ClamAV and fixes a regression with\nhttps://github.com/llvm/llvm-project/pull/224621.\n\nCompile-time impact is in the noise\n\nhttps://llvm-compile-time-tracker.com/compare.php?from\u003dc5c167c7436f035152289cb9489548ccf5328bb3\u0026to\u003de4be2920133168a85d0cfbf9390b1bc752abcc0f\u0026stat\u003dinstructions:u\n\nPR: https://github.com/llvm/llvm-project/pull/224623\nGitOrigin-RevId: f542556dfae605899fd31feda9eadef91ac00aa6\n" }, { "commit": "2cc099ce42132362ee0b9f8f475c6abe550ab8b8", "tree": "a80f8fa728276db0cadab8a4adea6c185da82da5", "parents": [ "a5b138b0a249dbda30772e4ee774982c1d74eba8" ], "author": { "name": "Tejas Joshi", "email": "tejassanjayj@nvidia.com", "time": "Tue Sep 22 11:57:47 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 12:04:00 2026 -0700" }, "message": "[InstCombine] Optimize selects feeding into BinOp (#224478)\n\nTransform:\n`(A ? B : C) op (D ? E : F)`\n\ninto:\n`A ? (B op (D ? E : F)) : (C op (D ? E : F))`\n\nonly if D can be implied by A\n\nThis allows for more parts of the expression to be predicated, and\nallows more CSE and reuse of nodes calculated as part of an exclusive\nsum algorithm.\n\nhttps://alive2.llvm.org/ce/z/Dawj5u\n\nGitOrigin-RevId: 353f9778f5d9e8835bfa2357ac3f4ecd7e67c778\n" }, { "commit": "a5b138b0a249dbda30772e4ee774982c1d74eba8", "tree": "251a1c9b850a063058888a3c9e01e2cf2eca279d", "parents": [ "893cfb57de3d97e092a46c42dca62a64884616d4" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 14:41:34 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:51:13 2026 -0700" }, "message": "[SLP]Drop unprofitable splat subtrees before the profitability trim\n\nTheir reuse pricing distorts the main tree\u0027s trim decisions; price the\nrestored tree from per-node costs on revert instead of incrementally.\n\nReviewers: bababuck, RKSimon\n\nPull Request: https://github.com/llvm/llvm-project/pull/224470\n\nGitOrigin-RevId: fd2de19555b060c6f813841f2e25825ad53eab40\n" }, { "commit": "893cfb57de3d97e092a46c42dca62a64884616d4", "tree": "9f0b8dddbfbe3ad85283c4d5f8e19fad0a703967", "parents": [ "beedcd71e83970e762f902762998cd11da285522" ], "author": { "name": "Min-Yih Hsu", "email": "min.hsu@sifive.com", "time": "Tue Sep 22 11:37:34 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:46:03 2026 -0700" }, "message": "[RISCV] Eliminate redundant VSLIDEDOWN_VL/VSLIDEUP_VL pairs (#223863)\n\nGiven this pattern\n```\n %down \u003d RISCVISD::VSLIDEDOWN_VL undef, %val, %shift, %mask, %vl0\n%up \u003d RISCVISD::VSLIDEUP_VL %val, %down, %shift, %mask, %vl1\n```\nWe can simplify it with `%val`, as it\u0027s doing redundant shifting.\n\nThis pattern usually show up when we emit lots of\ninsert/extract_subvector or concat_vectors while legalizing ops. Since\nthose ISD will not be cleaned up by any DAG combine, they are\nimmediately lowered into RISCVISD. This patch adds the missing DAG\ncombine to clean them up.\n\nGitOrigin-RevId: 3d7395a6b066a476d6e711e7da3be8c47aec81d2\n" }, { "commit": "beedcd71e83970e762f902762998cd11da285522", "tree": "2a7f0df7db7f26aaacbeb13f1e2168b63e3fb738", "parents": [ "7e9c3cf4ebd61b70f1471f097d2afed47cc78bfc" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 14:35:20 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:44:58 2026 -0700" }, "message": "[SLP]Vectorize bool-to-bitmask reductions as a bitcast of zero tests\n\nAn or-reduction of boolean leaves each shifted by their own bit position\n(an array of bools packed into a bitmask) is a bitcast of the per-lane\nzero tests to an integer, which the backend lowers to a movmsk (X86).\nEmit that instead of the shift and reduce sequence when it is cheaper.\n\nFixes #41997\n\nAssisted-by: Cursor\n\nReviewers: RKSimon\n\nPull Request: https://github.com/llvm/llvm-project/pull/223434\n\nGitOrigin-RevId: 3f5d17b22586bd080c62d5b294bd05c0dc282ba4\n" }, { "commit": "7e9c3cf4ebd61b70f1471f097d2afed47cc78bfc", "tree": "63e3e355b54100d8c9261466197798a1103aef28", "parents": [ "ab66b22f621341bca1f5e1d94d8c47d02ab93569" ], "author": { "name": "Keith Smiley", "email": "keithbsmiley@gmail.com", "time": "Tue Sep 22 11:35:12 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:44:00 2026 -0700" }, "message": "[cmake] Build libxml from source in release (#221365)\n\nWith 23.x we started linking a static libxml in release builds to avoid\nrequiring that to be installed, and the varying names of that library on\ndifferent linux distros. That broke more than it fixed because the\nstatic libxml in our docker images are built targeting ICU, and ICU\u0027s\nshared library version changes quickly, so even between 2 ubuntu\nversions the binaries will not work.\n\nWith this change we now build from source in the release build, which is\nalready what windows does, and we disable ICU / iconv since those don\u0027t\nseem vital for the windows manifest use case. This seems easier than\nbuilding a libxml out of band in our CI images that do the release\nbuilds.\n\nFixes https://github.com/llvm/llvm-project/issues/215764\n\nAssisted-By: codex\nGitOrigin-RevId: 5ae71ec799917c67e9e72510e68831602fc60699\n" }, { "commit": "ab66b22f621341bca1f5e1d94d8c47d02ab93569", "tree": "438bfaa3db494224143f75a7658d2bbaaac11154", "parents": [ "2f19109971ee1fa1489be9100e3d15128bca9056" ], "author": { "name": "Valeriy Savchenko", "email": "vsavchenko@apple.com", "time": "Tue Sep 22 19:25:19 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:34:05 2026 -0700" }, "message": "[SelectionDAG] Fix crash in mask widening for non-simple element types (#225460)\n\nWe reconstruct the best fitting type for the two given operands and\nthose are not guaranteed to have simple types. EVT::getIntegerVT as\nopposed to MVT::getIntegerVT handles this case.\n\nFixes a regression introduced in #217307.\n\nGitOrigin-RevId: 746076bccd5fa18c09a29107eef5c101ea0e2674\n" }, { "commit": "2f19109971ee1fa1489be9100e3d15128bca9056", "tree": "46c8351c4097a8dcd1547297981e65084e7013a2", "parents": [ "4f9e464484189821623173f5b646bd0feb37550b" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 19:18:02 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:23:56 2026 -0700" }, "message": "[VPlan] Model epilogue skeleton in VPlan by wrapping in VPIRBBs (NFCI). (#222312)\n\nReplace most of connectEpilogueVectorLoop by modeling the CFG explicitly\nin the epilogue VPlan, by importing the CFG for the skeleton created\nafter executing the main loop.\n\nTo do so, update the main loop\u0027s plan to replace its VPBasicBlocks with\nVPIRBasicBlocks wrapping the generated IR blocks. This allows accessing\nthe CFG for the VPlan, after execute.\n\nA new modelGeneratedMainLoopBlocks transform then duplicates the CFG\nfrom the main plan in the epilogue plan. This includes all runtime\nchecks and bypass blocks. This means we no longer need a number of\nmanual patching up of the IR and DT to connect main and epilogue plans\nafter execute.\n\nIt is another step getting us slightly closer to completely modeling\nepilogue vectorization natively in VPlan.\n\nAlong the way, it will also help to simplify code needed to perform\nfolds on the epilogue skeleton (i.e. simplify\nhttps://github.com/llvm/llvm-project/pull/204243).\n\nPR: https://github.com/llvm/llvm-project/pull/222312\nGitOrigin-RevId: f05f4f34e5cb107e17672ad806f18d031ab74caf\n" }, { "commit": "4f9e464484189821623173f5b646bd0feb37550b", "tree": "6b4b276ec96d3718dd65947f51ebcf2e4cfbcc10", "parents": [ "f14c3d0c1155f762e9f87a029268d877d6c98c88" ], "author": { "name": "eleviant", "email": "eleviant@accesssoftek.com", "time": "Tue Sep 22 20:13:38 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:20:21 2026 -0700" }, "message": "[X86] Fix operand of TAILJMPm64_REX (#225080)\n\nThe TAILJMPm64_REX pseudo-instruction is emitted by the\nx86-expand-pseudo pass after the register allocator, replacing\nTCRETURN_WINmi64 or TCRETURNmi64 depending on the target ABI. The\nproblem is that the former uses the GR64_TC register class for its\nmemory address operand, while the latter uses GR64_TCW64. This breaks\nMachineVerifier, triggering an assertion in EXPENSIVE_CHECKS builds.\n\nGitOrigin-RevId: efa2e450edc341bac7a5215f408f4d1480047c8c\n" }, { "commit": "f14c3d0c1155f762e9f87a029268d877d6c98c88", "tree": "e59b7f6c186b4889191259f745d2b931132522a8", "parents": [ "df0c389bc6dde8b81c3b70552a1e9c0aa5779044" ], "author": { "name": "Alex MacLean", "email": "amaclean@nvidia.com", "time": "Tue Sep 22 11:11:32 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:19:35 2026 -0700" }, "message": "[InferAddressSpaces] Add a TTI hook for address space joins (#225161)\n\nInferAddressSpaces currently joins different specific address spaces to\nthe flat address space. This misses cases where the target has a more\nspecific common space. For NVPTX, a PHI or select combining shared (AS3)\nand cluster-shared (AS7) pointers can use AS7, allowing loads through\nthe result to use ld.shared::cluster.\n\nAdd a getAddressSpaceJoin TTI hook and implement the AS3/AS7 join for\nNVPTX.\n\nGitOrigin-RevId: fdf4dcb7b7ddb33e5f4c9ab7fad0fca2e0170daa\n" }, { "commit": "df0c389bc6dde8b81c3b70552a1e9c0aa5779044", "tree": "6dde468ba7d5c820a128fded3cbdb4a729905d2f", "parents": [ "73d5c32f0d688a7cb984677ed2ae1395291d8613" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Tue Sep 22 18:48:43 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:15:21 2026 -0700" }, "message": "[LV] Rework legacy widen/replicate in tryToBuildVPlan (NFC) (#224569)\n\nThe code has been rewritten for clarity:\n\n- An RPOT traversal is unnecessary, and a depth-first will do.\n- The list of recipes to be skipped continues to grow, and its utility\nis in question. Replace it with a clean make_isa_range over\nVPInstructions, and an assert.\n- Clarify that tryToCreateWidenNonPhiRecipe is the routine that produces\nVPWidenIntOrFpInductionRecipes.\n- Clarify the necessity of the underling value.\n\nGitOrigin-RevId: 747cf241988e83e9ab4aae88efc10d91e87a0b90\n" }, { "commit": "73d5c32f0d688a7cb984677ed2ae1395291d8613", "tree": "0142396fbff817a1323bfdc49fbedf05dcdba1d2", "parents": [ "4ab691fbab991caa760a48ef77f1f7c71f1a4737" ], "author": { "name": "Ganesh", "email": "Ganesh.Gopalasubramanian@amd.com", "time": "Tue Sep 22 23:14:44 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 11:14:36 2026 -0700" }, "message": "[X86] AVX10_V2_AUX Implementation (#206888)\n\n- AVX10_V2_AUX builds on AVX10 with FP8/FP4/FP6 format conversions\noptimized for AI/ML inference workloads, enabling efficient\nlow-precision arithmetic\n\n- Narrowing conversions from single-precision to FP8: VCVTPS2BF8,\nVCVTPS2HF8, VCVTPS2BF8S, VCVTPS2HF8S with optional saturation, biasing\n(VCVTBIASPS2BF8/HF8), and round-to-odd (VCVTROPS2HF8) variants\n\n- Expanding conversions from FP8 to single-precision: VCVTBF82PS,\nVCVTHF82PS that widen 8-bit FP formats with masking support\n\n- FP4/FP6 conversions: VCVTBF82BF4S, VCVTHF82BF4S for truncating,\nVCVTBF82BF6S, VCVTHF82HF6S for same-size, and expanding VCVTBF42HF8,\nVCVTBF62BF8, VCVTHF62HF8\n\n- Support includes instruction definitions, intrinsics, and Clang\nheaders\n\n- Tests covering AT\u0026T and Intel syntax assembly for both 32-bit and\n64-bit modes, plus disassembler tests verifying encoding and decoding\n\nSpecification: [ACE (AI Compute Extensions) Specification\nv1.0](https://x86ecosystem.org/wp-content/uploads/2026/06/ACE_v1_Specification_public_1_15.pdf)\n\nCo-authored-by: Umesh Kalvakuntla\nCo-authored-by: Attarde, Mahesh \u003cmahesh.attarde@intel.com\u003e\nGitOrigin-RevId: aa7a0c3c318b8391c61fba9dcbb98e08c85d5776\n" }, { "commit": "4ab691fbab991caa760a48ef77f1f7c71f1a4737", "tree": "d626beb516fc83b000b2c90f550ab0ce8496e869", "parents": [ "c9887d998ae945923198fb8b26fa12c85b8e7042" ], "author": { "name": "Kunal Chadha", "email": "kunachad@qti.qualcomm.com", "time": "Tue Sep 22 10:37:25 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:47:52 2026 -0700" }, "message": "[AArch64] Override hasSideEffects for LDAR/STLR instructions (#224096)\n\nOverride `hasSideEffects()` for `LoadAcquire` and `StoreRelease`.\n\n`LoadAcquire` and `StoreRelease` already have their memory ordering\nsemantics modeled via atomic MMO flags, so they should not additionally\nbe marked as having unmodeled side effects.\n\nMarking these instructions as having unmodeled side effects caused\n`ShrinkWrap::useOrDefCSROrFI()` to conservatively treat basic blocks\ncontaining them as potentially using the stack. This prevented\nShrinkWrap optimizations such as splitting restore points during\npost-shrink-wrapping. The tests added in this PR cover this case.\n\nUpdated llvm-mca expectations for the affected instructions.\n\nFixes #223021\n\nGitOrigin-RevId: 19c33fb826ed11652280fa0a4161675963d09991\n" }, { "commit": "c9887d998ae945923198fb8b26fa12c85b8e7042", "tree": "1070de251d42cc79f5371dd753d1517f58ea1bc7", "parents": [ "ee1859ca79ac0c6a438bc59b41ed19e4b52a74af" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 18:34:57 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:46:38 2026 -0700" }, "message": "[VPlan] Add getRecordedExecutionFrequency helper (NFC). (#225414)\n\nAdd a helper to get the execution frequency from a VPBB via the\nfrequencies attached to its recipes.\n\nWill also be used in https://github.com/llvm/llvm-project/pull/196845,\nso it is added in a location where it can be used w/o movement there.\n\nPR: https://github.com/llvm/llvm-project/pull/225414\nGitOrigin-RevId: e4657c791d32993f2253f51f1d1427b72ed39651\n" }, { "commit": "ee1859ca79ac0c6a438bc59b41ed19e4b52a74af", "tree": "3da0169c819f85aafa267f02da6647e56e33cc78", "parents": [ "ba2a0f5b96b0ca9b1c517800c57bfdaef9e90051" ], "author": { "name": "LU-JOHN", "email": "John.Lu@amd.com", "time": "Tue Sep 22 12:28:14 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:34:17 2026 -0700" }, "message": "[AMDGPU][GISel] Legalize v2bf16 (#223803)\n\nAdd V2BF16 legalization for fadd, fsub, fmul, fma, fmin, fmax and\nfcanonicalize.\n\nReorganize rule building for `MinNumMaxNumIeee` and `MinNumMaxNum` so\nthat each type is handled independently.\n\nUpdated old tests and added new tests GlobalISel/fsub.bf16.ll,\nGlobalISel/fabs.bf16.ll, GlobalISel/fminnum.bf16.ll and\nGlobalISel/fneg.bf16.ll.\n\nClamp bf16 to 2 elements.\n\nTest with v4bf16.\n\n---------\n\nSigned-off-by: John Lu \u003cJohn.Lu@amd.com\u003e\nGitOrigin-RevId: ddc63f8a20b63f2cf76299d73ab5c99c73144374\n" }, { "commit": "ba2a0f5b96b0ca9b1c517800c57bfdaef9e90051", "tree": "ca4e387e9f4a8d7edeb260ba69f9da29c952b696", "parents": [ "59e99a0b6623e4382d1229ee8a949310769ef106" ], "author": { "name": "Tadeusz", "email": "tadeuszjt@protonmail.com", "time": "Tue Sep 22 19:16:31 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:26:02 2026 -0700" }, "message": "[KnownFPClass] Added sNaN deductions for sin, cos and tan. (#224875)\n\nAdded the sNaN deductions for sin, cos and tan to KnownFPClass.\n\nCloses #217150\n\nGitOrigin-RevId: b5dfb7423c6aae8c3a133b08f43e8094b9da2cf3\n" }, { "commit": "59e99a0b6623e4382d1229ee8a949310769ef106", "tree": "13e45011e230e1ad5788e1d1d9441e9700e93004", "parents": [ "dae3dbd7a88ff54e548f19f84909805f0bca0f6b" ], "author": { "name": "Aiden Grossman", "email": "aidengrossman@google.com", "time": "Tue Sep 22 10:11:14 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:24:59 2026 -0700" }, "message": "[NewPM] Match LegacyPM behavior for opt-bisect in passes\n\nThis patch updates passes that change their behavior around opt-bisect\n(e.g., performing less optimizations) so that this behavior is\nreplicated in the NewPM.\n\nAssisted by LLM.\n\nReviewers: aeubanks, arsenm\n\nPull Request: https://github.com/llvm/llvm-project/pull/225439\n\nGitOrigin-RevId: dcdbda6493bc818580299516fb87ee03e879fb2a\n" }, { "commit": "dae3dbd7a88ff54e548f19f84909805f0bca0f6b", "tree": "7ca124c25b677e0d1001342802f80e18818b2361", "parents": [ "856806f80396d42b1b3031d6eff48a741cdb0bf6" ], "author": { "name": "Aiden Grossman", "email": "aidengrossman@google.com", "time": "Tue Sep 22 10:10:20 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:23:50 2026 -0700" }, "message": "[NewPM] Fix OptBisect Functionality for disabled gate\n\nWe were never actually checking if the gate was enabled. This patch\nfixes it to match the behavior of the LegacyPM.\n\nReviewers: aeubanks\n\nPull Request: https://github.com/llvm/llvm-project/pull/225437\n\nGitOrigin-RevId: 4e22f745681e8dfb30c4feb0b26d3459bf1ff123\n" }, { "commit": "856806f80396d42b1b3031d6eff48a741cdb0bf6", "tree": "19343dabd9126ad1bb0264358b7c97c6b3b1a2d2", "parents": [ "7b1641aa07729cdd551c7331523c813a8f703334" ], "author": { "name": "Daniel Cederman", "email": "cederman@gaisler.com", "time": "Tue Sep 22 19:06:52 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:15:35 2026 -0700" }, "message": "[Sparc][clang] Use 64-bit long double on bare-metal targets (#222304)\n\nGCC uses 64-bit long double for bare-metal SPARC V8 targets, including\nRTEMS. Keep the default 128-bit for other SPARC targets.\n\nUse the scalar calling convention for 64-bit long double.\n\nAssisted-by: Codex\nGitOrigin-RevId: 5173637372a272790125e6af71576c6607adfef8\n" }, { "commit": "7b1641aa07729cdd551c7331523c813a8f703334", "tree": "49429065998e0c5e86c98be936dbc230d5b22279", "parents": [ "d9e8926ce6e94e15f5378e265ac3f695c9fd5dcc" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 12:54:52 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:01:13 2026 -0700" }, "message": "[SLP]Do not reuse internal gathers of splat subtrees as shuffle sources\n\nThe splat gather subtrees are speculative: the keep/drop check may\ndelete them and does not track reuse of their internal gathers by other\ngathers.\nSuch reuse inflated the reusing gather\u0027s cost (a shuffle of the\nsubtree\u0027s operand gather was charged even when a plain buildvector is\ncheaper), which distorted the main tree\u0027s trim decisions and dropped\nthe whole profitable tree instead of the unprofitable subtrees.\n\nFixes the perf regression from #220250.\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225456\n\nGitOrigin-RevId: 9a301518b5cc4f434267f5942aac522ea142b352\n" }, { "commit": "d9e8926ce6e94e15f5378e265ac3f695c9fd5dcc", "tree": "8829fcbfd0d5f15f2080baaae06e9ece2330bb15", "parents": [ "01fd999266c821943a1be011b8003fbd91f7f8af" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Tue Sep 22 17:51:41 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 10:00:09 2026 -0700" }, "message": "[SimplifyQuery] Include a context-function (NFC) (#225369)\n\nThe context-function logically belongs in SimplifyQuery, and this helps\nsimplify some code, and allows us to represent a context-function in the\nabsence of a context-instruction.\n\nGitOrigin-RevId: 070ac983e683aaaa22347bd3c37d1f8fdfe15d09\n" }, { "commit": "01fd999266c821943a1be011b8003fbd91f7f8af", "tree": "5299106ed0937642d0deafd419e01e5c56f185cc", "parents": [ "1b8c12802ab5a00ce969c0b9a0f1fc75b5d80278" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Tue Sep 22 17:47:21 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:55:08 2026 -0700" }, "message": "[SCEV] Rename FlagAny -\u003e FlagNone, NoWrapMask -\u003e FlagsMask (NFC) (#225431)\n\nThis is a mechanical renaming change, in preparation for extending the\nflags that SCEV can represent.\n\nSee also: #225179.\n\nGitOrigin-RevId: 45b6312f7f79454ac6bd2b3057d16c69d4db8371\n" }, { "commit": "1b8c12802ab5a00ce969c0b9a0f1fc75b5d80278", "tree": "b66da7df0227234e5e1b4c6bb18a6ea26c5255f0", "parents": [ "b32029f230c1baaa43ced395161220dfbc2049c2" ], "author": { "name": "Craig Topper", "email": "craig.topper@sifive.com", "time": "Tue Sep 22 09:37:07 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:49:45 2026 -0700" }, "message": "[RISCV] Remove redundant check for Subtarget.hasStdExtZbc(). NFC (#225152)\n\nZbc implies Zbkc so we only need to check Zbkc.\n\nGitOrigin-RevId: 01f11fe1c5e215e886a7bcb9bf081fbcac8fe8b5\n" }, { "commit": "b32029f230c1baaa43ced395161220dfbc2049c2", "tree": "6ea04ac6631138443b232d0c772e1dfbf6edb0bd", "parents": [ "781bdb1ff9afad91d4d313b1fc2173bee2651ae9" ], "author": { "name": "Chinmay Deshpande", "email": "chdeshpa@amd.com", "time": "Tue Sep 22 09:31:58 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:42:18 2026 -0700" }, "message": "[AMDGPU] Add `getLDSEncodingGranule` to TargetParser (#224852)\n\nModel LDS encoding granularity with dedicated features and expose the\nbyte-valued `getLDSEncodingGranule` query for GPUKind and subarch.\n\nMigrate program resource register and PAL metadata encoding to the new\nquery and remove `getLdsDwGranularity` from `AMDGPUBaseInfo`\n\n---\n\nThis PR is inspired by https://github.com/llvm/llvm-project/pull/219495.\n\n\u003e The AMDGPU backend uses the wrong LDS allocation granularity when\ncomputing occupancy for RDNA 2 targets starting from GFX10.3. The\ncurrent value is correct for the PAL metadata, but leads to wrong\noccupancy calculations as observed by users.. The values correspond to\nthe Mesa implementation, see\nhttps://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/amd/common/ac_shader_util.h#L355.\n\nGitOrigin-RevId: 743e1b5d194ad0ee9a55a05d52e3756a67ae2f99\n" }, { "commit": "781bdb1ff9afad91d4d313b1fc2173bee2651ae9", "tree": "4d0b29ededa0ade5422d29da1607bdc2215ed215", "parents": [ "00bb34b11f5e0dd06572ef9e78a684687d0ae048" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 12:18:17 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:28:13 2026 -0700" }, "message": "[SLP][NFC]Add a test with a missed vectorization, NFC\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225448\n\nGitOrigin-RevId: 660bffb059baf346bf7baf92fde96d05d1b99b39\n" }, { "commit": "00bb34b11f5e0dd06572ef9e78a684687d0ae048", "tree": "3706a18115ecc3b20be6a410e1dd76b447acfc5f", "parents": [ "6a126fa7fecefb17d1e832c0ab833279abf13404" ], "author": { "name": "Steven Wu", "email": "stevenwu@apple.com", "time": "Tue Sep 22 09:18:08 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:26:53 2026 -0700" }, "message": "[llvm][Support] Make sys::fs::file_t into a seperate type (#224859)\n\nGitOrigin-RevId: ae82b85123a2271df24ceb28c09a2a0c467c16d5\n" }, { "commit": "6a126fa7fecefb17d1e832c0ab833279abf13404", "tree": "1673e2fb386246187611ce16dd2316e2f59716f7", "parents": [ "9275aa6d809167e02f5866eb16b7cd29ccf54b37" ], "author": { "name": "Luke Kiernan", "email": "lkiernan@nlr.gov", "time": "Tue Sep 22 11:17:08 2026 -0500" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:25:01 2026 -0700" }, "message": "[TLI][Darwin] Add mappings for 16 more libsystem_m vector functions (#224792)\n\nThe Darwin_libsystem_m veclib table mapped 17 of the 38 stems exported\nby libsystem_m.dylib. This adds 16 more, in both VecFuncs.def and the\nDARWIN_LIBSYSTEM_M_VECFUNCS defset, bringing it to 33.\n\nThe remaining 5 are round, fma, fmod, sincos and sincospi; see #223283\nfor why each is skipped or deferred.\n\nFixes #223283\n\nGitOrigin-RevId: 9d856cff47c48934b89254beef71908998a3c193\n" }, { "commit": "9275aa6d809167e02f5866eb16b7cd29ccf54b37", "tree": "6d1b395efef9583e62d6983eaeff37f21392e657", "parents": [ "f3765ecc9d42ee005db39caa933053cec6876c3b" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Tue Sep 22 17:55:08 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:08:25 2026 -0700" }, "message": "DAG: Preserve poison in some cast folds (#225403)\n\nGitOrigin-RevId: efec7984808669b2dc75fbfab7664658ff45f74a\n" }, { "commit": "f3765ecc9d42ee005db39caa933053cec6876c3b", "tree": "45171e2541aa6495211d76c0c8c9551a9239fc2e", "parents": [ "723bd21e23c17d9ad06bf60229eed2ef6525b86d" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 16:48:47 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:02:29 2026 -0700" }, "message": "[VPlan] Add more generic VPCostContext::getCostDivisor (NFC). (#225413)\n\nReplace getReplicateRegionCostDivisor with more general getCostDivisor,\nwhich takes a frequency directly.\n\nThe frequency lookup is now done at the 3 call sites, which all have the\nregion at hand.\n\nWill also be used in https://github.com/llvm/llvm-project/pull/196845.\n\nPR: https://github.com/llvm/llvm-project/pull/225413\nGitOrigin-RevId: 4790b21292d10b2cab1037ebef100e7f595e4209\n" }, { "commit": "723bd21e23c17d9ad06bf60229eed2ef6525b86d", "tree": "06fe1d5d274be20e47fd67c6becc2f6f2459fc96", "parents": [ "10c73af87e85e97ae51192e55c9f78338ffc3f7b" ], "author": { "name": "Simon Pilgrim", "email": "llvm-dev@redking.me.uk", "time": "Tue Sep 22 16:46:37 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 09:00:53 2026 -0700" }, "message": "[X86] sse2-intrinsics-x86-upgrade.ll - cleanup bitrotted check prefixes (#225426)\n\nRemoved leftover SKX and AVX2 check prefixes - the update script only\nremoves unused check lines mentioned in the RUNs\n\nGitOrigin-RevId: bc6fd4611aa8383e8004e731211666fd14984181\n" }, { "commit": "10c73af87e85e97ae51192e55c9f78338ffc3f7b", "tree": "78102c6e906bf8a27d362b49c48964b13d4e95b6", "parents": [ "f9ab2c73272e72906f2d27c29a319e64e3a23a2c" ], "author": { "name": "sujianIBM", "email": "Jian.Su@ibm.com", "time": "Tue Sep 22 11:43:07 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:53:25 2026 -0700" }, "message": "SelectionDAG: Don\u0027t pad the source of ADDRSPACECAST if it\u0027s legal. (#225390)\n\nWith this use case `%out \u003d addrspacecast \u003c2 x ptr\u003e %in to \u003c2 x ptr\naddrspace(1)\u003e` on z/OS, the res type is `v2i32` (illegal) and the source\ntype is `v2i64` (legal).\nPadding the source up to `v4i64` makes it illegal on z/OS and breaks the\ntype legalization.\n\nGitOrigin-RevId: c02724354985f8326d1cee4d5c491b71514ea485\n" }, { "commit": "f9ab2c73272e72906f2d27c29a319e64e3a23a2c", "tree": "9d005d1c52ad781f95eb7278384122a6b57901ff", "parents": [ "21d3efacda18a4141c82200d59b6b8a55d223b98" ], "author": { "name": "Kazu Hirata", "email": "kazu@google.com", "time": "Tue Sep 22 08:36:55 2026 -0700" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:45:27 2026 -0700" }, "message": "[llvm] Remove declarations without definitions (NFC) (#225320)\n\nDataRecordHandle::create and DataRecordHandle::construct in\nllvm/lib/CAS/OnDiskGraphDB.cpp: The unused definitions were removed on\nNovember 24, 2025 in commit f21857313dfab543e66ef43b1aed43b685794a7c.\n\ndwarf_linker::parallel::DwarfEmitterImpl::emitStringsImpl in\nllvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.h: Added on May 20, 2023\nin commit 5f2a7fa67e9b6081a1a750ecea1216d53287eaa0 without a definition\nor any callers (only DWARFLinkerImpl::emitStringsImpl was defined).\n\ndwarf_linker::parallel::SyntheticTypeNameBuilder::addOrderedName\n(2-argument overload) in\nllvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.h: Added on\nNovember 23, 2023 in commit b61ac4a88f934ab5c02ee2a4957fb1b9943e7a5d\nwithout a definition or any callers.\n\npdb::GSIHashStreamBuilder::finalizePublicBuckets and\npdb::GSIHashStreamBuilder::finalizeGlobalBuckets in\nllvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp: Added on June 4,\n2020 in commit b7402edce3150591df03b7352fdcb3336098d603 without\ndefinitions or any callers (only the corresponding methods on\nGSIStreamBuilder were defined).\n\njitlink::COFFLinkGraphBuilder::getPointerSize and\njitlink::COFFLinkGraphBuilder::getEndianness in\nllvm/lib/ExecutionEngine/JITLink/COFFLinkGraphBuilder.h: The definitions\nand callers were removed on January 14, 2025 in commit\n4eaff6c58ae2f130ac8d63cf2c87bbb483114876.\n\njitlink::MachOLinkGraphBuilder::getPointerSize and\njitlink::MachOLinkGraphBuilder::getEndianness in\nllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h: The\ndefinitions and callers were removed on January 14, 2025 in commit\n4eaff6c58ae2f130ac8d63cf2c87bbb483114876.\n\nEPCIndirectStubsManager::deallocateStubs in\nllvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp: Added on July 16,\n2020 in commit 0e940d55f8a9388c42cc5998ea05212a983f05a7 without a\ndefinition or any callers.\n\nRuntimeDyldCheckerImpl::lookup and\nRuntimeDyldCheckerImpl::getSectionLoadAddress in\nllvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCheckerImpl.h: The\ndefinitions and callers were removed on April 8, 2019 in commit\n941f247d30c447903107aa614ea46fb1e4019698.\n\nobjcopy::macho::MachOReader::readCodeSignature in\nllvm/lib/ObjCopy/MachO/MachOReader.h: The definition and caller were\nremoved on October 26, 2021 in commit\na299b24712ccd0769ffa0d5b65cbc98211fd4d99.\n\nTGParser::ParseOptionalBitList in llvm/lib/TableGen/TGParser.h: The\ndefinition and caller were removed on March 19, 2026 in commit\nd29c6a34255e635b8ad794d21cdd0a2ed8820b68.\n\nLoopIdiomVectorize::runOnCountableLoop in\nllvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp: Added on June 7,\n2024 in commit 37e309f1635404bfca029c3712ee227a892cd4cf without a\ndefinition or any callers.\n\nAssisted-by: Antigravity\nGitOrigin-RevId: 0a7c62a841eeb396de07cee74c79969af8848535\n" }, { "commit": "21d3efacda18a4141c82200d59b6b8a55d223b98", "tree": "d53bd4c13456d0515c10423415805af83b58407e", "parents": [ "df334d6979f13f71df9b7e939af2a09c2a971fe7" ], "author": { "name": "Amit Tiwari", "email": "Amit.Tiwari@amd.com", "time": "Tue Sep 22 20:47:31 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:37:35 2026 -0700" }, "message": "[Clang][OpenMP] Add `#pragma omp flatten` loop directive + `depth` clause (#206977)\n\nAdds the OpenMP 6.1: `Flatten Construct` + `depth Clause`.\nReferred in Section 17.4 and Section 6.4.7 respectively in [Technical\nReport 15](https://www.openmp.org/wp-content/uploads/openmp-TR15.pdf)\n\nGitOrigin-RevId: fd016b7d24d3a2ddabef9e1ebfc702885e9bb7c1\n" }, { "commit": "df334d6979f13f71df9b7e939af2a09c2a971fe7", "tree": "754ba6daecceca2988863aae3746506076d7d2e8", "parents": [ "83764d90a89ab1b7df6ca7cad097b37ffc65d3b0" ], "author": { "name": "Nico Weber", "email": "thakis@chromium.org", "time": "Tue Sep 22 10:55:28 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:29:39 2026 -0700" }, "message": "[gn build] Port d0dc3b038f52 (#225422)\n\nGitOrigin-RevId: 3632f15ecb2af4a0e8f4d9bd6121cd2537e176ae\n" }, { "commit": "83764d90a89ab1b7df6ca7cad097b37ffc65d3b0", "tree": "c573b151fdf6d899b6b289f76c2ed3e5590e4db7", "parents": [ "1374127ba11c00ceec54418eb2142cbd958555a7" ], "author": { "name": "Tim Gymnich", "email": "tim@gymni.ch", "time": "Tue Sep 22 16:55:02 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:28:06 2026 -0700" }, "message": "[GlobalISel] Add KnownFPClass printer pass (#225402)\n\nAdds a dedicated print\u003cgisel-value-tracking-fpclass\u003e machine-function\npass.\n\nMost KnownFPClassTest.cpp cases are migrated to MIR tests. The remaining\nunit test covers a signaling-NaN-specific query that the printer cannot\nrepresent.\n\nAssisted by: gpt-5.6-sol\n\nGitOrigin-RevId: 615b63316c17bc7f701f504f00e8e1b3303ea9d8\n" }, { "commit": "1374127ba11c00ceec54418eb2142cbd958555a7", "tree": "83475b4b92178695d77e5265cf0d20e8eb360e3a", "parents": [ "48127389652a8f239c59faa2e2e943894b56bad5" ], "author": { "name": "Nico Weber", "email": "thakis@chromium.org", "time": "Tue Sep 22 10:54:43 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:26:34 2026 -0700" }, "message": "[gn build] Port 3eaddb5735f6 (#225420)\n\nGitOrigin-RevId: c109662a4cc336000f85032a8b183b206b9b1196\n" }, { "commit": "48127389652a8f239c59faa2e2e943894b56bad5", "tree": "691812b832d059fc98a7a1512ee9579517ee27de", "parents": [ "63283abf99a09c5dd4450b466fd5423bc69aff72" ], "author": { "name": "Nico Weber", "email": "thakis@chromium.org", "time": "Tue Sep 22 10:54:19 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:24:58 2026 -0700" }, "message": "[gn] add dep required by #224284 (#225419)\n\nGitOrigin-RevId: 684e2024376f0fdcba7496faa3dddc97cc0b764c\n" }, { "commit": "63283abf99a09c5dd4450b466fd5423bc69aff72", "tree": "bc12b44e4f9739c991571a14387a20ebe06572bf", "parents": [ "d837d82a8db8bb70dfbce7c4133ead92104cbce2" ], "author": { "name": "Alexis Engelke", "email": "engelke@in.tum.de", "time": "Tue Sep 22 16:52:38 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 08:23:17 2026 -0700" }, "message": "[CMake] Enable ccache depend mode when PCH is enabled (#225118)\n\nccache with PCH sometimes falls back to the preprocessor mode even when\nusing Clang. Enable ccache\u0027s \"depend mode\" to only rely on dependencies\nas emitted by the compiler when PCH is enabled.\n\nThis requires moving the ccache logic to HandleLLVMOptions.cmake, as\nwhether PCH is enabled now impacts the ccache options. While moving,\nalso deduplicate the ccache+Clang detection logic and bundle all\nPCH-related configurations together.\n\nTo ease debugging the ccache configuration, print the ccache command and\noptions as cmake output.\n\nFixes https://github.com/llvm/llvm-project/issues/225047.\n\nSee: https://github.com/ccache/ccache/issues/1686\nGitOrigin-RevId: 0df26b857065991b50725ca85f7a8728c60ceea9\n" }, { "commit": "d837d82a8db8bb70dfbce7c4133ead92104cbce2", "tree": "426419b305dffc6880426ffa132b5923b769f40c", "parents": [ "fedd087e22f662cf7c26cf7c1889d4d435b4755c" ], "author": { "name": "Arseniy Obolenskiy", "email": "arseniy.obolenskiy@amd.com", "time": "Tue Sep 22 16:30:35 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:40:32 2026 -0700" }, "message": "[SPIR-V][NewPM] Do not require RegBankSelect in instruction selection (#225023)\n\nSPIR-V skips RegBankSelect and keeps virtual registers, so the property\nis never set\n\nMatch the legacy pipeline\n\nGitOrigin-RevId: abecf784ec30bce9d9163bd2e0d14c4a70094045\n" }, { "commit": "fedd087e22f662cf7c26cf7c1889d4d435b4755c", "tree": "6115318b1b87febed52a3c40934af622bcf17d46", "parents": [ "ca15b1431e17b7fffa3e20305b5e19d95407b82c" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 10:28:36 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:35:02 2026 -0700" }, "message": "[SLP]Fix crash costing minbw-resized splat gather subtree roots\n\nSplat gather subtree roots have no parent entry, but the min-bitwidth\nresize-cost block assumed every non-root node has one and dereferenced\na null user. Charge the resize-back cast to the node\u0027s original scalar\ntype instead, matching the cast emitted when the reusing gather nodes\nconsume the resized vector.\n\nFixes https://github.com/llvm/llvm-project/pull/218250#issuecomment-5776455495\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225410\n\nGitOrigin-RevId: 70125c825468688465a4319273efd3c2a0373b91\n" }, { "commit": "ca15b1431e17b7fffa3e20305b5e19d95407b82c", "tree": "8d22d3a02273ff3729b03a25cafcdc6e58ba156e", "parents": [ "ad46b93a7a2c0e775d261cfe7642ca7e0476eb2c" ], "author": { "name": "Domenic Nutile", "email": "domenic.nutile@gmail.com", "time": "Tue Sep 22 10:12:13 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:22:16 2026 -0700" }, "message": "[AMDGPU] Unify liveness guard to prevent SCC clobber in frame index lowering in scaling path (#223789)\n\neliminateFrameIndex has two lowering strategies, but only one has the\nproper handling for checking SCC-liveness to prevent clobbering. Unify\nthem with a helper function to ensure both paths handle the same\n\nGitOrigin-RevId: d74c1b77c61492ef6c5dc95bcd2b23685509379b\n" }, { "commit": "ad46b93a7a2c0e775d261cfe7642ca7e0476eb2c", "tree": "9124840df4ddbf5f1ca8d5ba1f53cae6812896d8", "parents": [ "5dd6cdc7b872ecdd9828511d046b73e5e6bce314" ], "author": { "name": "Stefan Gränitz", "email": "stefan.graenitz@gmail.com", "time": "Tue Sep 22 16:03:47 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:15:36 2026 -0700" }, "message": "[llvm][test] Small fixes around CGTestPlugin (NFC) (#225362)\n\nWe use `LLVM_ENABLE_PLUGINS` as condition to run the unit-tests in\nCGPluginTest, but we used to built the required plugin under `NOT WIN32\nAND NOT CYGWIN`. These only happened to be equivalent. This patch guards\nthe entire folder under `LLVM_ENABLE_PLUGINS`. It also moves the related\nLIT test to Feature/codegen-plugin-legacy.ll and adds REQUIRES plugin.\n\nGitOrigin-RevId: cbab69595ca6f5a1c7296985e5555b8b45a35e55\n" }, { "commit": "5dd6cdc7b872ecdd9828511d046b73e5e6bce314", "tree": "44aa39c7f770c06c7e1171cdea075b71af93c68e", "parents": [ "1e523cd7d84c21a8ba32b2f3abece4079e668289" ], "author": { "name": "Simon Pilgrim", "email": "llvm-dev@redking.me.uk", "time": "Tue Sep 22 15:03:11 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:14:30 2026 -0700" }, "message": "[VectorCombine] foldShuffleOfIntrinsics - don\u0027t use I variable name for Index iteration. NFC. (#225394)\n\nShadows the Instruction \u0026I argument.\n\nNoticed in #182768\n\nGitOrigin-RevId: c76fd470ddd78d79d4e09ca6628c51bfff9475f5\n" }, { "commit": "1e523cd7d84c21a8ba32b2f3abece4079e668289", "tree": "b22b5e4af2f5ade70b3ca578b32d0e7ed7598946", "parents": [ "a4dbf9d4bfd927520123c5a702b99f978b8e4009" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Tue Sep 22 16:02:53 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:13:30 2026 -0700" }, "message": "AMDGPU: Use subarch triples in uniformity analysis tests (#225386)\n\nGitOrigin-RevId: 44509a1d80b314b725b56ad3174545b1f4ddde35\n" }, { "commit": "a4dbf9d4bfd927520123c5a702b99f978b8e4009", "tree": "601f3f3c6c28128b586545b63e2ae5f63df49730", "parents": [ "286c200cc547894b605fe75b298e112bcbc11894" ], "author": { "name": "Łukasz Plewa", "email": "lukasz.plewa@intel.com", "time": "Tue Sep 22 15:54:20 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:02:32 2026 -0700" }, "message": "[offload] add context to olMemAlloc* (#224930)\n\nThis is the last part of the context refactor. This patch:\n - Adds context param to all memory allocation functions.\n - Routes ptr info through the plugins instead of a global map.\n - Removes allocation tracking from liboffload.\n- olGetMemInfo(OL_MEM_INFO_DEVICE) now returns INVALID_ARGUMENT for host\n allocations, which have no per-device affinity.\n\nRe-land of #222677 + #224622, which were reverted together in #224703.\n\nAssisted-by: Claude Opus 4.7\nGitOrigin-RevId: 355b371c0b15e5c5bf29459342a64d5487231500\n" }, { "commit": "286c200cc547894b605fe75b298e112bcbc11894", "tree": "7313265d33c55254b19dc4fec5d57c2433957b62", "parents": [ "0d04be7b5ced1a4364e43b56d68f12f3d828c42b" ], "author": { "name": "Jonathan Thackray", "email": "jonathan.thackray@arm.com", "time": "Tue Sep 22 14:31:03 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 07:01:01 2026 -0700" }, "message": "[AArch64] Prevent reuse of retired architecture names (#221782)\n\nAdd negative tests preventing reuse of retired feature and system register names.\n\nWhen system registers or feature names are retired, they should be appended to\nthis file, to ensure they\u0027re never re-used in future. `FEAT_MPAMv2` and `FEAT_TME`\nare the two features which have been intentionally retired so far.\n\nGitOrigin-RevId: 55676019676cae0565d8771252f05bc2a222a0a0\n" }, { "commit": "0d04be7b5ced1a4364e43b56d68f12f3d828c42b", "tree": "52cc0d5c2a69796c9a488e28b21e9976a769d242", "parents": [ "fe3739a4c0cfeae0c5c383d2373ed6a8e649f33a" ], "author": { "name": "Igor Wodiany", "email": "igor.wodiany@amd.com", "time": "Tue Sep 22 14:26:05 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 06:34:53 2026 -0700" }, "message": "[CodeGen] Prevent potential multiplication overflow (#224665)\n\nThis fixes a number of issues reported by a CodeQL scan in the `CodeGen`\ndirectory.\n\nGitOrigin-RevId: a9fe7a5e5fbc96c15f929ffd313215752bd0d36e\n" }, { "commit": "fe3739a4c0cfeae0c5c383d2373ed6a8e649f33a", "tree": "5e5e06e12ad428fd547a2dba1d9c393e8a6ff8d8", "parents": [ "fcad6d6e03fdde282038eed26f52056eb773cb88" ], "author": { "name": "Matt Davis", "email": "mattd@nvidia.com", "time": "Tue Sep 22 09:14:57 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 06:27:26 2026 -0700" }, "message": "[Dwarf] Don\u0027t crash in dwarf::isC() on vendor-defined languages (#223739)\n\nisC() enumerates SourceLanguage and falls off the end of the switch into\nllvm_unreachable(\"Unknown language kind.\"). DW_LANG_lo_user and\nDW_LANG_hi_user are both explicit cases, but every vendor-defined code\nstrictly between them is not, so any of them aborts an asserts-enabled\nbuild.\n\nAssisted-by: LLM\n\n---------\n\nCo-authored-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 565f3f73eef2220bfa80a1894bab29fd6e579a2d\n" }, { "commit": "fcad6d6e03fdde282038eed26f52056eb773cb88", "tree": "c393f032e1e776772b7b8d4035db8cd955e5edef", "parents": [ "9fa1bead2b6426b03f9ef5f3fd1d8d4d4c4b48e1" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Tue Sep 22 15:06:04 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 06:16:49 2026 -0700" }, "message": "llvm-extract: Fix not verifying input file (#225378)\n\nCopy the behavior from opt, and add a -disable-verify flag.\n\nGitOrigin-RevId: 5752fb836ad4beb66316fb87825257072d677d1e\n" }, { "commit": "9fa1bead2b6426b03f9ef5f3fd1d8d4d4c4b48e1", "tree": "25d22bd45c263a0340a7b0a0d8b049f7c61435ea", "parents": [ "cce6867dea1d42076ea879798f2cdfc720839ea9" ], "author": { "name": "Abhina Sree", "email": "Abhina.Sreeskantharajan@ibm.com", "time": "Tue Sep 22 08:52:51 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 05:58:03 2026 -0700" }, "message": "[lit] Use text mode when opening text files on z/OS (#217434)\n\nOn z/OS, we rely on autoconversion to read files correctly, and this\nrequires files to be opened as text.\n\nThe following change https://github.com/llvm/llvm-project/pull/208024\nchanged the streams to be read and piped as binary resulting in some\ntest regressions due to unreadable output. This patch restores the\nfunctionality of opening and reading as a text stream.\n\nGitOrigin-RevId: 25aac605a4f1fc72bd1dcf0bb8d64fbfe2db3aa9\n" }, { "commit": "cce6867dea1d42076ea879798f2cdfc720839ea9", "tree": "36d15cb84a6878fee4281b76ae03600e8c0cd50e", "parents": [ "37e1e51e6a6f3b3a3ddbfac82fd794f2ce157869" ], "author": { "name": "Nikita Popov", "email": "npopov@redhat.com", "time": "Tue Sep 22 14:33:36 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 05:40:23 2026 -0700" }, "message": "[IR] Add ConstantExpr::getGetElementPtr() accepting DataLayout (#224652)\n\nThis overload takes GEP indices but produces a canonical i8 GEP in\nptradd representation. This is intended as a simple migration path for\nplaces currently using `ConstantExpr::getGetElementPtr()` which cannot\nbe trivially replaced by `ConstantExpr::getPtrAdd()`.\n\nThis method is fallible, because something like `(getelementptr i32, ptr\n@p, i64 CONST_EXPR)` can\u0027t be represented in ptradd form, because there\nis no multiply constant expression. Not supporting this for constant\nexpressions is intentional, as we would not be able to emit a\nrelocatable expression for this anyway.\n\nI have migrated a couple of sample usages in this PR. These are all\nsimple usages where the fallibility is not relevant.\n\nThe further plan here is to migrate everything (including IRBuilder) to\nthis new API, and then deprecated the one without the DataLayout\nargument.\n\nGitOrigin-RevId: c3ea7c1fc5e9b5ef9c637fb9522a44c21d413a6d\n" }, { "commit": "37e1e51e6a6f3b3a3ddbfac82fd794f2ce157869", "tree": "f5a473f007de484dd0bd17e1769adc202a05ee3a", "parents": [ "625975fd35dfbe500b70025ce707cf9fa561fc89" ], "author": { "name": "tfzee", "email": "tim.ziegler@intel.com", "time": "Tue Sep 22 13:58:18 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 05:10:06 2026 -0700" }, "message": "[X86] Fix null dereference in optimizeCompareInstr after lzcnt/tzcnt (#224282)\n\n#210069 added `LTZCNTInst` to the exit condition of the backward scan of\n`optimizeCompareInstr()`:\n\n```c++\n if (MI || Sub || LTZCNTInst)\n break;\n```\n\nbut it assigns `MI \u003d LTZCNTInst` only inside the *forward* scan\u0027s\n\"EFLAGS is\nused by this instruction\" branch. When the forward scan never reaches\nthat\nbranch, both `MI` and `Sub` stay null.\nHowever later code was built on the idea that one of them is not null.\n\nAdded a MIR test that would crash before but gets fixed by this\nadditional check.\n\nUsed AI for code review and comment/PR/test formatting/writing\n\nGitOrigin-RevId: aff1ba103ab3006242c72af33420a3437f4ff1db\n" }, { "commit": "625975fd35dfbe500b70025ce707cf9fa561fc89", "tree": "83dacf81011d32c74bbc93e2dd47e9edd62bbebf", "parents": [ "386a947ab682cf669c80284e92aacd30403f6fab" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 07:43:33 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 05:09:21 2026 -0700" }, "message": "[SLP]Fix APInt assertion in emitReusedOps for narrow types\n\nThe repeat count of a reused scalar may not fit the reduction element\ntype (e.g. count 2 in i1), tripping the APInt isUIntN assertion when\nbuilding the to-mul scale constant. Truncate the count to the element\nbitwidth; the modular reduction arithmetic keeps the result equivalent.\n\nFixes #225279\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225376\n\nGitOrigin-RevId: dc3d1a84aee26d1b23645f575d0e3e9130891a02\n" }, { "commit": "386a947ab682cf669c80284e92aacd30403f6fab", "tree": "6318265d049c13f1eb7a33310858ef1dde21d79f", "parents": [ "1873a77876e4ac930f67a8656d5f5d2e6308a0fc" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 07:32:41 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 04:39:45 2026 -0700" }, "message": "[SLP]Fix SCEV type mismatch when a checked base crosses a cross-width addrspacecast\n\ngetUnderlyingObject strips addrspacecast, so a base object can have a\ndifferent address type than the access pointer, mixing SCEV types in the\nbounds computation.\n\nFixes #225280\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225374\n\nGitOrigin-RevId: 50f8187e00356371353d03f9a27d5b2cf245ec55\n" }, { "commit": "1873a77876e4ac930f67a8656d5f5d2e6308a0fc", "tree": "8353a7447d5873052a4292da2fe3ec9c7b839233", "parents": [ "645c707441666495107b5d9a9284dc54d28130e1" ], "author": { "name": "Alexey Bataev", "email": "a.bataev@outlook.com", "time": "Tue Sep 22 07:16:13 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 04:24:56 2026 -0700" }, "message": "[SLP][NFC]Add/update tests for fma-based transfromations, NFC\n\nReviewers:\n\nPull Request: https://github.com/llvm/llvm-project/pull/225367\n\nGitOrigin-RevId: c8e0087998b94c57ff5031ad8107caf4b6f0b8d4\n" }, { "commit": "645c707441666495107b5d9a9284dc54d28130e1", "tree": "71adb1c0d4443c61bc4496c21da0106cc24f4e0a", "parents": [ "147738385069dfd3747c5bd8a8db62052e7bc1ef" ], "author": { "name": "Timur Golubovich", "email": "timur.golubovich@intel.com", "time": "Tue Sep 22 12:52:04 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 04:00:02 2026 -0700" }, "message": "[X86] Don\u0027t double count the interrupt stack alignment push in StackSize (#224029)\n\nemitPrologue pushes a slot to give an error-code handler the\nreturn-address parity the frame layout assumes, but StackSize counted\nthat push as well. NumBytes derives from StackSize, so the subq grew by\n8 too and left RSP at 8 mod 16 at every call. Object addresses are\nunchanged.\n\nFixes #44560, fixes #50195\n\n---------\n\nCo-authored-by: Claude Opus 5 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 031866ff849401f9f42c5fba1e9a84ece38dadbc\n" }, { "commit": "147738385069dfd3747c5bd8a8db62052e7bc1ef", "tree": "a38dcc9b977579ddf78e186a9c29a11e99967afe", "parents": [ "67193be551bb777fb67e9a65cd7f5de4abd5881e" ], "author": { "name": "Lang Hames", "email": "lhames@gmail.com", "time": "Tue Sep 22 20:45:29 2026 +1000" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 03:53:31 2026 -0700" }, "message": "[ORC] Remove unused rt_alt UnwindInfoManager CI names (#225329)\n\nThe rt_alt UnwindInfoManager register/deregister action names were added\nas a step towards supporting an \"ORC-runtime-lite\" API within LLVM, but\nhave not been used so far. This patch removes them, rather than leaving\nthem to drift. Replacements can be added as part of a coherent design\nwhen ORC-runtime-lite is revisited.\n\nGitOrigin-RevId: ac904273ae4dea5a447719cacf9fae952a7db0e1\n" }, { "commit": "67193be551bb777fb67e9a65cd7f5de4abd5881e", "tree": "68a5d4494201df5a5e9202f6e5e535c4cb6f80ee", "parents": [ "a10836ff99ebd101d47386eef47c5bad4a4175d5" ], "author": { "name": "Antonio Frighetto", "email": "me@antoniofrighetto.com", "time": "Tue Sep 22 12:44:12 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 03:49:31 2026 -0700" }, "message": "[BasicAA] Extend two-variable MinAbsVarIndex heuristic to different scales (#218639)\n\nWhen performing offset-based reasoning via the min abs heuristic, the\nexisting two-variables case requires equal absolute scaling factors.\nThis may be generalized to different scales by factoring the offset as\n`GCD*(C0*V0 - C1*V1)`, and relying on cached KnownBits to prove that the\ncofactor products differ.\n\nProof: https://alive2.llvm.org/ce/z/RC4LwD.\n\nCo-authored-by: Alex MacLean \u003camaclean@nvidia.com\u003e\nGitOrigin-RevId: 24fbe6a64a112c3ab90dab54e08969f2e2640436\n" }, { "commit": "a10836ff99ebd101d47386eef47c5bad4a4175d5", "tree": "692988bc9d9bb701d53d17e2c75e44d68d673689", "parents": [ "26f77f69f753213769cc9505552de6b268c5afd9" ], "author": { "name": "Chris Kennelly", "email": "ckennelly@ckennelly.com", "time": "Tue Sep 22 06:40:39 2026 -0400" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 03:48:43 2026 -0700" }, "message": "[AggressiveInstCombine] Fold low-bits mask table loads to arithmetic (#222509)\n\nRecognize a load from a constant \"low bits mask\" table\n\n```\n static const uintN_t tbl[K] \u003d { 0, 1, 3, 7, ... }; // tbl[j] \u003d\u003d (1 \u003c\u003c j) - 1\n ... x \u0026 tbl[i] ...\n```\n\nand replace the load with the equivalent arithmetic mask (1 \u003c\u003c i) - 1.\nThis is the target-independent form of the X86 combineAndLoadToBZHI DAG\ncombine: on X86 with BMI2 the surrounding and still selects to a single\nbzhi.\n\nAssisted-by: Claude Code\nGitOrigin-RevId: 394c8dd1493308cb9add77b18987aee2219a65c1\n" }, { "commit": "26f77f69f753213769cc9505552de6b268c5afd9", "tree": "ee6a6f79cb9c310a670ccc9d3aa0973014ab4afe", "parents": [ "b817e41a7af158a5e0ed11a87339d94247835432" ], "author": { "name": "Dmitry Sidorov", "email": "Dmitry.Sidorov@amd.com", "time": "Tue Sep 22 12:05:20 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 03:13:22 2026 -0700" }, "message": "[NFC][CostModel][X86] Add cost tests for vXi1 mask broadcasts (#225070)\n\nGitOrigin-RevId: 48cccbb8fec8f58ab1d0af449d4d231d53731d5e\n" }, { "commit": "b817e41a7af158a5e0ed11a87339d94247835432", "tree": "ac6ee828c3f5eb232004dc9a5c51c37a356fc515", "parents": [ "f6445386e38695dc9054541bf932c777501484cd" ], "author": { "name": "Benjamin Maxwell", "email": "benjamin.maxwell@arm.com", "time": "Tue Sep 22 10:45:11 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 02:55:05 2026 -0700" }, "message": "[LV] Pre-commit compressing pattern tests (NFC) (#225109)\n\nThis patch pre-commits tests for #214491.\n\nGitOrigin-RevId: f8e7ce4f4624daf1415f908d12e0415a83e26757\n" }, { "commit": "f6445386e38695dc9054541bf932c777501484cd", "tree": "554dbaad7fd4477a09f39f6dfb0cf4041e8752ad", "parents": [ "02c9b2914f2cd12bd0ca9b2425f2d23aedc2d136" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 10:28:06 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 02:43:37 2026 -0700" }, "message": "[SCEVExpander] Mark selects with unknown profile. (#224362)\n\nSCEVExpander creates selects when expanding min/max expressions for\npointers and predicates. In neither case there is any information on how\nlikely either arm of the select is. Annotate with unknown profile.\n\nThis is part of addressing the remaining profcheck failures in\nLoopVectorize: https://github.com/llvm/llvm-project/issues/161235.\n\nPR: https://github.com/llvm/llvm-project/pull/224362\nGitOrigin-RevId: 3bbfa7173bbfb0a231674822efb84a3e0b9f8c23\n" }, { "commit": "02c9b2914f2cd12bd0ca9b2425f2d23aedc2d136", "tree": "31871eee45f948a36d110743ab3677b682ecedb1", "parents": [ "cc57fe576c4ad6d6198041135124cb2edac7542b" ], "author": { "name": "oltolm", "email": "oleg.tolmatcev@gmail.com", "time": "Tue Sep 22 11:17:39 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 02:43:00 2026 -0700" }, "message": "[llvm-pdbutil] Avoid reading EC names from non-EC modules (#223253)\n\nThe module dumper resolves the PDB and source file name indices for\nevery module, even when the module does not contain Edit and Continue\ninformation. If the DBI stream has no EC names table, `dump --modules`\nfails with:\n\nUnexpected error processing modules: Stream Error: The stream is too\nshort\n to perform the requested operation.\n\nOnly resolve and print the EC names when the module\u0027s EC flag is set.\n\nGitOrigin-RevId: 977f915470ae98b3e7ee0fcb5555b773b31785a0\n" }, { "commit": "cc57fe576c4ad6d6198041135124cb2edac7542b", "tree": "ab9a8c0f110c37cb6a46b8e3c39d2f854f4ff914", "parents": [ "6ea6e86273f421e7ff848b6c77812435822b3cea" ], "author": { "name": "Milin Bhade", "email": "mbhade@amd.com", "time": "Tue Sep 22 14:35:54 2026 +0530" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 02:19:27 2026 -0700" }, "message": "[X86] Correct folded insert costs for partial vector loads (#220174)\n\nThe SLP vectorizer can form non-power-of-two trees, including width-3\ntrees, but relies on target costs to determine profitability: #194189\n\nX86 getMemoryOpCost overestimated non-power-of-two vector loads by\ncounting a folded PINSR*(mem) chunk as both a memory operation and a\nseparate lane insertion.\n\nRecognize non-0th folded load-insert chunks and charge each once.\nLeading sub-dword loads, stores, and 8-byte chunks remain unchanged.\n\nGitOrigin-RevId: 32531790756e61174d7bebb7c0543f643298f596\n" }, { "commit": "6ea6e86273f421e7ff848b6c77812435822b3cea", "tree": "696411489166f400107642599d8f06ad241ef7f4", "parents": [ "260b8a93d82184afa7d628a98020c0753dd7a675" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Tue Sep 22 11:04:42 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 02:18:16 2026 -0700" }, "message": "ARM: Don\u0027t duplicate the LR def when expanding call pseudos (#225062)\n\nSeveral pseudo expansions in ARMExpandPseudoInsts built a real call and then\ncopied the pseudo\u0027s operands onto the new instruction. Each of these call opcodes\ndeclares LR as an implicit-def, but the original instruction already had that. The original\ndef may have been marked as dead, so the result would be a redundant operand with an\ninconsistent dead flag. This avoids a failure in a future verifier check.\n\nCo-authored-by: Claude (Claude-Opus-4.8) \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: 34a505568ca0cf7c7f90c88964548856309b86c4\n" }, { "commit": "260b8a93d82184afa7d628a98020c0753dd7a675", "tree": "1a315285a4604ed2bac91fa418623e1d8583881c", "parents": [ "adef81c2a50bbca17834e82ab2b623b7f634ea4e" ], "author": { "name": "Marcin Radomski", "email": "marcin@mradomski.pl", "time": "Tue Sep 22 10:48:35 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:58:24 2026 -0700" }, "message": "[PromoteMemToReg] Hoist removeIntrinsicUsers into a pre-pass before promotion (#224617)\n\nCalling removeIntrinsicUsers(AI) inside the per-alloca promotion loop in\nPromoteMem2Reg::run() inserts StoreInst(undef) instructions into basic\nblocks after LargeBlockInfo (LBI) has already cached instruction indices\nfor those blocks during earlier iterations. Every subsequent\nLBI.getInstructionIndex query on newly inserted StoreInst(undef)\ninstructions misses in LBI.InstNumbers and triggers a full O(|BB|) basic\nblock rescan, resulting in O(K * |BB|) compilation time blowup in\npromoteSingleBlockAlloca when a basic block contains K scoped allocas.\n\nHoist removeIntrinsicUsers(AI) into a pre-pass loop over all Allocas\nupfront in PromoteMem2Reg::run() before the main AllocaNum promotion\nloop begins so all synthetic StoreInst(undef) instructions are inserted\nprior to LBI caching.\n\nAttached test verifies this PR doesn\u0027t change the behavior compared to\nHEAD.\n\nThis improves the compile time of some CUDA kernels\n(https://github.com/llvm/llvm-project/pull/191909#issuecomment-5569614846)\nby ~9x.\n\nAssisted-by: Gemini\nGitOrigin-RevId: 9073b4d71e9d66c495df5f6ec42ab0279326f762\n" }, { "commit": "adef81c2a50bbca17834e82ab2b623b7f634ea4e", "tree": "fa97d7e0b143d71b7794dfb1d61b740d905f2ee7", "parents": [ "67d575e4eeff49241ad31eb8a3f27e6d90d567e3" ], "author": { "name": "Ramkumar Ramachandra", "email": "artagnon@tenstorrent.com", "time": "Tue Sep 22 09:45:43 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:57:20 2026 -0700" }, "message": "[SCEV] Strip WrapPredicate::getImpliedFlags (NFC) (#225137)\n\nThe code in SCEVWrapPredicate::getImplied is dead, as we would never add\nan increment wrap-predicate to begin with, when the much stronger\ninvariant of nuw/nsw is available on the AddRec. This also strips the\nhasNoOverflow user.\n\nGitOrigin-RevId: 6efdb9fb181cfc7650773549f97935dc84efebd4\n" }, { "commit": "67d575e4eeff49241ad31eb8a3f27e6d90d567e3", "tree": "42c3fa199b0d1b3971f5a815ec5a5e1b17919f06", "parents": [ "e46c5237ce3850c6cd2de1e2626a0a706def22d7" ], "author": { "name": "Jack Styles", "email": "jack.styles@arm.com", "time": "Tue Sep 22 09:45:16 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:56:11 2026 -0700" }, "message": "[AArch64] Add costs of Promoted types for compressstore (#220257)\n\nWhen using SVE, types that are not 128bit widths will be promoted to be\nlegal SVE Types. Currently, when using\nllvm.masked.compressstore these types are marked as invalid for SVE Only\nbut these are legal types. Fixed width 128bit types are also excluded\nand would be enabled by this change.\n\nEnable these types whether they are promoted or legal types.\n\nGitOrigin-RevId: 8ce031e29bd3df7000f4e7dba9267d83d438ea81\n" }, { "commit": "e46c5237ce3850c6cd2de1e2626a0a706def22d7", "tree": "d8f558552a2966c986483dc52368f22952f552e8", "parents": [ "2596a4377cddcc946c9212d31c6919a5ad5b2830" ], "author": { "name": "Florian Hahn", "email": "flo@fhahn.com", "time": "Tue Sep 22 09:44:09 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:51:19 2026 -0700" }, "message": "[SCEVExpander] Keep use flags when expanding adds to GEPs (#225148)\n\nUpdate expandAddToGEP to accept and thread through operands as SCEVUse.\n\nThis properly use SCEVUse flags when expanding GEPs.\n\nPR: https://github.com/llvm/llvm-project/pull/225148\nGitOrigin-RevId: bdb05e67a787048a8e2da4c019c8cdabc44771e8\n" }, { "commit": "2596a4377cddcc946c9212d31c6919a5ad5b2830", "tree": "5aea8d82136d3eca55968db69ad0a586d6942b23", "parents": [ "fecaad19a1ded39211f371c1051f6ea283abbf36" ], "author": { "name": "Hadong Lee", "email": "hdchris765@snu.ac.kr", "time": "Tue Sep 22 17:42:28 2026 +0900" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:50:15 2026 -0700" }, "message": "[LoopLoadElim] Fix miscompile caused by incorrect store-to-load forwarding across mixed-width clobbers (#224833)\n\nWhen LoopLoadElimination finds a non-forwardable Store -\u003e Load\ndependence, it currently handles it with continue and drops it entirely.\nAlthough that store cannot provide a forwarded value itself, it may\npartially clobber the value of another forwarding candidate before the\ntarget load.\n\nThis change adds the load to LoadsWithUnsafeDependence when such a\ndependence is found, preventing forwarding for that load.\n\nThe tests cover zero-distance and non-zero-distance clobbers, including\nwhen a later full-width store overwrites the clobber.\n\nFixes #224832\n\nGitOrigin-RevId: b9f108134ca91564e2319ad391904b46fe5af33c\n" }, { "commit": "fecaad19a1ded39211f371c1051f6ea283abbf36", "tree": "1c00cdf52339fa4edb9e649401b2fe5862970e4f", "parents": [ "2d4a1bec6de260afabbf7f343fa0690f863016e0" ], "author": { "name": "Matt Arsenault", "email": "Matthew.Arsenault@amd.com", "time": "Tue Sep 22 10:35:36 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:44:42 2026 -0700" }, "message": "ARM: Track CPSR liveness in Thumb2SizeReduction without kill flags (#223068)\n\nThumb2SizeReduction narrows a 32-bit instruction to its flag-setting\n16-bit form only when CPSR is dead afterwards. It determined this from\nkill flags on CPSR operands. Kill flags have been semi-deprecated\nfor over a decade, so avoid relying on them. Liveness should be\nevaluated as a reverse walk over a block.\n\nThe existing forward walk over the block is still necessary as a\nseparate step for the different A9 avoidCPSRPartialUpdate optimization.\n\nCo-Authored-By: Claude claude-opus-4.8 \u003cnoreply@anthropic.com\u003e\nGitOrigin-RevId: d7750af92b0b0df0eb4e77f82b47f9e93f29b7b1\n" }, { "commit": "2d4a1bec6de260afabbf7f343fa0690f863016e0", "tree": "039356fda28b3d028c63b8df4d25b1d5fbd9b93f", "parents": [ "9c5dfd9462c9bc0773507864a8023e16f9191e94" ], "author": { "name": "Jonas Paulsson", "email": "paulson1@linux.ibm.com", "time": "Tue Sep 22 10:26:06 2026 +0200" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:31:53 2026 -0700" }, "message": "[TypeSanitizer] Properly add ext attributes on arguments where needed. (#224366)\n\nThe TypeSanitizer should add extension attributes to arguments when inserting\ninstrumented calls.\n\nThis also adds getExtAttrForBoolParam() (and initBoolExtensionsForTriple()) in\nTargetLibraryInfo.\n\nGitOrigin-RevId: b2ccaab8ea618082b73d23201963dce0a1c03937\n" }, { "commit": "9c5dfd9462c9bc0773507864a8023e16f9191e94", "tree": "072ec4740923c110b06351687b49990d20d28536", "parents": [ "d09dc71d0e9832b9e247a709834a7ba967052ae3" ], "author": { "name": "Simon Pilgrim", "email": "llvm-dev@redking.me.uk", "time": "Tue Sep 22 08:50:07 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 01:00:36 2026 -0700" }, "message": "[X86] Move PSHUF(SHIFT(X,C0),C1) -\u003e SHIFT(PSHUF(X,C1),C0) to canonicalizeShuffleWithOp (#225313)\n\nNo need for this to be in combineTargetShuffle, and we can generalize it\nto work with more shuffles in a future patch.\n\nGitOrigin-RevId: 44c4c0220a09a1468c04d9d8319197a078dfbe3b\n" }, { "commit": "d09dc71d0e9832b9e247a709834a7ba967052ae3", "tree": "081b5badc7c0b06353bbd06c81d659f1273ac700", "parents": [ "28c4837604ee86019d99cd77de79c6a555b304af" ], "author": { "name": "David Green", "email": "david.green@arm.com", "time": "Tue Sep 22 08:42:33 2026 +0100" }, "committer": { "name": "Copybara-Service", "email": "copybara-worker@google.com", "time": "Tue Sep 22 00:51:13 2026 -0700" }, "message": "[AArch64] Fix position of nop inserted for +fix-cortex-a53-835769 under debug. (#224830)\n\nMake sure that the position of the nop added for +fix-cortex-a53-835769\nis not dependant on debug instructions at the start of the block.\n\nFixes #224661\n\nGitOrigin-RevId: 2ccc678a64ecd52eace68e363f4d47935a56fb57\n" } ], "next": "28c4837604ee86019d99cd77de79c6a555b304af" }