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RISCV
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GlobalISel/
intrinsics/
rvv/
add-before-shl.ll
add-imm.ll
addc-adde-sube-subc.ll
addcarry.ll
addimm-mulimm.ll
addrspacecast.ll
aext-to-sext.ll
align-loops.ll
align.ll
alloca.ll
alu16.ll
alu32.ll
alu64.ll
alu8.ll
analyze-branch.ll
and.ll
arith-with-overflow.ll
atomic-cmpxchg-branch-on-result.ll
atomic-cmpxchg-flag.ll
atomic-cmpxchg.ll
atomic-fence.ll
atomic-load-store.ll
atomic-rmw.ll
atomic-signext.ll
attributes.ll
bitreverse-shift.ll
bittest.ll
blockaddress.ll
branch-relaxation.ll
branch.ll
bswap-bitreverse.ll
bswap-shift.ll
byval.ll
callee-saved-fpr32s.ll
callee-saved-fpr64s.ll
callee-saved-gprs.ll
calling-conv-half.ll
calling-conv-ilp32-ilp32f-common.ll
calling-conv-ilp32-ilp32f-ilp32d-common.ll
calling-conv-ilp32.ll
calling-conv-ilp32d.ll
calling-conv-ilp32f-ilp32d-common.ll
calling-conv-lp64-lp64f-common.ll
calling-conv-lp64-lp64f-lp64d-common.ll
calling-conv-lp64.ll
calling-conv-rv32f-ilp32.ll
calling-conv-sext-zext.ll
calling-conv-vector-float.ll
calls.ll
cmp-bool.ll
codemodel-lowering.ll
compress-float.ll
compress-inline-asm.ll
compress.ll
copy-frameindex.mir
copysign-casts.ll
ctlz-cttz-ctpop.ll
disable-tail-calls.ll
disjoint.ll
div-by-constant.ll
div-pow2.ll
div.ll
div_minsize.ll
double-arith-strict.ll
double-arith.ll
double-bitmanip-dagcombines.ll
double-br-fcmp.ll
double-calling-conv.ll
double-convert-strict.ll
double-convert.ll
double-fcmp-strict.ll
double-fcmp.ll
double-frem.ll
double-imm.ll
double-intrinsics-strict.ll
double-intrinsics.ll
double-isnan.ll
double-mem.ll
double-previous-failure.ll
double-round-conv-sat.ll
double-round-conv.ll
double-select-fcmp.ll
double-stack-spill-restore.ll
dwarf-eh.ll
early-clobber-tied-def-subreg-liveness.ll
early-clobber-tied-def-subreg-liveness.mir
eh-dwarf-cfa.ll
elf-preemption.ll
exception-pointer-register.ll
fastcc-float.ll
fastcc-int.ll
fixed-vectors-vadd-vp-mask.ll
fixed-vectors-vmul-vp-mask.ll
fixed-vectors-vsub-vp-mask.ll
fixups-diff.ll
fixups-relax-diff.ll
float-arith-strict.ll
float-arith.ll
float-bit-preserving-dagcombines.ll
float-bitmanip-dagcombines.ll
float-br-fcmp.ll
float-convert-strict.ll
float-convert.ll
float-fcmp-strict.ll
float-fcmp.ll
float-frem.ll
float-imm.ll
float-intrinsics-strict.ll
float-intrinsics.ll
float-isnan.ll
float-mem.ll
float-round-conv-sat.ll
float-round-conv.ll
float-select-fcmp.ll
flt-rounds.ll
fmax-fmin.ll
fold-addi-loadstore.ll
fold-vector-cmp.ll
fp-imm.ll
fp128.ll
fp16-promote.ll
fpclamptosat.ll
fpclamptosat_vec.ll
fpenv.ll
frame-info.ll
frame.ll
frameaddr-returnaddr.ll
frm-dependency.ll
get-register-invalid.ll
get-register-noreserve.ll
get-register-reserve.ll
get-setcc-result-type.ll
ghccc-rv32.ll
ghccc-rv64.ll
half-arith-strict.ll
half-arith.ll
half-bitmanip-dagcombines.ll
half-br-fcmp.ll
half-convert-strict.ll
half-convert.ll
half-fcmp-strict.ll
half-fcmp.ll
half-frem.ll
half-imm.ll
half-intrinsics.ll
half-isnan.ll
half-mem.ll
half-round-conv-sat.ll
half-round-conv.ll
half-select-fcmp.ll
hoist-global-addr-base.ll
i32-icmp.ll
i64-icmp.ll
iabs.ll
imm-cse.ll
imm.ll
indirectbr.ll
init-array.ll
inline-asm-abi-names.ll
inline-asm-clobbers.ll
inline-asm-d-abi-names.ll
inline-asm-d-constraint-f.ll
inline-asm-f-abi-names.ll
inline-asm-f-constraint-f.ll
inline-asm-i-constraint-i1.ll
inline-asm-invalid.ll
inline-asm-S-constraint.ll
inline-asm-zfh-constraint-f.ll
inline-asm.ll
interrupt-attr-args-error.ll
interrupt-attr-callee.ll
interrupt-attr-invalid.ll
interrupt-attr-nocall.ll
interrupt-attr-ret-error.ll
interrupt-attr.ll
isel-optnone.ll
jumptable.ll
large-stack.ll
legalize-fneg.ll
libcall-tail-calls.ll
lit.local.cfg
live-sp.mir
loop-strength-reduce-add-cheaper-than-mul.ll
loop-strength-reduce-loop-invar.ll
lsr-legaladdimm.ll
machine-cp.mir
machine-cse.ll
machine-outliner-cfi.mir
machine-outliner-patchable.ll
machine-outliner-position.mir
machine-outliner-throw.ll
machinelicm-address-pseudos.ll
machineoutliner-jumptable.mir
machineoutliner.mir
MachineSink-implicit-x0.mir
macro-fusion-lui-addi.ll
make-compressible-for-store-address.mir
make-compressible-rv64.mir
make-compressible.mir
mattr-invalid-combination.ll
mem.ll
mem64.ll
memcpy-inline.ll
min-max.ll
mir-target-flags.ll
miss-sp-restore-eh.ll
module-target-abi.ll
module-target-abi2.ll
mul.ll
musttail-call.ll
narrow-shl-cst.ll
neg-abs.ll
nomerge.ll
O0-pipeline.ll
O3-pipeline.ll
option-nopic.ll
option-norelax.ll
option-norvc.ll
option-pic.ll
option-relax.ll
option-rvc.ll
optnone-store-no-combine.ll
out-of-reach-emergency-slot.mir
overflow-intrinsic-optimizations.ll
patchable-function-entry.ll
pic-models.ll
pr40333.ll
pr51206.ll
pr53662.mir
pr55201.ll
pr56110.ll
pr56457.ll
prefetch.ll
readcyclecounter.ll
regalloc-last-chance-recoloring-failure.ll
rem.ll
remat.ll
reserved-reg-errors.ll
reserved-regs.ll
riscv-codegenprepare-asm.ll
riscv-codegenprepare.ll
rotl-rotr.ll
rv32e.ll
rv32i-rv64i-float-double.ll
rv32i-rv64i-half.ll
rv32zba.ll
rv32zbb-intrinsic.ll
rv32zbb-zbp-zbkb.ll
rv32zbb.ll
rv32zbc-intrinsic.ll
rv32zbc-zbkc-intrinsic.ll
rv32zbe-intrinsic.ll
rv32zbf-intrinsic.ll
rv32zbkb-intrinsic.ll
rv32zbkx-intrinsic.ll
rv32zbp-intrinsic.ll
rv32zbp-zbkb.ll
rv32zbp.ll
rv32zbr.ll
rv32zbs.ll
rv32zbt-intrinsic.ll
rv32zbt.ll
rv32zknd-intrinsic.ll
rv32zkne-intrinsic.ll
rv32zknh-intrinsic.ll
rv32zksed-intrinsic.ll
rv32zksh-intrinsic.ll
rv64-large-stack.ll
rv64d-double-convert-strict.ll
rv64d-double-convert.ll
rv64f-float-convert-strict.ll
rv64f-float-convert.ll
rv64i-complex-float.ll
rv64i-demanded-bits.ll
rv64i-double-softfloat.ll
rv64i-exhaustive-w-insts.ll
rv64i-shift-sext.ll
rv64i-single-softfloat.ll
rv64i-tricky-shifts.ll
rv64i-w-insts-legalization.ll
rv64m-exhaustive-w-insts.ll
rv64m-w-insts-legalization.ll
rv64zba.ll
rv64zbb-intrinsic.ll
rv64zbb-zbp-zbkb.ll
rv64zbb.ll
rv64zbc-intrinsic.ll
rv64zbc-zbkc-intrinsic.ll
rv64zbe-intrinsic.ll
rv64zbf-intrinsic.ll
rv64zbkb-intrinsic.ll
rv64zbkx-intrinsic.ll
rv64zbp-intrinsic.ll
rv64zbp-zbkb.ll
rv64zbp.ll
rv64zbr.ll
rv64zbs.ll
rv64zbt-intrinsic.ll
rv64zbt.ll
rv64zfh-half-convert-strict.ll
rv64zfh-half-convert.ll
rv64zfh-half-intrinsics-strict.ll
rv64zfh-half-intrinsics.ll
rv64zknd-intrinsic.ll
rv64zknd-zkne-intrinsic.ll
rv64zkne-intrinsic.ll
rv64zknh-intrinsic.ll
rv64zksed-intrinsic.ll
rv64zksh-intrinsic.ll
sadd_sat.ll
sadd_sat_plus.ll
saverestore.ll
scalable-vector-struct.ll
sdata-limit-0.ll
sdata-limit-4.ll
sdata-limit-8.ll
sdata-local-sym.ll
select-and.ll
select-bare.ll
select-binop-identity.ll
select-cc.ll
select-const.ll
select-constant-xor.ll
select-optimize-multiple.ll
select-optimize-multiple.mir
select-or.ll
selectcc-to-shiftand.ll
setcc-logic.ll
sext-zext-trunc.ll
sextw-removal.ll
shadowcallstack.ll
shift-and.ll
shift-masked-shamt.ll
shifts.ll
shl-demanded.ll
shlimm-addimm.ll
shrinkwrap.ll
sink-icmp.ll
spill-fpr-scalar.ll
split-offsets.ll
split-sp-adjust.ll
srem-lkk.ll
srem-seteq-illegal-types.ll
srem-vector-lkk.ll
ssub_sat.ll
ssub_sat_plus.ll
stack-folding.ll
stack-realignment-with-variable-sized-objects.ll
stack-realignment.ll
stack-slot-size.ll
stack-store-check.ll
subtarget-features-std-ext.ll
switch-width.ll
tail-calls.ll
target-abi-invalid.ll
target-abi-valid.ll
thread-pointer.ll
tls-models.ll
uadd_sat.ll
uadd_sat_plus.ll
umulo-128-legalisation-lowering.ll
unaligned-load-store.ll
unfold-masked-merge-scalar-variablemask.ll
unroll-loop-cse.ll
urem-lkk.ll
urem-seteq-illegal-types.ll
urem-vector-lkk.ll
usub_sat.ll
usub_sat_plus.ll
vadd-vp-mask.ll
vararg.ll
vec3-setcc-crash.ll
vector-abi.ll
verify-instr.mir
vlenb.ll
vmul-vp-mask.ll
vsub-vp-mask.ll
wide-mem.ll
xaluo.ll
zext-with-load-is-free.ll
zfh-half-intrinsics-strict.ll
zfh-half-intrinsics.ll
zfh-imm.ll
zmmul.ll