test/Transforms/SLPVectorizer/X86/expanded-operand-already-scheduled.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt --passes=slp-vectorizer -S -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s

define i32 @test() {
; CHECK-LABEL: define i32 @test() {
; CHECK-NEXT:  [[Q_EXIT8:.*:]]
; CHECK-NEXT:    [[TMP0:%.*]] = add <2 x i32> zeroinitializer, <i32 1, i32 0>
; CHECK-NEXT:    br label %[[BB1:.*]]
; CHECK:       [[BB1]]:
; CHECK-NEXT:    [[TMP2:%.*]] = trunc <2 x i32> [[TMP0]] to <2 x i1>
; CHECK-NEXT:    [[TMP3:%.*]] = mul <2 x i1> [[TMP2]], zeroinitializer
; CHECK-NEXT:    [[TMP4:%.*]] = or <2 x i1> zeroinitializer, [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = lshr <2 x i1> [[TMP4]], zeroinitializer
; CHECK-NEXT:    [[TMP6:%.*]] = and <2 x i1> [[TMP4]], zeroinitializer
; CHECK-NEXT:    [[TMP7:%.*]] = shufflevector <2 x i1> [[TMP5]], <2 x i1> [[TMP6]], <2 x i32> <i32 0, i32 3>
; CHECK-NEXT:    [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i32 0
; CHECK-NEXT:    [[TMP9:%.*]] = zext i1 [[TMP8]] to i32
; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <2 x i1> [[TMP7]], i32 1
; CHECK-NEXT:    [[TMP11:%.*]] = zext i1 [[TMP10]] to i32
; CHECK-NEXT:    [[TMP12:%.*]] = or i32 [[TMP9]], [[TMP11]]
; CHECK-NEXT:    ret i32 [[TMP12]]
;
q.exit8:
  %0 = add i32 0, 0
  %1 = or i32 %0, 0
  %2 = shl i32 %1, 1
  %3 = lshr i32 0, 0
  %4 = add i32 %3, 1
  %5 = sub i32 0, 0
  br label %6

6:
  %7 = or i32 %5, 0
  %8 = zext i32 %7 to i64
  %9 = mul i64 %8, 0
  %10 = zext i32 %2 to i64
  %11 = mul i64 0, %10
  %12 = or i64 %9, %11
  %13 = zext i32 %0 to i64
  %14 = mul i64 %13, 0
  %15 = zext i32 %4 to i64
  %16 = mul i64 %15, 0
  %17 = or i64 %14, %16
  %18 = trunc i64 %17 to i32
  %19 = lshr i32 %18, 0
  %20 = trunc i64 %12 to i32
  %21 = and i32 %20, 0
  %22 = or i32 %19, %21
  ret i32 %22
}