| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 | |
| ; RUN: opt -passes=slp-vectorizer -mtriple=wasm32 -mattr=+simd128 -S -o - %s | FileCheck %s | |
| @kvalues = external constant [16 x i8] | |
| define void @dequantize_row_iq4_nl(ptr %arg, ptr noalias %arg1, i64 %arg2) { | |
| ; CHECK-LABEL: define void @dequantize_row_iq4_nl( | |
| ; CHECK-SAME: ptr [[ARG:%.*]], ptr noalias [[ARG1:%.*]], i64 [[ARG2:%.*]]) #[[ATTR0:[0-9]+]] { | |
| ; CHECK-NEXT: [[BB:.*:]] | |
| ; CHECK-NEXT: [[I:%.*]] = getelementptr [18 x i8], ptr [[ARG]], i32 0 | |
| ; CHECK-NEXT: [[I3:%.*]] = load i16, ptr [[I]], align 2 | |
| ; CHECK-NEXT: [[I4:%.*]] = zext i16 [[I3]] to i32 | |
| ; CHECK-NEXT: [[I5:%.*]] = shl i32 [[I4]], 17 | |
| ; CHECK-NEXT: [[I6:%.*]] = lshr i32 [[I5]], 4 | |
| ; CHECK-NEXT: [[I7:%.*]] = or i32 [[I6]], 1879048192 | |
| ; CHECK-NEXT: [[I8:%.*]] = bitcast i32 [[I7]] to float | |
| ; CHECK-NEXT: [[I9:%.*]] = fmul float [[I8]], 1.925930e-34 | |
| ; CHECK-NEXT: [[I10:%.*]] = getelementptr i8, ptr [[I]], i32 2 | |
| ; CHECK-NEXT: [[I11:%.*]] = load i8, ptr [[I10]], align 2 | |
| ; CHECK-NEXT: [[I12:%.*]] = and i8 [[I11]], 15 | |
| ; CHECK-NEXT: [[I13:%.*]] = getelementptr i8, ptr @kvalues, i32 0 | |
| ; CHECK-NEXT: [[I14:%.*]] = and i32 0, -2147483648 | |
| ; CHECK-NEXT: [[I15:%.*]] = select i1 false, float 0.000000e+00, float [[I9]] | |
| ; CHECK-NEXT: [[I16:%.*]] = bitcast float [[I15]] to i32 | |
| ; CHECK-NEXT: [[I17:%.*]] = or i32 [[I14]], [[I16]] | |
| ; CHECK-NEXT: [[I18:%.*]] = bitcast i32 [[I17]] to float | |
| ; CHECK-NEXT: [[I19:%.*]] = load i8, ptr [[I13]], align 1 | |
| ; CHECK-NEXT: [[I20:%.*]] = sitofp i8 [[I19]] to float | |
| ; CHECK-NEXT: [[I21:%.*]] = fmul float [[I18]], [[I20]] | |
| ; CHECK-NEXT: store float [[I21]], ptr [[ARG1]], align 4 | |
| ; CHECK-NEXT: [[I22:%.*]] = lshr i8 [[I11]], 4 | |
| ; CHECK-NEXT: [[I23:%.*]] = zext i8 [[I22]] to i32 | |
| ; CHECK-NEXT: [[I24:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I23]] | |
| ; CHECK-NEXT: [[I25:%.*]] = load i8, ptr [[I24]], align 1 | |
| ; CHECK-NEXT: [[I28:%.*]] = getelementptr i8, ptr [[ARG1]], i32 64 | |
| ; CHECK-NEXT: [[I29:%.*]] = getelementptr i8, ptr @kvalues, i32 0 | |
| ; CHECK-NEXT: [[I30:%.*]] = load i8, ptr [[I29]], align 1 | |
| ; CHECK-NEXT: [[I31:%.*]] = sitofp i8 [[I30]] to float | |
| ; CHECK-NEXT: [[I32:%.*]] = getelementptr i8, ptr [[ARG1]], i32 4 | |
| ; CHECK-NEXT: store float 0.000000e+00, ptr [[I32]], align 4 | |
| ; CHECK-NEXT: [[I33:%.*]] = getelementptr i8, ptr [[I]], i32 3 | |
| ; CHECK-NEXT: [[I34:%.*]] = load i8, ptr [[I33]], align 1 | |
| ; CHECK-NEXT: [[I35:%.*]] = lshr i8 [[I34]], 4 | |
| ; CHECK-NEXT: [[I36:%.*]] = zext i8 [[I35]] to i32 | |
| ; CHECK-NEXT: [[I37:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I36]] | |
| ; CHECK-NEXT: [[I38:%.*]] = load i8, ptr [[I37]], align 1 | |
| ; CHECK-NEXT: [[I42:%.*]] = getelementptr i8, ptr [[I]], i32 4 | |
| ; CHECK-NEXT: [[I43:%.*]] = load i8, ptr [[I42]], align 2 | |
| ; CHECK-NEXT: [[I44:%.*]] = and i8 [[I43]], 15 | |
| ; CHECK-NEXT: [[I45:%.*]] = getelementptr i8, ptr @kvalues, i32 0 | |
| ; CHECK-NEXT: [[I46:%.*]] = load i8, ptr [[I45]], align 1 | |
| ; CHECK-NEXT: [[I47:%.*]] = sitofp i8 [[I46]] to float | |
| ; CHECK-NEXT: [[I48:%.*]] = fmul float [[I18]], [[I47]] | |
| ; CHECK-NEXT: [[I49:%.*]] = getelementptr i8, ptr [[ARG1]], i32 8 | |
| ; CHECK-NEXT: store float [[I48]], ptr [[I49]], align 4 | |
| ; CHECK-NEXT: [[I50:%.*]] = lshr i8 [[I43]], 4 | |
| ; CHECK-NEXT: [[I51:%.*]] = zext i8 [[I50]] to i32 | |
| ; CHECK-NEXT: [[I52:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I51]] | |
| ; CHECK-NEXT: [[I53:%.*]] = load i8, ptr [[I52]], align 1 | |
| ; CHECK-NEXT: [[I57:%.*]] = and i8 0, 15 | |
| ; CHECK-NEXT: [[I58:%.*]] = getelementptr i8, ptr @kvalues, i32 0 | |
| ; CHECK-NEXT: [[I59:%.*]] = load i8, ptr [[I58]], align 1 | |
| ; CHECK-NEXT: [[I60:%.*]] = sitofp i8 [[I59]] to float | |
| ; CHECK-NEXT: [[I61:%.*]] = fmul float [[I18]], [[I60]] | |
| ; CHECK-NEXT: [[I62:%.*]] = getelementptr i8, ptr [[ARG1]], i32 12 | |
| ; CHECK-NEXT: store float [[I61]], ptr [[I62]], align 4 | |
| ; CHECK-NEXT: [[I63:%.*]] = getelementptr i8, ptr @kvalues, i32 0 | |
| ; CHECK-NEXT: [[I64:%.*]] = load i8, ptr [[I63]], align 1 | |
| ; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[I25]], i64 0 | |
| ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[I38]], i64 1 | |
| ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[I53]], i64 2 | |
| ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[I64]], i64 3 | |
| ; CHECK-NEXT: [[TMP4:%.*]] = sitofp <4 x i8> [[TMP3]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> poison, float [[I18]], i64 0 | |
| ; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[TMP5]], <4 x float> poison, <4 x i32> zeroinitializer | |
| ; CHECK-NEXT: [[TMP7:%.*]] = fmul <4 x float> [[TMP6]], [[TMP4]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP7]], ptr [[I28]], align 4 | |
| ; CHECK-NEXT: [[I68:%.*]] = getelementptr i8, ptr [[I]], i32 6 | |
| ; CHECK-NEXT: [[I69:%.*]] = load i8, ptr [[I68]], align 2 | |
| ; CHECK-NEXT: ret void | |
| ; | |
| bb: | |
| %i = getelementptr [18 x i8], ptr %arg, i32 0 | |
| %i3 = load i16, ptr %i, align 2 | |
| %i4 = zext i16 %i3 to i32 | |
| %i5 = shl i32 %i4, 17 | |
| %i6 = lshr i32 %i5, 4 | |
| %i7 = or i32 %i6, 1879048192 | |
| %i8 = bitcast i32 %i7 to float | |
| %i9 = fmul float %i8, 1.925930e-34 | |
| %i10 = getelementptr i8, ptr %i, i32 2 | |
| %i11 = load i8, ptr %i10, align 2 | |
| %i12 = and i8 %i11, 15 | |
| %i13 = getelementptr i8, ptr @kvalues, i32 0 | |
| %i14 = and i32 0, -2147483648 | |
| %i15 = select i1 false, float 0.000000e+00, float %i9 | |
| %i16 = bitcast float %i15 to i32 | |
| %i17 = or i32 %i14, %i16 | |
| %i18 = bitcast i32 %i17 to float | |
| %i19 = load i8, ptr %i13, align 1 | |
| %i20 = sitofp i8 %i19 to float | |
| %i21 = fmul float %i18, %i20 | |
| store float %i21, ptr %arg1, align 4 | |
| %i22 = lshr i8 %i11, 4 | |
| %i23 = zext i8 %i22 to i32 | |
| %i24 = getelementptr i8, ptr @kvalues, i32 %i23 | |
| %i25 = load i8, ptr %i24, align 1 | |
| %i26 = sitofp i8 %i25 to float | |
| %i27 = fmul float %i18, %i26 | |
| %i28 = getelementptr i8, ptr %arg1, i32 64 | |
| store float %i27, ptr %i28, align 4 | |
| %i29 = getelementptr i8, ptr @kvalues, i32 0 | |
| %i30 = load i8, ptr %i29, align 1 | |
| %i31 = sitofp i8 %i30 to float | |
| %i32 = getelementptr i8, ptr %arg1, i32 4 | |
| store float 0.000000e+00, ptr %i32, align 4 | |
| %i33 = getelementptr i8, ptr %i, i32 3 | |
| %i34 = load i8, ptr %i33, align 1 | |
| %i35 = lshr i8 %i34, 4 | |
| %i36 = zext i8 %i35 to i32 | |
| %i37 = getelementptr i8, ptr @kvalues, i32 %i36 | |
| %i38 = load i8, ptr %i37, align 1 | |
| %i39 = sitofp i8 %i38 to float | |
| %i40 = fmul float %i18, %i39 | |
| %i41 = getelementptr i8, ptr %arg1, i32 68 | |
| store float %i40, ptr %i41, align 4 | |
| %i42 = getelementptr i8, ptr %i, i32 4 | |
| %i43 = load i8, ptr %i42, align 2 | |
| %i44 = and i8 %i43, 15 | |
| %i45 = getelementptr i8, ptr @kvalues, i32 0 | |
| %i46 = load i8, ptr %i45, align 1 | |
| %i47 = sitofp i8 %i46 to float | |
| %i48 = fmul float %i18, %i47 | |
| %i49 = getelementptr i8, ptr %arg1, i32 8 | |
| store float %i48, ptr %i49, align 4 | |
| %i50 = lshr i8 %i43, 4 | |
| %i51 = zext i8 %i50 to i32 | |
| %i52 = getelementptr i8, ptr @kvalues, i32 %i51 | |
| %i53 = load i8, ptr %i52, align 1 | |
| %i54 = sitofp i8 %i53 to float | |
| %i55 = fmul float %i18, %i54 | |
| %i56 = getelementptr i8, ptr %arg1, i32 72 | |
| store float %i55, ptr %i56, align 4 | |
| %i57 = and i8 0, 15 | |
| %i58 = getelementptr i8, ptr @kvalues, i32 0 | |
| %i59 = load i8, ptr %i58, align 1 | |
| %i60 = sitofp i8 %i59 to float | |
| %i61 = fmul float %i18, %i60 | |
| %i62 = getelementptr i8, ptr %arg1, i32 12 | |
| store float %i61, ptr %i62, align 4 | |
| %i63 = getelementptr i8, ptr @kvalues, i32 0 | |
| %i64 = load i8, ptr %i63, align 1 | |
| %i65 = sitofp i8 %i64 to float | |
| %i66 = fmul float %i18, %i65 | |
| %i67 = getelementptr i8, ptr %arg1, i32 76 | |
| store float %i66, ptr %i67, align 4 | |
| %i68 = getelementptr i8, ptr %i, i32 6 | |
| %i69 = load i8, ptr %i68, align 2 | |
| ret void | |
| } | |
| define void @dequantize_row_mxfp4(ptr %arg, ptr noalias %arg1, i64 %arg2) { | |
| ; CHECK-LABEL: define void @dequantize_row_mxfp4( | |
| ; CHECK-SAME: ptr [[ARG:%.*]], ptr noalias [[ARG1:%.*]], i64 [[ARG2:%.*]]) #[[ATTR0]] { | |
| ; CHECK-NEXT: [[BB:.*:]] | |
| ; CHECK-NEXT: [[I:%.*]] = getelementptr [17 x i8], ptr [[ARG]], i32 0 | |
| ; CHECK-NEXT: [[I3:%.*]] = load i8, ptr [[I]], align 1 | |
| ; CHECK-NEXT: [[I4:%.*]] = zext i8 [[I3]] to i32 | |
| ; CHECK-NEXT: [[I5:%.*]] = shl i32 [[I4]], 23 | |
| ; CHECK-NEXT: [[I6:%.*]] = getelementptr i8, ptr [[I]], i32 1 | |
| ; CHECK-NEXT: [[I7:%.*]] = load i8, ptr [[I6]], align 1 | |
| ; CHECK-NEXT: [[I8:%.*]] = zext i8 [[I7]] to i32 | |
| ; CHECK-NEXT: [[I9:%.*]] = and i32 [[I8]], 15 | |
| ; CHECK-NEXT: [[I10:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I9]] | |
| ; CHECK-NEXT: [[I11:%.*]] = lshr i32 [[I8]], 4 | |
| ; CHECK-NEXT: [[I12:%.*]] = add i32 [[I5]], -8388608 | |
| ; CHECK-NEXT: [[I13:%.*]] = select i1 false, i32 0, i32 [[I12]] | |
| ; CHECK-NEXT: [[I14:%.*]] = bitcast i32 [[I13]] to float | |
| ; CHECK-NEXT: [[I15:%.*]] = load i8, ptr [[I10]], align 1 | |
| ; CHECK-NEXT: [[I18:%.*]] = getelementptr i8, ptr [[ARG1]], i32 0 | |
| ; CHECK-NEXT: [[I19:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I11]] | |
| ; CHECK-NEXT: [[I20:%.*]] = load i8, ptr [[I19]], align 1 | |
| ; CHECK-NEXT: [[I23:%.*]] = getelementptr i8, ptr [[I18]], i32 64 | |
| ; CHECK-NEXT: [[I24:%.*]] = getelementptr i8, ptr [[I]], i32 2 | |
| ; CHECK-NEXT: [[I25:%.*]] = load i8, ptr [[I24]], align 1 | |
| ; CHECK-NEXT: [[I26:%.*]] = zext i8 [[I25]] to i32 | |
| ; CHECK-NEXT: [[I27:%.*]] = and i32 [[I26]], 15 | |
| ; CHECK-NEXT: [[I28:%.*]] = lshr i32 [[I26]], 4 | |
| ; CHECK-NEXT: [[I29:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I27]] | |
| ; CHECK-NEXT: [[I30:%.*]] = load i8, ptr [[I29]], align 1 | |
| ; CHECK-NEXT: [[I34:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I28]] | |
| ; CHECK-NEXT: [[I35:%.*]] = load i8, ptr [[I34]], align 1 | |
| ; CHECK-NEXT: [[I39:%.*]] = lshr i32 0, 4 | |
| ; CHECK-NEXT: [[I43:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I39]] | |
| ; CHECK-NEXT: [[I44:%.*]] = load i8, ptr [[I43]], align 1 | |
| ; CHECK-NEXT: [[I48:%.*]] = getelementptr i8, ptr [[I]], i32 4 | |
| ; CHECK-NEXT: [[I49:%.*]] = load i8, ptr [[I48]], align 1 | |
| ; CHECK-NEXT: [[I50:%.*]] = zext i8 [[I49]] to i32 | |
| ; CHECK-NEXT: [[I51:%.*]] = and i32 [[I50]], 15 | |
| ; CHECK-NEXT: [[I52:%.*]] = lshr i32 [[I50]], 4 | |
| ; CHECK-NEXT: [[I53:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I51]] | |
| ; CHECK-NEXT: [[I54:%.*]] = load i8, ptr [[I53]], align 1 | |
| ; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> <i8 poison, i8 poison, i8 0, i8 poison>, i8 [[I15]], i64 0 | |
| ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[I30]], i64 1 | |
| ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[I54]], i64 3 | |
| ; CHECK-NEXT: [[TMP3:%.*]] = sitofp <4 x i8> [[TMP2]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[I14]], i64 0 | |
| ; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> poison, <4 x i32> zeroinitializer | |
| ; CHECK-NEXT: [[TMP6:%.*]] = fmul <4 x float> [[TMP5]], [[TMP3]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP6]], ptr [[I18]], align 4 | |
| ; CHECK-NEXT: [[I58:%.*]] = getelementptr i8, ptr @kvalues, i32 [[I52]] | |
| ; CHECK-NEXT: [[I59:%.*]] = load i8, ptr [[I58]], align 1 | |
| ; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i8> poison, i8 [[I20]], i64 0 | |
| ; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i8> [[TMP7]], i8 [[I35]], i64 1 | |
| ; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i8> [[TMP8]], i8 [[I44]], i64 2 | |
| ; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i8> [[TMP9]], i8 [[I59]], i64 3 | |
| ; CHECK-NEXT: [[TMP11:%.*]] = sitofp <4 x i8> [[TMP10]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP12:%.*]] = fmul <4 x float> [[TMP5]], [[TMP11]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP12]], ptr [[I23]], align 4 | |
| ; CHECK-NEXT: [[I63:%.*]] = getelementptr i8, ptr [[I]], i32 5 | |
| ; CHECK-NEXT: [[I64:%.*]] = load i8, ptr [[I63]], align 1 | |
| ; CHECK-NEXT: [[I65:%.*]] = and i32 0, 15 | |
| ; CHECK-NEXT: ret void | |
| ; | |
| bb: | |
| %i = getelementptr [17 x i8], ptr %arg, i32 0 | |
| %i3 = load i8, ptr %i, align 1 | |
| %i4 = zext i8 %i3 to i32 | |
| %i5 = shl i32 %i4, 23 | |
| %i6 = getelementptr i8, ptr %i, i32 1 | |
| %i7 = load i8, ptr %i6, align 1 | |
| %i8 = zext i8 %i7 to i32 | |
| %i9 = and i32 %i8, 15 | |
| %i10 = getelementptr i8, ptr @kvalues, i32 %i9 | |
| %i11 = lshr i32 %i8, 4 | |
| %i12 = add i32 %i5, -8388608 | |
| %i13 = select i1 false, i32 0, i32 %i12 | |
| %i14 = bitcast i32 %i13 to float | |
| %i15 = load i8, ptr %i10, align 1 | |
| %i16 = sitofp i8 %i15 to float | |
| %i17 = fmul float %i14, %i16 | |
| %i18 = getelementptr i8, ptr %arg1, i32 0 | |
| store float %i17, ptr %i18, align 4 | |
| %i19 = getelementptr i8, ptr @kvalues, i32 %i11 | |
| %i20 = load i8, ptr %i19, align 1 | |
| %i21 = sitofp i8 %i20 to float | |
| %i22 = fmul float %i14, %i21 | |
| %i23 = getelementptr i8, ptr %i18, i32 64 | |
| store float %i22, ptr %i23, align 4 | |
| %i24 = getelementptr i8, ptr %i, i32 2 | |
| %i25 = load i8, ptr %i24, align 1 | |
| %i26 = zext i8 %i25 to i32 | |
| %i27 = and i32 %i26, 15 | |
| %i28 = lshr i32 %i26, 4 | |
| %i29 = getelementptr i8, ptr @kvalues, i32 %i27 | |
| %i30 = load i8, ptr %i29, align 1 | |
| %i31 = sitofp i8 %i30 to float | |
| %i32 = fmul float %i14, %i31 | |
| %i33 = getelementptr i8, ptr %i18, i32 4 | |
| store float %i32, ptr %i33, align 4 | |
| %i34 = getelementptr i8, ptr @kvalues, i32 %i28 | |
| %i35 = load i8, ptr %i34, align 1 | |
| %i36 = sitofp i8 %i35 to float | |
| %i37 = fmul float %i14, %i36 | |
| %i38 = getelementptr i8, ptr %i18, i32 68 | |
| store float %i37, ptr %i38, align 4 | |
| %i39 = lshr i32 0, 4 | |
| %i40 = sitofp i8 0 to float | |
| %i41 = fmul float %i14, %i40 | |
| %i42 = getelementptr i8, ptr %i18, i32 8 | |
| store float %i41, ptr %i42, align 4 | |
| %i43 = getelementptr i8, ptr @kvalues, i32 %i39 | |
| %i44 = load i8, ptr %i43, align 1 | |
| %i45 = sitofp i8 %i44 to float | |
| %i46 = fmul float %i14, %i45 | |
| %i47 = getelementptr i8, ptr %i18, i32 72 | |
| store float %i46, ptr %i47, align 4 | |
| %i48 = getelementptr i8, ptr %i, i32 4 | |
| %i49 = load i8, ptr %i48, align 1 | |
| %i50 = zext i8 %i49 to i32 | |
| %i51 = and i32 %i50, 15 | |
| %i52 = lshr i32 %i50, 4 | |
| %i53 = getelementptr i8, ptr @kvalues, i32 %i51 | |
| %i54 = load i8, ptr %i53, align 1 | |
| %i55 = sitofp i8 %i54 to float | |
| %i56 = fmul float %i14, %i55 | |
| %i57 = getelementptr i8, ptr %i18, i32 12 | |
| store float %i56, ptr %i57, align 4 | |
| %i58 = getelementptr i8, ptr @kvalues, i32 %i52 | |
| %i59 = load i8, ptr %i58, align 1 | |
| %i60 = sitofp i8 %i59 to float | |
| %i61 = fmul float %i14, %i60 | |
| %i62 = getelementptr i8, ptr %i18, i32 76 | |
| store float %i61, ptr %i62, align 4 | |
| %i63 = getelementptr i8, ptr %i, i32 5 | |
| %i64 = load i8, ptr %i63, align 1 | |
| %i65 = and i32 0, 15 | |
| ret void | |
| } | |
| define void @dequantize_row_q4_K(ptr noalias %arg, ptr %arg1, i64 %arg2) { | |
| ; CHECK-LABEL: define void @dequantize_row_q4_K( | |
| ; CHECK-SAME: ptr noalias [[ARG:%.*]], ptr [[ARG1:%.*]], i64 [[ARG2:%.*]]) #[[ATTR0]] { | |
| ; CHECK-NEXT: [[BB:.*:]] | |
| ; CHECK-NEXT: [[I:%.*]] = getelementptr [144 x i8], ptr [[ARG]], i32 0 | |
| ; CHECK-NEXT: [[I3:%.*]] = getelementptr i8, ptr [[I]], i32 16 | |
| ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i8>, ptr [[I3]], align 1 | |
| ; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i8> [[TMP0]], splat (i8 15) | |
| ; CHECK-NEXT: [[TMP2:%.*]] = uitofp <4 x i8> [[TMP1]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP3:%.*]] = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> zeroinitializer, <4 x float> [[TMP2]], <4 x float> zeroinitializer) | |
| ; CHECK-NEXT: store <4 x float> [[TMP3]], ptr [[ARG1]], align 4 | |
| ; CHECK-NEXT: [[I26:%.*]] = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00) | |
| ; CHECK-NEXT: [[I27:%.*]] = uitofp i8 0 to float | |
| ; CHECK-NEXT: [[I29:%.*]] = getelementptr i8, ptr [[ARG1]], i32 116 | |
| ; CHECK-NEXT: [[I33:%.*]] = uitofp i8 0 to float | |
| ; CHECK-NEXT: [[I34:%.*]] = lshr i8 0, 4 | |
| ; CHECK-NEXT: [[I35:%.*]] = uitofp i8 [[I34]] to float | |
| ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> <float poison, float -0.000000e+00, float 0.000000e+00, float -0.000000e+00>, float [[I27]], i64 0 | |
| ; CHECK-NEXT: [[TMP5:%.*]] = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> zeroinitializer, <4 x float> [[TMP4]], <4 x float> zeroinitializer) | |
| ; CHECK-NEXT: store <4 x float> [[TMP5]], ptr [[I29]], align 4 | |
| ; CHECK-NEXT: [[I37:%.*]] = lshr i8 0, 4 | |
| ; CHECK-NEXT: [[I38:%.*]] = uitofp i8 [[I37]] to float | |
| ; CHECK-NEXT: [[I39:%.*]] = lshr i8 0, 4 | |
| ; CHECK-NEXT: [[I40:%.*]] = lshr i8 0, 4 | |
| ; CHECK-NEXT: ret void | |
| ; | |
| bb: | |
| %i = getelementptr [144 x i8], ptr %arg, i32 0 | |
| %i3 = getelementptr i8, ptr %i, i32 16 | |
| %i4 = load i8, ptr %i3, align 1 | |
| %i5 = and i8 %i4, 15 | |
| %i6 = uitofp i8 %i5 to float | |
| %i7 = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float %i6, float 0.000000e+00) | |
| store float %i7, ptr %arg1, align 4 | |
| %i8 = getelementptr i8, ptr %i3, i32 1 | |
| %i9 = load i8, ptr %i8, align 1 | |
| %i10 = and i8 %i9, 15 | |
| %i11 = uitofp i8 %i10 to float | |
| %i12 = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float %i11, float 0.000000e+00) | |
| %i13 = getelementptr i8, ptr %arg1, i32 4 | |
| store float %i12, ptr %i13, align 4 | |
| %i14 = getelementptr i8, ptr %i3, i32 2 | |
| %i15 = load i8, ptr %i14, align 1 | |
| %i16 = and i8 %i15, 15 | |
| %i17 = uitofp i8 %i16 to float | |
| %i18 = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float %i17, float 0.000000e+00) | |
| %i19 = getelementptr i8, ptr %arg1, i32 8 | |
| store float %i18, ptr %i19, align 4 | |
| %i20 = getelementptr i8, ptr %i3, i32 3 | |
| %i21 = load i8, ptr %i20, align 1 | |
| %i22 = and i8 %i21, 15 | |
| %i23 = uitofp i8 %i22 to float | |
| %i24 = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float %i23, float 0.000000e+00) | |
| %i25 = getelementptr i8, ptr %arg1, i32 12 | |
| store float %i24, ptr %i25, align 4 | |
| %i26 = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00) | |
| %i27 = uitofp i8 0 to float | |
| %i28 = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float %i27, float 0.000000e+00) | |
| %i29 = getelementptr i8, ptr %arg1, i32 116 | |
| store float %i28, ptr %i29, align 4 | |
| %i30 = getelementptr i8, ptr %arg1, i32 120 | |
| store float 0.000000e+00, ptr %i30, align 4 | |
| %i31 = tail call float @llvm.fmuladd.f32(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00) | |
| %i32 = getelementptr i8, ptr %arg1, i32 124 | |
| store float %i31, ptr %i32, align 4 | |
| %i33 = uitofp i8 0 to float | |
| %i34 = lshr i8 0, 4 | |
| %i35 = uitofp i8 %i34 to float | |
| %i36 = getelementptr i8, ptr %arg1, i32 128 | |
| store float 0.000000e+00, ptr %i36, align 4 | |
| %i37 = lshr i8 0, 4 | |
| %i38 = uitofp i8 %i37 to float | |
| %i39 = lshr i8 0, 4 | |
| %i40 = lshr i8 0, 4 | |
| ret void | |
| } | |
| define void @dequantize_row_q4_0(ptr noalias %arg, ptr %arg1, i64 %arg2) { | |
| ; CHECK-LABEL: define void @dequantize_row_q4_0( | |
| ; CHECK-SAME: ptr noalias [[ARG:%.*]], ptr [[ARG1:%.*]], i64 [[ARG2:%.*]]) #[[ATTR0]] { | |
| ; CHECK-NEXT: [[BB:.*]]: | |
| ; CHECK-NEXT: [[I:%.*]] = and i64 [[ARG2]], 31 | |
| ; CHECK-NEXT: [[I3:%.*]] = icmp eq i64 [[I]], 0 | |
| ; CHECK-NEXT: [[I4:%.*]] = lshr exact i64 [[ARG2]], 5 | |
| ; CHECK-NEXT: [[I5:%.*]] = trunc i64 [[I4]] to i32 | |
| ; CHECK-NEXT: [[I6:%.*]] = icmp sgt i32 [[I5]], 0 | |
| ; CHECK-NEXT: br label %[[BB8:.*]] | |
| ; CHECK: [[BB7:.*]]: | |
| ; CHECK-NEXT: ret void | |
| ; CHECK: [[BB8]]: | |
| ; CHECK-NEXT: [[I9:%.*]] = phi i32 [ [[I238:%.*]], %[[BB8]] ], [ 0, %[[BB]] ] | |
| ; CHECK-NEXT: [[I10:%.*]] = getelementptr inbounds nuw [18 x i8], ptr [[ARG]], i32 [[I9]] | |
| ; CHECK-NEXT: [[I11:%.*]] = load i16, ptr [[I10]], align 2 | |
| ; CHECK-NEXT: [[I12:%.*]] = zext i16 [[I11]] to i32 | |
| ; CHECK-NEXT: [[I13:%.*]] = shl i32 [[I12]], 17 | |
| ; CHECK-NEXT: [[I14:%.*]] = lshr exact i32 [[I13]], 4 | |
| ; CHECK-NEXT: [[I15:%.*]] = or disjoint i32 [[I14]], 1879048192 | |
| ; CHECK-NEXT: [[I16:%.*]] = bitcast i32 [[I15]] to float | |
| ; CHECK-NEXT: [[I17:%.*]] = and i32 [[I12]], 32767 | |
| ; CHECK-NEXT: [[I18:%.*]] = or disjoint i32 [[I17]], 1056964608 | |
| ; CHECK-NEXT: [[I19:%.*]] = bitcast i32 [[I18]] to float | |
| ; CHECK-NEXT: [[I20:%.*]] = icmp ult i32 [[I13]], 134217728 | |
| ; CHECK-NEXT: [[I21:%.*]] = fadd float [[I19]], -5.000000e-01 | |
| ; CHECK-NEXT: [[I22:%.*]] = fmul float [[I16]], 1.925930e-34 | |
| ; CHECK-NEXT: [[I23:%.*]] = select i1 [[I20]], float [[I21]], float [[I22]] | |
| ; CHECK-NEXT: [[I24:%.*]] = bitcast float [[I23]] to i32 | |
| ; CHECK-NEXT: [[I25:%.*]] = sext i16 [[I11]] to i32 | |
| ; CHECK-NEXT: [[I26:%.*]] = and i32 [[I25]], -2147483648 | |
| ; CHECK-NEXT: [[I27:%.*]] = or i32 [[I26]], [[I24]] | |
| ; CHECK-NEXT: [[I28:%.*]] = bitcast i32 [[I27]] to float | |
| ; CHECK-NEXT: [[I29:%.*]] = getelementptr inbounds nuw i8, ptr [[I10]], i32 2 | |
| ; CHECK-NEXT: [[I30:%.*]] = shl nsw i32 [[I9]], 7 | |
| ; CHECK-NEXT: [[I31:%.*]] = getelementptr inbounds nuw i8, ptr [[ARG1]], i32 [[I30]] | |
| ; CHECK-NEXT: [[I42:%.*]] = getelementptr inbounds nuw i8, ptr [[I31]], i32 64 | |
| ; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i8>, ptr [[I29]], align 1 | |
| ; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i8> [[TMP0]], splat (i8 15) | |
| ; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i8> [[TMP1]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP3:%.*]] = sitofp <4 x i8> [[TMP2]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[I28]], i64 0 | |
| ; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> poison, <4 x i32> zeroinitializer | |
| ; CHECK-NEXT: [[TMP6:%.*]] = fmul <4 x float> [[TMP5]], [[TMP3]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP6]], ptr [[I31]], align 4 | |
| ; CHECK-NEXT: [[TMP7:%.*]] = lshr <4 x i8> [[TMP0]], splat (i8 4) | |
| ; CHECK-NEXT: [[TMP8:%.*]] = add <4 x i8> [[TMP7]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP9:%.*]] = sitofp <4 x i8> [[TMP8]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP10:%.*]] = fmul <4 x float> [[TMP5]], [[TMP9]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP10]], ptr [[I42]], align 4 | |
| ; CHECK-NEXT: [[I82:%.*]] = getelementptr inbounds nuw i8, ptr [[I10]], i32 6 | |
| ; CHECK-NEXT: [[I91:%.*]] = getelementptr inbounds nuw i8, ptr [[I31]], i32 16 | |
| ; CHECK-NEXT: [[I94:%.*]] = getelementptr inbounds nuw i8, ptr [[I31]], i32 80 | |
| ; CHECK-NEXT: [[TMP11:%.*]] = load <4 x i8>, ptr [[I82]], align 1 | |
| ; CHECK-NEXT: [[TMP12:%.*]] = and <4 x i8> [[TMP11]], splat (i8 15) | |
| ; CHECK-NEXT: [[TMP13:%.*]] = add <4 x i8> [[TMP12]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP14:%.*]] = sitofp <4 x i8> [[TMP13]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP15:%.*]] = fmul <4 x float> [[TMP5]], [[TMP14]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP15]], ptr [[I91]], align 4 | |
| ; CHECK-NEXT: [[TMP16:%.*]] = lshr <4 x i8> [[TMP11]], splat (i8 4) | |
| ; CHECK-NEXT: [[TMP17:%.*]] = add <4 x i8> [[TMP16]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP18:%.*]] = sitofp <4 x i8> [[TMP17]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP19:%.*]] = fmul <4 x float> [[TMP5]], [[TMP18]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP19]], ptr [[I94]], align 4 | |
| ; CHECK-NEXT: [[I134:%.*]] = getelementptr inbounds nuw i8, ptr [[I10]], i32 10 | |
| ; CHECK-NEXT: [[I143:%.*]] = getelementptr inbounds nuw i8, ptr [[I31]], i32 32 | |
| ; CHECK-NEXT: [[I146:%.*]] = getelementptr inbounds nuw i8, ptr [[I31]], i32 96 | |
| ; CHECK-NEXT: [[TMP20:%.*]] = load <4 x i8>, ptr [[I134]], align 1 | |
| ; CHECK-NEXT: [[TMP21:%.*]] = and <4 x i8> [[TMP20]], splat (i8 15) | |
| ; CHECK-NEXT: [[TMP22:%.*]] = add <4 x i8> [[TMP21]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP23:%.*]] = sitofp <4 x i8> [[TMP22]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP24:%.*]] = fmul <4 x float> [[TMP5]], [[TMP23]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP24]], ptr [[I143]], align 4 | |
| ; CHECK-NEXT: [[TMP25:%.*]] = lshr <4 x i8> [[TMP20]], splat (i8 4) | |
| ; CHECK-NEXT: [[TMP26:%.*]] = add <4 x i8> [[TMP25]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP27:%.*]] = sitofp <4 x i8> [[TMP26]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP28:%.*]] = fmul <4 x float> [[TMP5]], [[TMP27]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP28]], ptr [[I146]], align 4 | |
| ; CHECK-NEXT: [[I186:%.*]] = getelementptr inbounds nuw i8, ptr [[I10]], i32 14 | |
| ; CHECK-NEXT: [[I195:%.*]] = getelementptr inbounds nuw i8, ptr [[I31]], i32 48 | |
| ; CHECK-NEXT: [[I198:%.*]] = getelementptr inbounds nuw i8, ptr [[I31]], i32 112 | |
| ; CHECK-NEXT: [[TMP29:%.*]] = load <4 x i8>, ptr [[I186]], align 1 | |
| ; CHECK-NEXT: [[TMP30:%.*]] = and <4 x i8> [[TMP29]], splat (i8 15) | |
| ; CHECK-NEXT: [[TMP31:%.*]] = add <4 x i8> [[TMP30]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP32:%.*]] = sitofp <4 x i8> [[TMP31]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP33:%.*]] = fmul <4 x float> [[TMP5]], [[TMP32]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP33]], ptr [[I195]], align 4 | |
| ; CHECK-NEXT: [[TMP34:%.*]] = lshr <4 x i8> [[TMP29]], splat (i8 4) | |
| ; CHECK-NEXT: [[TMP35:%.*]] = add <4 x i8> [[TMP34]], splat (i8 -8) | |
| ; CHECK-NEXT: [[TMP36:%.*]] = sitofp <4 x i8> [[TMP35]] to <4 x float> | |
| ; CHECK-NEXT: [[TMP37:%.*]] = fmul <4 x float> [[TMP5]], [[TMP36]] | |
| ; CHECK-NEXT: store <4 x float> [[TMP37]], ptr [[I198]], align 4 | |
| ; CHECK-NEXT: [[I238]] = add nuw nsw i32 [[I9]], 1 | |
| ; CHECK-NEXT: [[I239:%.*]] = icmp eq i32 [[I238]], [[I5]] | |
| ; CHECK-NEXT: br i1 [[I239]], label %[[BB7]], label %[[BB8]] | |
| ; | |
| bb: | |
| %i = and i64 %arg2, 31 | |
| %i3 = icmp eq i64 %i, 0 | |
| %i4 = lshr exact i64 %arg2, 5 | |
| %i5 = trunc i64 %i4 to i32 | |
| %i6 = icmp sgt i32 %i5, 0 | |
| br label %bb8 | |
| bb7: ; preds = %bb8 | |
| ret void | |
| bb8: ; preds = %bb8, %bb | |
| %i9 = phi i32 [ %i238, %bb8 ], [ 0, %bb ] | |
| %i10 = getelementptr inbounds nuw [18 x i8], ptr %arg, i32 %i9 | |
| %i11 = load i16, ptr %i10, align 2 | |
| %i12 = zext i16 %i11 to i32 | |
| %i13 = shl i32 %i12, 17 | |
| %i14 = lshr exact i32 %i13, 4 | |
| %i15 = or disjoint i32 %i14, 1879048192 | |
| %i16 = bitcast i32 %i15 to float | |
| %i17 = and i32 %i12, 32767 | |
| %i18 = or disjoint i32 %i17, 1056964608 | |
| %i19 = bitcast i32 %i18 to float | |
| %i20 = icmp ult i32 %i13, 134217728 | |
| %i21 = fadd float %i19, -5.000000e-01 | |
| %i22 = fmul float %i16, 1.925930e-34 | |
| %i23 = select i1 %i20, float %i21, float %i22 | |
| %i24 = bitcast float %i23 to i32 | |
| %i25 = sext i16 %i11 to i32 | |
| %i26 = and i32 %i25, -2147483648 | |
| %i27 = or i32 %i26, %i24 | |
| %i28 = bitcast i32 %i27 to float | |
| %i29 = getelementptr inbounds nuw i8, ptr %i10, i32 2 | |
| %i30 = shl nsw i32 %i9, 7 | |
| %i31 = getelementptr inbounds nuw i8, ptr %arg1, i32 %i30 | |
| %i32 = load i8, ptr %i29, align 1 | |
| %i33 = zext i8 %i32 to i32 | |
| %i34 = and i32 %i33, 15 | |
| %i35 = add nsw i32 %i34, -8 | |
| %i36 = lshr i32 %i33, 4 | |
| %i37 = add nsw i32 %i36, -8 | |
| %i38 = sitofp i32 %i35 to float | |
| %i39 = fmul float %i28, %i38 | |
| store float %i39, ptr %i31, align 4 | |
| %i40 = sitofp i32 %i37 to float | |
| %i41 = fmul float %i28, %i40 | |
| %i42 = getelementptr inbounds nuw i8, ptr %i31, i32 64 | |
| store float %i41, ptr %i42, align 4 | |
| %i43 = getelementptr inbounds nuw i8, ptr %i10, i32 3 | |
| %i44 = load i8, ptr %i43, align 1 | |
| %i45 = zext i8 %i44 to i32 | |
| %i46 = and i32 %i45, 15 | |
| %i47 = add nsw i32 %i46, -8 | |
| %i48 = lshr i32 %i45, 4 | |
| %i49 = add nsw i32 %i48, -8 | |
| %i50 = sitofp i32 %i47 to float | |
| %i51 = fmul float %i28, %i50 | |
| %i52 = getelementptr inbounds nuw i8, ptr %i31, i32 4 | |
| store float %i51, ptr %i52, align 4 | |
| %i53 = sitofp i32 %i49 to float | |
| %i54 = fmul float %i28, %i53 | |
| %i55 = getelementptr inbounds nuw i8, ptr %i31, i32 68 | |
| store float %i54, ptr %i55, align 4 | |
| %i56 = getelementptr inbounds nuw i8, ptr %i10, i32 4 | |
| %i57 = load i8, ptr %i56, align 1 | |
| %i58 = zext i8 %i57 to i32 | |
| %i59 = and i32 %i58, 15 | |
| %i60 = add nsw i32 %i59, -8 | |
| %i61 = lshr i32 %i58, 4 | |
| %i62 = add nsw i32 %i61, -8 | |
| %i63 = sitofp i32 %i60 to float | |
| %i64 = fmul float %i28, %i63 | |
| %i65 = getelementptr inbounds nuw i8, ptr %i31, i32 8 | |
| store float %i64, ptr %i65, align 4 | |
| %i66 = sitofp i32 %i62 to float | |
| %i67 = fmul float %i28, %i66 | |
| %i68 = getelementptr inbounds nuw i8, ptr %i31, i32 72 | |
| store float %i67, ptr %i68, align 4 | |
| %i69 = getelementptr inbounds nuw i8, ptr %i10, i32 5 | |
| %i70 = load i8, ptr %i69, align 1 | |
| %i71 = zext i8 %i70 to i32 | |
| %i72 = and i32 %i71, 15 | |
| %i73 = add nsw i32 %i72, -8 | |
| %i74 = lshr i32 %i71, 4 | |
| %i75 = add nsw i32 %i74, -8 | |
| %i76 = sitofp i32 %i73 to float | |
| %i77 = fmul float %i28, %i76 | |
| %i78 = getelementptr inbounds nuw i8, ptr %i31, i32 12 | |
| store float %i77, ptr %i78, align 4 | |
| %i79 = sitofp i32 %i75 to float | |
| %i80 = fmul float %i28, %i79 | |
| %i81 = getelementptr inbounds nuw i8, ptr %i31, i32 76 | |
| store float %i80, ptr %i81, align 4 | |
| %i82 = getelementptr inbounds nuw i8, ptr %i10, i32 6 | |
| %i83 = load i8, ptr %i82, align 1 | |
| %i84 = zext i8 %i83 to i32 | |
| %i85 = and i32 %i84, 15 | |
| %i86 = add nsw i32 %i85, -8 | |
| %i87 = lshr i32 %i84, 4 | |
| %i88 = add nsw i32 %i87, -8 | |
| %i89 = sitofp i32 %i86 to float | |
| %i90 = fmul float %i28, %i89 | |
| %i91 = getelementptr inbounds nuw i8, ptr %i31, i32 16 | |
| store float %i90, ptr %i91, align 4 | |
| %i92 = sitofp i32 %i88 to float | |
| %i93 = fmul float %i28, %i92 | |
| %i94 = getelementptr inbounds nuw i8, ptr %i31, i32 80 | |
| store float %i93, ptr %i94, align 4 | |
| %i95 = getelementptr inbounds nuw i8, ptr %i10, i32 7 | |
| %i96 = load i8, ptr %i95, align 1 | |
| %i97 = zext i8 %i96 to i32 | |
| %i98 = and i32 %i97, 15 | |
| %i99 = add nsw i32 %i98, -8 | |
| %i100 = lshr i32 %i97, 4 | |
| %i101 = add nsw i32 %i100, -8 | |
| %i102 = sitofp i32 %i99 to float | |
| %i103 = fmul float %i28, %i102 | |
| %i104 = getelementptr inbounds nuw i8, ptr %i31, i32 20 | |
| store float %i103, ptr %i104, align 4 | |
| %i105 = sitofp i32 %i101 to float | |
| %i106 = fmul float %i28, %i105 | |
| %i107 = getelementptr inbounds nuw i8, ptr %i31, i32 84 | |
| store float %i106, ptr %i107, align 4 | |
| %i108 = getelementptr inbounds nuw i8, ptr %i10, i32 8 | |
| %i109 = load i8, ptr %i108, align 1 | |
| %i110 = zext i8 %i109 to i32 | |
| %i111 = and i32 %i110, 15 | |
| %i112 = add nsw i32 %i111, -8 | |
| %i113 = lshr i32 %i110, 4 | |
| %i114 = add nsw i32 %i113, -8 | |
| %i115 = sitofp i32 %i112 to float | |
| %i116 = fmul float %i28, %i115 | |
| %i117 = getelementptr inbounds nuw i8, ptr %i31, i32 24 | |
| store float %i116, ptr %i117, align 4 | |
| %i118 = sitofp i32 %i114 to float | |
| %i119 = fmul float %i28, %i118 | |
| %i120 = getelementptr inbounds nuw i8, ptr %i31, i32 88 | |
| store float %i119, ptr %i120, align 4 | |
| %i121 = getelementptr inbounds nuw i8, ptr %i10, i32 9 | |
| %i122 = load i8, ptr %i121, align 1 | |
| %i123 = zext i8 %i122 to i32 | |
| %i124 = and i32 %i123, 15 | |
| %i125 = add nsw i32 %i124, -8 | |
| %i126 = lshr i32 %i123, 4 | |
| %i127 = add nsw i32 %i126, -8 | |
| %i128 = sitofp i32 %i125 to float | |
| %i129 = fmul float %i28, %i128 | |
| %i130 = getelementptr inbounds nuw i8, ptr %i31, i32 28 | |
| store float %i129, ptr %i130, align 4 | |
| %i131 = sitofp i32 %i127 to float | |
| %i132 = fmul float %i28, %i131 | |
| %i133 = getelementptr inbounds nuw i8, ptr %i31, i32 92 | |
| store float %i132, ptr %i133, align 4 | |
| %i134 = getelementptr inbounds nuw i8, ptr %i10, i32 10 | |
| %i135 = load i8, ptr %i134, align 1 | |
| %i136 = zext i8 %i135 to i32 | |
| %i137 = and i32 %i136, 15 | |
| %i138 = add nsw i32 %i137, -8 | |
| %i139 = lshr i32 %i136, 4 | |
| %i140 = add nsw i32 %i139, -8 | |
| %i141 = sitofp i32 %i138 to float | |
| %i142 = fmul float %i28, %i141 | |
| %i143 = getelementptr inbounds nuw i8, ptr %i31, i32 32 | |
| store float %i142, ptr %i143, align 4 | |
| %i144 = sitofp i32 %i140 to float | |
| %i145 = fmul float %i28, %i144 | |
| %i146 = getelementptr inbounds nuw i8, ptr %i31, i32 96 | |
| store float %i145, ptr %i146, align 4 | |
| %i147 = getelementptr inbounds nuw i8, ptr %i10, i32 11 | |
| %i148 = load i8, ptr %i147, align 1 | |
| %i149 = zext i8 %i148 to i32 | |
| %i150 = and i32 %i149, 15 | |
| %i151 = add nsw i32 %i150, -8 | |
| %i152 = lshr i32 %i149, 4 | |
| %i153 = add nsw i32 %i152, -8 | |
| %i154 = sitofp i32 %i151 to float | |
| %i155 = fmul float %i28, %i154 | |
| %i156 = getelementptr inbounds nuw i8, ptr %i31, i32 36 | |
| store float %i155, ptr %i156, align 4 | |
| %i157 = sitofp i32 %i153 to float | |
| %i158 = fmul float %i28, %i157 | |
| %i159 = getelementptr inbounds nuw i8, ptr %i31, i32 100 | |
| store float %i158, ptr %i159, align 4 | |
| %i160 = getelementptr inbounds nuw i8, ptr %i10, i32 12 | |
| %i161 = load i8, ptr %i160, align 1 | |
| %i162 = zext i8 %i161 to i32 | |
| %i163 = and i32 %i162, 15 | |
| %i164 = add nsw i32 %i163, -8 | |
| %i165 = lshr i32 %i162, 4 | |
| %i166 = add nsw i32 %i165, -8 | |
| %i167 = sitofp i32 %i164 to float | |
| %i168 = fmul float %i28, %i167 | |
| %i169 = getelementptr inbounds nuw i8, ptr %i31, i32 40 | |
| store float %i168, ptr %i169, align 4 | |
| %i170 = sitofp i32 %i166 to float | |
| %i171 = fmul float %i28, %i170 | |
| %i172 = getelementptr inbounds nuw i8, ptr %i31, i32 104 | |
| store float %i171, ptr %i172, align 4 | |
| %i173 = getelementptr inbounds nuw i8, ptr %i10, i32 13 | |
| %i174 = load i8, ptr %i173, align 1 | |
| %i175 = zext i8 %i174 to i32 | |
| %i176 = and i32 %i175, 15 | |
| %i177 = add nsw i32 %i176, -8 | |
| %i178 = lshr i32 %i175, 4 | |
| %i179 = add nsw i32 %i178, -8 | |
| %i180 = sitofp i32 %i177 to float | |
| %i181 = fmul float %i28, %i180 | |
| %i182 = getelementptr inbounds nuw i8, ptr %i31, i32 44 | |
| store float %i181, ptr %i182, align 4 | |
| %i183 = sitofp i32 %i179 to float | |
| %i184 = fmul float %i28, %i183 | |
| %i185 = getelementptr inbounds nuw i8, ptr %i31, i32 108 | |
| store float %i184, ptr %i185, align 4 | |
| %i186 = getelementptr inbounds nuw i8, ptr %i10, i32 14 | |
| %i187 = load i8, ptr %i186, align 1 | |
| %i188 = zext i8 %i187 to i32 | |
| %i189 = and i32 %i188, 15 | |
| %i190 = add nsw i32 %i189, -8 | |
| %i191 = lshr i32 %i188, 4 | |
| %i192 = add nsw i32 %i191, -8 | |
| %i193 = sitofp i32 %i190 to float | |
| %i194 = fmul float %i28, %i193 | |
| %i195 = getelementptr inbounds nuw i8, ptr %i31, i32 48 | |
| store float %i194, ptr %i195, align 4 | |
| %i196 = sitofp i32 %i192 to float | |
| %i197 = fmul float %i28, %i196 | |
| %i198 = getelementptr inbounds nuw i8, ptr %i31, i32 112 | |
| store float %i197, ptr %i198, align 4 | |
| %i199 = getelementptr inbounds nuw i8, ptr %i10, i32 15 | |
| %i200 = load i8, ptr %i199, align 1 | |
| %i201 = zext i8 %i200 to i32 | |
| %i202 = and i32 %i201, 15 | |
| %i203 = add nsw i32 %i202, -8 | |
| %i204 = lshr i32 %i201, 4 | |
| %i205 = add nsw i32 %i204, -8 | |
| %i206 = sitofp i32 %i203 to float | |
| %i207 = fmul float %i28, %i206 | |
| %i208 = getelementptr inbounds nuw i8, ptr %i31, i32 52 | |
| store float %i207, ptr %i208, align 4 | |
| %i209 = sitofp i32 %i205 to float | |
| %i210 = fmul float %i28, %i209 | |
| %i211 = getelementptr inbounds nuw i8, ptr %i31, i32 116 | |
| store float %i210, ptr %i211, align 4 | |
| %i212 = getelementptr inbounds nuw i8, ptr %i10, i32 16 | |
| %i213 = load i8, ptr %i212, align 1 | |
| %i214 = zext i8 %i213 to i32 | |
| %i215 = and i32 %i214, 15 | |
| %i216 = add nsw i32 %i215, -8 | |
| %i217 = lshr i32 %i214, 4 | |
| %i218 = add nsw i32 %i217, -8 | |
| %i219 = sitofp i32 %i216 to float | |
| %i220 = fmul float %i28, %i219 | |
| %i221 = getelementptr inbounds nuw i8, ptr %i31, i32 56 | |
| store float %i220, ptr %i221, align 4 | |
| %i222 = sitofp i32 %i218 to float | |
| %i223 = fmul float %i28, %i222 | |
| %i224 = getelementptr inbounds nuw i8, ptr %i31, i32 120 | |
| store float %i223, ptr %i224, align 4 | |
| %i225 = getelementptr inbounds nuw i8, ptr %i10, i32 17 | |
| %i226 = load i8, ptr %i225, align 1 | |
| %i227 = zext i8 %i226 to i32 | |
| %i228 = and i32 %i227, 15 | |
| %i229 = add nsw i32 %i228, -8 | |
| %i230 = lshr i32 %i227, 4 | |
| %i231 = add nsw i32 %i230, -8 | |
| %i232 = sitofp i32 %i229 to float | |
| %i233 = fmul float %i28, %i232 | |
| %i234 = getelementptr inbounds nuw i8, ptr %i31, i32 60 | |
| store float %i233, ptr %i234, align 4 | |
| %i235 = sitofp i32 %i231 to float | |
| %i236 = fmul float %i28, %i235 | |
| %i237 = getelementptr inbounds nuw i8, ptr %i31, i32 124 | |
| store float %i236, ptr %i237, align 4 | |
| %i238 = add nuw nsw i32 %i9, 1 | |
| %i239 = icmp eq i32 %i238, %i5 | |
| br i1 %i239, label %bb7, label %bb8 | |
| } | |
| ; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) | |
| declare float @llvm.fmuladd.f32(float, float, float) | |