| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 |
| ; RUN: opt -S < %s -p loop-vectorize -force-target-supports-scalable-vectors -force-vector-width='vscale x 2' -force-target-supports-masked-memory-ops -tail-folding-policy=must-fold-tail -force-tail-folding-style=data - | FileCheck %s --check-prefix=DATA |
| ; RUN: opt -S < %s -p loop-vectorize -force-target-supports-scalable-vectors -force-vector-width='vscale x 2' -force-target-supports-masked-memory-ops -tail-folding-policy=must-fold-tail -force-tail-folding-style=data-without-lane-mask - | FileCheck %s --check-prefix=DATA_NO_LANEMASK |
| ; RUN: opt -S < %s -p loop-vectorize -force-target-supports-scalable-vectors -force-vector-width='vscale x 2' -force-target-supports-masked-memory-ops -tail-folding-policy=must-fold-tail -force-tail-folding-style=data-and-control - | FileCheck %s --check-prefix=DATA_AND_CONTROL |
| |
| |
| define i64 @argmin_first_index(ptr %arr, i64 %n, i64 %start) { |
| ; DATA-LABEL: define i64 @argmin_first_index( |
| ; DATA-SAME: ptr [[ARR:%.*]], i64 [[N:%.*]], i64 [[START:%.*]]) { |
| ; DATA-NEXT: [[ENTRY:.*:]] |
| ; DATA-NEXT: br label %[[VECTOR_PH:.*]] |
| ; DATA: [[VECTOR_PH]]: |
| ; DATA-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64() |
| ; DATA-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP4]], 1 |
| ; DATA-NEXT: [[TMP10:%.*]] = sub i64 [[TMP1]], 1 |
| ; DATA-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP10]] |
| ; DATA-NEXT: [[TMP0:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]] |
| ; DATA-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[TMP0]] |
| ; DATA-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[START]], i64 0 |
| ; DATA-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA-NEXT: [[TMP3:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64() |
| ; DATA-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0 |
| ; DATA-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; DATA: [[VECTOR_BODY]]: |
| ; DATA-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP3]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i64> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[VEC_PHI3:%.*]] = phi <vscale x 2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP9:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[INDEX]], i64 [[N]]) |
| ; DATA-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[ARR]], i64 [[INDEX]] |
| ; DATA-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.masked.load.nxv2i64.p0(ptr align 4 [[TMP2]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> poison) |
| ; DATA-NEXT: [[TMP5:%.*]] = icmp slt <vscale x 2 x i64> [[WIDE_MASKED_LOAD]], [[VEC_PHI]] |
| ; DATA-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i64> @llvm.smin.nxv2i64(<vscale x 2 x i64> [[WIDE_MASKED_LOAD]], <vscale x 2 x i64> [[VEC_PHI]]) |
| ; DATA-NEXT: [[TMP7]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> [[TMP6]], <vscale x 2 x i64> [[VEC_PHI]] |
| ; DATA-NEXT: [[TMP8:%.*]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i1> zeroinitializer |
| ; DATA-NEXT: [[TMP9]] = select <vscale x 2 x i1> [[TMP8]], <vscale x 2 x i64> [[VEC_IND]], <vscale x 2 x i64> [[VEC_PHI3]] |
| ; DATA-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP1]] |
| ; DATA-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT2]] |
| ; DATA-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; DATA-NEXT: br i1 [[TMP29]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; DATA: [[MIDDLE_BLOCK]]: |
| ; DATA-NEXT: [[TMP30:%.*]] = call i64 @llvm.vector.reduce.smin.nxv2i64(<vscale x 2 x i64> [[TMP7]]) |
| ; DATA-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP30]], i64 0 |
| ; DATA-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT4]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA-NEXT: [[TMP12:%.*]] = icmp eq <vscale x 2 x i64> [[TMP7]], [[BROADCAST_SPLAT5]] |
| ; DATA-NEXT: [[TMP13:%.*]] = select <vscale x 2 x i1> [[TMP12]], <vscale x 2 x i64> [[TMP9]], <vscale x 2 x i64> splat (i64 -1) |
| ; DATA-NEXT: [[TMP33:%.*]] = call i64 @llvm.vector.reduce.umin.nxv2i64(<vscale x 2 x i64> [[TMP13]]) |
| ; DATA-NEXT: [[TMP34:%.*]] = icmp eq i64 [[TMP30]], [[START]] |
| ; DATA-NEXT: [[TMP35:%.*]] = select i1 [[TMP34]], i64 0, i64 [[TMP33]] |
| ; DATA-NEXT: br label %[[FOR_END:.*]] |
| ; DATA: [[FOR_END]]: |
| ; DATA-NEXT: ret i64 [[TMP35]] |
| ; |
| ; DATA_NO_LANEMASK-LABEL: define i64 @argmin_first_index( |
| ; DATA_NO_LANEMASK-SAME: ptr [[ARR:%.*]], i64 [[N:%.*]], i64 [[START:%.*]]) { |
| ; DATA_NO_LANEMASK-NEXT: [[ENTRY:.*:]] |
| ; DATA_NO_LANEMASK-NEXT: br label %[[VECTOR_PH:.*]] |
| ; DATA_NO_LANEMASK: [[VECTOR_PH]]: |
| ; DATA_NO_LANEMASK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; DATA_NO_LANEMASK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP5]], 1 |
| ; DATA_NO_LANEMASK-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], 1 |
| ; DATA_NO_LANEMASK-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP2]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP0:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]] |
| ; DATA_NO_LANEMASK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[TMP0]] |
| ; DATA_NO_LANEMASK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[START]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[TMP3:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64() |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT3]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; DATA_NO_LANEMASK: [[VECTOR_BODY]]: |
| ; DATA_NO_LANEMASK-NEXT: [[TMP20:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP3]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i64> [ [[BROADCAST_SPLAT2]], %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_PHI5:%.*]] = phi <vscale x 2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP10:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP4:%.*]] = icmp ule <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[ARR]], i64 [[TMP20]] |
| ; DATA_NO_LANEMASK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.masked.load.nxv2i64.p0(ptr align 4 [[TMP21]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i64> poison) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP6:%.*]] = icmp slt <vscale x 2 x i64> [[WIDE_MASKED_LOAD]], [[VEC_PHI]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP7:%.*]] = call <vscale x 2 x i64> @llvm.smin.nxv2i64(<vscale x 2 x i64> [[WIDE_MASKED_LOAD]], <vscale x 2 x i64> [[VEC_PHI]]) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP8]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i64> [[TMP7]], <vscale x 2 x i64> [[VEC_PHI]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP9:%.*]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i1> [[TMP6]], <vscale x 2 x i1> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[TMP10]] = select <vscale x 2 x i1> [[TMP9]], <vscale x 2 x i64> [[VEC_IND]], <vscale x 2 x i64> [[VEC_PHI5]] |
| ; DATA_NO_LANEMASK-NEXT: [[INDEX_NEXT]] = add i64 [[TMP20]], [[TMP1]] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP30:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; DATA_NO_LANEMASK-NEXT: br i1 [[TMP30]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; DATA_NO_LANEMASK: [[MIDDLE_BLOCK]]: |
| ; DATA_NO_LANEMASK-NEXT: [[TMP31:%.*]] = call i64 @llvm.vector.reduce.smin.nxv2i64(<vscale x 2 x i64> [[TMP8]]) |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP31]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT6]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[TMP13:%.*]] = icmp eq <vscale x 2 x i64> [[TMP8]], [[BROADCAST_SPLAT7]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP14:%.*]] = select <vscale x 2 x i1> [[TMP13]], <vscale x 2 x i64> [[TMP10]], <vscale x 2 x i64> splat (i64 -1) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP34:%.*]] = call i64 @llvm.vector.reduce.umin.nxv2i64(<vscale x 2 x i64> [[TMP14]]) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP35:%.*]] = icmp eq i64 [[TMP31]], [[START]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP36:%.*]] = select i1 [[TMP35]], i64 0, i64 [[TMP34]] |
| ; DATA_NO_LANEMASK-NEXT: br label %[[FOR_END:.*]] |
| ; DATA_NO_LANEMASK: [[FOR_END]]: |
| ; DATA_NO_LANEMASK-NEXT: ret i64 [[TMP36]] |
| ; |
| ; DATA_AND_CONTROL-LABEL: define i64 @argmin_first_index( |
| ; DATA_AND_CONTROL-SAME: ptr [[ARR:%.*]], i64 [[N:%.*]], i64 [[START:%.*]]) { |
| ; DATA_AND_CONTROL-NEXT: [[ENTRY:.*:]] |
| ; DATA_AND_CONTROL-NEXT: br label %[[VECTOR_PH:.*]] |
| ; DATA_AND_CONTROL: [[VECTOR_PH]]: |
| ; DATA_AND_CONTROL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; DATA_AND_CONTROL-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 1 |
| ; DATA_AND_CONTROL-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 0, i64 [[N]]) |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[START]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64() |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: br label %[[PRED_LOAD_CONTINUE5:.*]] |
| ; DATA_AND_CONTROL: [[PRED_LOAD_CONTINUE5]]: |
| ; DATA_AND_CONTROL-NEXT: [[TMP18:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 2 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], %[[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP2]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i64> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[VEC_PHI3:%.*]] = phi <vscale x 2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[ARR]], i64 [[TMP18]] |
| ; DATA_AND_CONTROL-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.masked.load.nxv2i64.p0(ptr align 4 [[TMP19]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> poison) |
| ; DATA_AND_CONTROL-NEXT: [[TMP4:%.*]] = icmp slt <vscale x 2 x i64> [[WIDE_MASKED_LOAD]], [[VEC_PHI]] |
| ; DATA_AND_CONTROL-NEXT: [[TMP5:%.*]] = call <vscale x 2 x i64> @llvm.smin.nxv2i64(<vscale x 2 x i64> [[WIDE_MASKED_LOAD]], <vscale x 2 x i64> [[VEC_PHI]]) |
| ; DATA_AND_CONTROL-NEXT: [[TMP6]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> [[TMP5]], <vscale x 2 x i64> [[VEC_PHI]] |
| ; DATA_AND_CONTROL-NEXT: [[TMP7:%.*]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i1> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: [[TMP8]] = select <vscale x 2 x i1> [[TMP7]], <vscale x 2 x i64> [[VEC_IND]], <vscale x 2 x i64> [[VEC_PHI3]] |
| ; DATA_AND_CONTROL-NEXT: [[INDEX_NEXT]] = add i64 [[TMP18]], [[TMP1]] |
| ; DATA_AND_CONTROL-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[INDEX_NEXT]], i64 [[N]]) |
| ; DATA_AND_CONTROL-NEXT: [[TMP28:%.*]] = extractelement <vscale x 2 x i1> [[ACTIVE_LANE_MASK_NEXT]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], true |
| ; DATA_AND_CONTROL-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT2]] |
| ; DATA_AND_CONTROL-NEXT: br i1 [[TMP29]], label %[[MIDDLE_BLOCK:.*]], label %[[PRED_LOAD_CONTINUE5]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; DATA_AND_CONTROL: [[MIDDLE_BLOCK]]: |
| ; DATA_AND_CONTROL-NEXT: [[TMP30:%.*]] = call i64 @llvm.vector.reduce.smin.nxv2i64(<vscale x 2 x i64> [[TMP6]]) |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP30]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT4]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: [[TMP12:%.*]] = icmp eq <vscale x 2 x i64> [[TMP6]], [[BROADCAST_SPLAT5]] |
| ; DATA_AND_CONTROL-NEXT: [[TMP13:%.*]] = select <vscale x 2 x i1> [[TMP12]], <vscale x 2 x i64> [[TMP8]], <vscale x 2 x i64> splat (i64 -1) |
| ; DATA_AND_CONTROL-NEXT: [[TMP33:%.*]] = call i64 @llvm.vector.reduce.umin.nxv2i64(<vscale x 2 x i64> [[TMP13]]) |
| ; DATA_AND_CONTROL-NEXT: [[TMP34:%.*]] = icmp eq i64 [[TMP30]], [[START]] |
| ; DATA_AND_CONTROL-NEXT: [[TMP35:%.*]] = select i1 [[TMP34]], i64 0, i64 [[TMP33]] |
| ; DATA_AND_CONTROL-NEXT: br label %[[FOR_END:.*]] |
| ; DATA_AND_CONTROL: [[FOR_END]]: |
| ; DATA_AND_CONTROL-NEXT: ret i64 [[TMP35]] |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] |
| %rdx = phi i64 [ %start, %entry ], [ %min, %for.body ] |
| %rdx2 = phi i64 [ 0, %entry ], [ %select, %for.body ] |
| %arrayidx = getelementptr inbounds nuw [8 x i8], ptr %arr, i64 %iv |
| %0 = load i64, ptr %arrayidx |
| %cmp = icmp slt i64 %0, %rdx |
| %select = select i1 %cmp, i64 %iv, i64 %rdx2 |
| %min = tail call i64 @llvm.smin.i64(i64 %0, i64 %rdx) |
| %iv.next = add nuw nsw i64 %iv, 1 |
| %exitcond.not = icmp eq i64 %iv.next, %n |
| br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0 |
| |
| for.end: |
| ret i64 %select |
| } |
| |
| |
| define i64 @argmin_last_index(ptr %arr, i64 %n, i64 %start) { |
| ; DATA-LABEL: define i64 @argmin_last_index( |
| ; DATA-SAME: ptr [[ARR:%.*]], i64 [[N:%.*]], i64 [[START:%.*]]) { |
| ; DATA-NEXT: [[ENTRY:.*:]] |
| ; DATA-NEXT: br label %[[VECTOR_PH:.*]] |
| ; DATA: [[VECTOR_PH]]: |
| ; DATA-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64() |
| ; DATA-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP4]], 1 |
| ; DATA-NEXT: [[TMP10:%.*]] = sub i64 [[TMP1]], 1 |
| ; DATA-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP10]] |
| ; DATA-NEXT: [[TMP0:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]] |
| ; DATA-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[TMP0]] |
| ; DATA-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[START]], i64 0 |
| ; DATA-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA-NEXT: [[TMP3:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64() |
| ; DATA-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0 |
| ; DATA-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; DATA: [[VECTOR_BODY]]: |
| ; DATA-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP3]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i64> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[VEC_PHI3:%.*]] = phi <vscale x 2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP9:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[INDEX]], i64 [[N]]) |
| ; DATA-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[ARR]], i64 [[INDEX]] |
| ; DATA-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.masked.load.nxv2i64.p0(ptr align 4 [[TMP2]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> poison) |
| ; DATA-NEXT: [[TMP5:%.*]] = icmp sle <vscale x 2 x i64> [[WIDE_MASKED_LOAD]], [[VEC_PHI]] |
| ; DATA-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i64> @llvm.smin.nxv2i64(<vscale x 2 x i64> [[WIDE_MASKED_LOAD]], <vscale x 2 x i64> [[VEC_PHI]]) |
| ; DATA-NEXT: [[TMP7]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> [[TMP6]], <vscale x 2 x i64> [[VEC_PHI]] |
| ; DATA-NEXT: [[TMP8:%.*]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i1> [[TMP5]], <vscale x 2 x i1> zeroinitializer |
| ; DATA-NEXT: [[TMP9]] = select <vscale x 2 x i1> [[TMP8]], <vscale x 2 x i64> [[VEC_IND]], <vscale x 2 x i64> [[VEC_PHI3]] |
| ; DATA-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP1]] |
| ; DATA-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT2]] |
| ; DATA-NEXT: [[TMP29:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; DATA-NEXT: br i1 [[TMP29]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; DATA: [[MIDDLE_BLOCK]]: |
| ; DATA-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.smin.nxv2i64(<vscale x 2 x i64> [[TMP7]]) |
| ; DATA-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP11]], i64 0 |
| ; DATA-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT4]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA-NEXT: [[TMP12:%.*]] = icmp eq <vscale x 2 x i64> [[TMP7]], [[BROADCAST_SPLAT5]] |
| ; DATA-NEXT: [[TMP13:%.*]] = select <vscale x 2 x i1> [[TMP12]], <vscale x 2 x i64> [[TMP9]], <vscale x 2 x i64> splat (i64 -9223372036854775808) |
| ; DATA-NEXT: [[TMP33:%.*]] = call i64 @llvm.vector.reduce.smax.nxv2i64(<vscale x 2 x i64> [[TMP13]]) |
| ; DATA-NEXT: [[TMP34:%.*]] = icmp ne i64 [[TMP33]], -9223372036854775808 |
| ; DATA-NEXT: [[TMP35:%.*]] = select i1 [[TMP34]], i64 [[TMP33]], i64 0 |
| ; DATA-NEXT: br label %[[FOR_END:.*]] |
| ; DATA: [[FOR_END]]: |
| ; DATA-NEXT: ret i64 [[TMP35]] |
| ; |
| ; DATA_NO_LANEMASK-LABEL: define i64 @argmin_last_index( |
| ; DATA_NO_LANEMASK-SAME: ptr [[ARR:%.*]], i64 [[N:%.*]], i64 [[START:%.*]]) { |
| ; DATA_NO_LANEMASK-NEXT: [[ENTRY:.*:]] |
| ; DATA_NO_LANEMASK-NEXT: br label %[[VECTOR_PH:.*]] |
| ; DATA_NO_LANEMASK: [[VECTOR_PH]]: |
| ; DATA_NO_LANEMASK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
| ; DATA_NO_LANEMASK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP5]], 1 |
| ; DATA_NO_LANEMASK-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], 1 |
| ; DATA_NO_LANEMASK-NEXT: [[N_RND_UP:%.*]] = add i64 [[N]], [[TMP2]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP0:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]] |
| ; DATA_NO_LANEMASK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[TMP0]] |
| ; DATA_NO_LANEMASK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[N]], 1 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[START]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[TMP3:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64() |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT4:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT3]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; DATA_NO_LANEMASK: [[VECTOR_BODY]]: |
| ; DATA_NO_LANEMASK-NEXT: [[TMP20:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP3]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i64> [ [[BROADCAST_SPLAT2]], %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_PHI5:%.*]] = phi <vscale x 2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP10:%.*]], %[[VECTOR_BODY]] ] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP4:%.*]] = icmp ule <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[ARR]], i64 [[TMP20]] |
| ; DATA_NO_LANEMASK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.masked.load.nxv2i64.p0(ptr align 4 [[TMP21]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i64> poison) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP6:%.*]] = icmp sle <vscale x 2 x i64> [[WIDE_MASKED_LOAD]], [[VEC_PHI]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP7:%.*]] = call <vscale x 2 x i64> @llvm.smin.nxv2i64(<vscale x 2 x i64> [[WIDE_MASKED_LOAD]], <vscale x 2 x i64> [[VEC_PHI]]) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP8]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i64> [[TMP7]], <vscale x 2 x i64> [[VEC_PHI]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP9:%.*]] = select <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i1> [[TMP6]], <vscale x 2 x i1> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[TMP10]] = select <vscale x 2 x i1> [[TMP9]], <vscale x 2 x i64> [[VEC_IND]], <vscale x 2 x i64> [[VEC_PHI5]] |
| ; DATA_NO_LANEMASK-NEXT: [[INDEX_NEXT]] = add i64 [[TMP20]], [[TMP1]] |
| ; DATA_NO_LANEMASK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT4]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP30:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; DATA_NO_LANEMASK-NEXT: br i1 [[TMP30]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; DATA_NO_LANEMASK: [[MIDDLE_BLOCK]]: |
| ; DATA_NO_LANEMASK-NEXT: [[TMP12:%.*]] = call i64 @llvm.vector.reduce.smin.nxv2i64(<vscale x 2 x i64> [[TMP8]]) |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP12]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT6]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_NO_LANEMASK-NEXT: [[TMP13:%.*]] = icmp eq <vscale x 2 x i64> [[TMP8]], [[BROADCAST_SPLAT7]] |
| ; DATA_NO_LANEMASK-NEXT: [[TMP14:%.*]] = select <vscale x 2 x i1> [[TMP13]], <vscale x 2 x i64> [[TMP10]], <vscale x 2 x i64> splat (i64 -9223372036854775808) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP34:%.*]] = call i64 @llvm.vector.reduce.smax.nxv2i64(<vscale x 2 x i64> [[TMP14]]) |
| ; DATA_NO_LANEMASK-NEXT: [[TMP35:%.*]] = icmp ne i64 [[TMP34]], -9223372036854775808 |
| ; DATA_NO_LANEMASK-NEXT: [[TMP36:%.*]] = select i1 [[TMP35]], i64 [[TMP34]], i64 0 |
| ; DATA_NO_LANEMASK-NEXT: br label %[[FOR_END:.*]] |
| ; DATA_NO_LANEMASK: [[FOR_END]]: |
| ; DATA_NO_LANEMASK-NEXT: ret i64 [[TMP36]] |
| ; |
| ; DATA_AND_CONTROL-LABEL: define i64 @argmin_last_index( |
| ; DATA_AND_CONTROL-SAME: ptr [[ARR:%.*]], i64 [[N:%.*]], i64 [[START:%.*]]) { |
| ; DATA_AND_CONTROL-NEXT: [[ENTRY:.*:]] |
| ; DATA_AND_CONTROL-NEXT: br label %[[VECTOR_PH:.*]] |
| ; DATA_AND_CONTROL: [[VECTOR_PH]]: |
| ; DATA_AND_CONTROL-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; DATA_AND_CONTROL-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 1 |
| ; DATA_AND_CONTROL-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 0, i64 [[N]]) |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[START]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64() |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP1]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: br label %[[PRED_LOAD_CONTINUE5:.*]] |
| ; DATA_AND_CONTROL: [[PRED_LOAD_CONTINUE5]]: |
| ; DATA_AND_CONTROL-NEXT: [[TMP18:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 2 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], %[[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[TMP2]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i64> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[VEC_PHI3:%.*]] = phi <vscale x 2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP8:%.*]], %[[PRED_LOAD_CONTINUE5]] ] |
| ; DATA_AND_CONTROL-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [8 x i8], ptr [[ARR]], i64 [[TMP18]] |
| ; DATA_AND_CONTROL-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i64> @llvm.masked.load.nxv2i64.p0(ptr align 4 [[TMP19]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> poison) |
| ; DATA_AND_CONTROL-NEXT: [[TMP4:%.*]] = icmp sle <vscale x 2 x i64> [[WIDE_MASKED_LOAD]], [[VEC_PHI]] |
| ; DATA_AND_CONTROL-NEXT: [[TMP5:%.*]] = call <vscale x 2 x i64> @llvm.smin.nxv2i64(<vscale x 2 x i64> [[WIDE_MASKED_LOAD]], <vscale x 2 x i64> [[VEC_PHI]]) |
| ; DATA_AND_CONTROL-NEXT: [[TMP6]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i64> [[TMP5]], <vscale x 2 x i64> [[VEC_PHI]] |
| ; DATA_AND_CONTROL-NEXT: [[TMP7:%.*]] = select <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i1> [[TMP4]], <vscale x 2 x i1> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: [[TMP8]] = select <vscale x 2 x i1> [[TMP7]], <vscale x 2 x i64> [[VEC_IND]], <vscale x 2 x i64> [[VEC_PHI3]] |
| ; DATA_AND_CONTROL-NEXT: [[INDEX_NEXT]] = add i64 [[TMP18]], [[TMP1]] |
| ; DATA_AND_CONTROL-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[INDEX_NEXT]], i64 [[N]]) |
| ; DATA_AND_CONTROL-NEXT: [[TMP28:%.*]] = extractelement <vscale x 2 x i1> [[ACTIVE_LANE_MASK_NEXT]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], true |
| ; DATA_AND_CONTROL-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT2]] |
| ; DATA_AND_CONTROL-NEXT: br i1 [[TMP29]], label %[[MIDDLE_BLOCK:.*]], label %[[PRED_LOAD_CONTINUE5]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; DATA_AND_CONTROL: [[MIDDLE_BLOCK]]: |
| ; DATA_AND_CONTROL-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.smin.nxv2i64(<vscale x 2 x i64> [[TMP6]]) |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP11]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT4]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer |
| ; DATA_AND_CONTROL-NEXT: [[TMP12:%.*]] = icmp eq <vscale x 2 x i64> [[TMP6]], [[BROADCAST_SPLAT5]] |
| ; DATA_AND_CONTROL-NEXT: [[TMP13:%.*]] = select <vscale x 2 x i1> [[TMP12]], <vscale x 2 x i64> [[TMP8]], <vscale x 2 x i64> splat (i64 -9223372036854775808) |
| ; DATA_AND_CONTROL-NEXT: [[TMP33:%.*]] = call i64 @llvm.vector.reduce.smax.nxv2i64(<vscale x 2 x i64> [[TMP13]]) |
| ; DATA_AND_CONTROL-NEXT: [[TMP34:%.*]] = icmp ne i64 [[TMP33]], -9223372036854775808 |
| ; DATA_AND_CONTROL-NEXT: [[TMP35:%.*]] = select i1 [[TMP34]], i64 [[TMP33]], i64 0 |
| ; DATA_AND_CONTROL-NEXT: br label %[[FOR_END:.*]] |
| ; DATA_AND_CONTROL: [[FOR_END]]: |
| ; DATA_AND_CONTROL-NEXT: ret i64 [[TMP35]] |
| ; |
| entry: |
| br label %for.body |
| |
| for.body: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] |
| %rdx = phi i64 [ %start, %entry ], [ %min, %for.body ] |
| %rdx2 = phi i64 [ 0, %entry ], [ %select, %for.body ] |
| %arrayidx = getelementptr inbounds nuw [8 x i8], ptr %arr, i64 %iv |
| %0 = load i64, ptr %arrayidx |
| %cmp = icmp sle i64 %0, %rdx |
| %select = select i1 %cmp, i64 %iv, i64 %rdx2 |
| %min = tail call i64 @llvm.smin.i64(i64 %0, i64 %rdx) |
| %iv.next = add nuw nsw i64 %iv, 1 |
| %exitcond.not = icmp eq i64 %iv.next, %n |
| br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0 |
| |
| for.end: |
| ret i64 %select |
| } |
| |
| !0 = distinct !{!0, !1} |
| !1 = !{!"llvm.loop.vectorize.enable"} |