| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter "br i1|= select |!prof|!llvm.loop|^.*:" --version 6 |
| ; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s |
| |
| @a = common global [250 x i32] zeroinitializer, align 16 |
| |
| define void @wrap_check(i32 %n, i32 %step) !prof !0 { |
| ; CHECK-LABEL: define void @wrap_check( |
| ; CHECK-SAME: i32 [[N:%.*]], i32 [[STEP:%.*]]) !prof [[PROF0:![0-9]+]] { |
| ; CHECK: [[ENTRY:.*:]] |
| ; CHECK: br i1 [[POS:%.*]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT:.*]] |
| ; CHECK: [[LOOP_PREHEADER]]: |
| ; CHECK: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]] |
| ; CHECK: [[VECTOR_SCEVCHECK]]: |
| ; CHECK: [[TMP4:%.*]] = select i1 [[TMP3:%.*]], i8 [[TMP2:%.*]], i8 [[TMP1:%.*]] |
| ; CHECK: [[TMP9:%.*]] = select i1 [[TMP3]], i1 [[TMP8:%.*]], i1 [[TMP7:%.*]] |
| ; CHECK: br i1 [[TMP16:%.*]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK: [[VECTOR_BODY:.*]]: |
| ; CHECK: br i1 [[TMP23:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP1:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK: br i1 [[CMP_N:%.*]], label %[[EXIT_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK: [[LOOP:.*]]: |
| ; CHECK: br i1 [[EC:%.*]], label %[[EXIT_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; CHECK: [[EXIT_LOOPEXIT]]: |
| ; CHECK: [[EXIT]]: |
| ; |
| entry: |
| %pos = icmp sgt i32 %n, 0 |
| br i1 %pos, label %loop.preheader, label %exit |
| |
| loop.preheader: |
| %wide.trip.count = zext i32 %n to i64 |
| br label %loop |
| |
| loop: |
| %iv = phi i64 [ %iv.next, %loop ], [ 0, %loop.preheader ] |
| %p = phi i32 [ %add, %loop ], [ 0, %loop.preheader ] |
| %sext = shl i32 %p, 24 |
| %conv = ashr exact i32 %sext, 24 |
| %gep = getelementptr inbounds [250 x i32], ptr @a, i64 0, i64 %iv |
| store i32 %conv, ptr %gep, align 4 |
| %add = add nsw i32 %conv, %step |
| %iv.next = add nuw nsw i64 %iv, 1 |
| %ec = icmp eq i64 %iv.next, %wide.trip.count |
| br i1 %ec, label %exit, label %loop |
| |
| exit: |
| ret void |
| } |
| |
| define void @runtime_step_memcheck(ptr %in, ptr %out, i64 %n, i64 %step) !prof !0 { |
| ; CHECK-LABEL: define void @runtime_step_memcheck( |
| ; CHECK-SAME: ptr [[IN:%.*]], ptr [[OUT:%.*]], i64 [[N:%.*]], i64 [[STEP:%.*]]) !prof [[PROF0]] { |
| ; CHECK: [[ENTRY:.*:]] |
| ; CHECK: br i1 [[EMPTY:%.*]], label %[[EXIT:.*]], label %[[LOOP_PREHEADER:.*]] |
| ; CHECK: [[LOOP_PREHEADER]]: |
| ; CHECK: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]] |
| ; CHECK: [[VECTOR_SCEVCHECK]]: |
| ; CHECK: [[TMP4:%.*]] = select i1 [[TMP3:%.*]], i32 [[TMP2:%.*]], i32 [[TMP1:%.*]] |
| ; CHECK: [[TMP9:%.*]] = select i1 [[TMP3]], i1 [[TMP8:%.*]], i1 [[TMP7:%.*]] |
| ; CHECK: br i1 [[TMP16:%.*]], label %[[SCALAR_PH]], label %[[VECTOR_MEMCHECK:.*]] |
| ; CHECK: [[VECTOR_MEMCHECK]]: |
| ; CHECK: [[UMIN:%.*]] = select i1 [[TMP23:%.*]], ptr [[IN]], ptr [[SCEVGEP1:%.*]] |
| ; CHECK: [[UMAX:%.*]] = select i1 [[TMP24:%.*]], ptr [[IN]], ptr [[SCEVGEP1]] |
| ; CHECK: br i1 [[FOUND_CONFLICT:%.*]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK: [[VECTOR_BODY:.*]]: |
| ; CHECK: br i1 [[TMP47:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK: br i1 [[CMP_N:%.*]], label %[[EXIT_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK: [[LOOP:.*]]: |
| ; CHECK: br i1 [[EC:%.*]], label %[[EXIT_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; CHECK: [[EXIT_LOOPEXIT]]: |
| ; CHECK: [[EXIT]]: |
| ; |
| entry: |
| %empty = icmp eq i64 %n, 0 |
| br i1 %empty, label %exit, label %loop.preheader |
| |
| loop.preheader: |
| br label %loop |
| |
| loop: |
| %idx = phi i64 [ 0, %loop.preheader ], [ %add, %loop ] |
| %iv = phi i64 [ 0, %loop.preheader ], [ %iv.next, %loop ] |
| %sext = shl i64 %idx, 32 |
| %conv = ashr exact i64 %sext, 32 |
| %gep.in = getelementptr inbounds i32, ptr %in, i64 %conv |
| %l = load i32, ptr %gep.in, align 4 |
| %gep.out = getelementptr inbounds i32, ptr %out, i64 %iv |
| store i32 %l, ptr %gep.out, align 4 |
| %add = add i64 %conv, %step |
| %iv.next = add nuw i64 %iv, 1 |
| %ec = icmp eq i64 %iv.next, %n |
| br i1 %ec, label %exit, label %loop |
| |
| exit: |
| ret void |
| } |
| |
| define void @wrap_check_not_profiled(i32 %n, i32 %step) { |
| ; CHECK-LABEL: define void @wrap_check_not_profiled( |
| ; CHECK-SAME: i32 [[N:%.*]], i32 [[STEP:%.*]]) { |
| ; CHECK: [[ENTRY:.*:]] |
| ; CHECK: br i1 [[POS:%.*]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT:.*]] |
| ; CHECK: [[LOOP_PREHEADER]]: |
| ; CHECK: br i1 [[MIN_ITERS_CHECK:%.*]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]] |
| ; CHECK: [[VECTOR_SCEVCHECK]]: |
| ; CHECK: [[TMP4:%.*]] = select i1 [[TMP3:%.*]], i8 [[TMP2:%.*]], i8 [[TMP1:%.*]] |
| ; CHECK: [[TMP9:%.*]] = select i1 [[TMP3]], i1 [[TMP8:%.*]], i1 [[TMP7:%.*]] |
| ; CHECK: br i1 [[TMP16:%.*]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK: [[VECTOR_BODY:.*]]: |
| ; CHECK: br i1 [[TMP23:%.*]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK: br i1 [[CMP_N:%.*]], label %[[EXIT_LOOPEXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK: [[LOOP:.*]]: |
| ; CHECK: br i1 [[EC:%.*]], label %[[EXIT_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP13:![0-9]+]] |
| ; CHECK: [[EXIT_LOOPEXIT]]: |
| ; CHECK: [[EXIT]]: |
| ; |
| entry: |
| %pos = icmp sgt i32 %n, 0 |
| br i1 %pos, label %loop.preheader, label %exit |
| |
| loop.preheader: |
| %wide.trip.count = zext i32 %n to i64 |
| br label %loop |
| |
| loop: |
| %iv = phi i64 [ %iv.next, %loop ], [ 0, %loop.preheader ] |
| %p = phi i32 [ %add, %loop ], [ 0, %loop.preheader ] |
| %sext = shl i32 %p, 24 |
| %conv = ashr exact i32 %sext, 24 |
| %gep = getelementptr inbounds [250 x i32], ptr @a, i64 0, i64 %iv |
| store i32 %conv, ptr %gep, align 4 |
| %add = add nsw i32 %conv, %step |
| %iv.next = add nuw nsw i64 %iv, 1 |
| %ec = icmp eq i64 %iv.next, %wide.trip.count |
| br i1 %ec, label %exit, label %loop |
| |
| exit: |
| ret void |
| } |
| |
| !0 = !{!"function_entry_count", i64 1000} |
| ;. |
| ; CHECK: [[PROF0]] = !{!"function_entry_count", i64 1000} |
| ; CHECK: [[LOOP1]] = distinct !{[[LOOP1]], [[META2:![0-9]+]], [[META3:![0-9]+]]} |
| ; CHECK: [[META2]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; CHECK: [[META3]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META2]]} |
| ; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META2]], [[META3]]} |
| ; CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META2]]} |
| ; CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META2]], [[META3]]} |
| ; CHECK: [[LOOP13]] = distinct !{[[LOOP13]], [[META2]]} |
| ;. |