test/Transforms/LoopVectorize/gather-scatter.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-target-supports-gather-scatter-ops=true \
; RUN:     -S < %s | FileCheck %s --check-prefixes=GATHER-SCATTER-ENABLED
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-target-supports-gather-scatter-ops=false \
; RUN:     -S < %s | FileCheck %s --check-prefixes=GATHER-SCATTER-DISABLED

; Generic gather/scatter tests using the force-target-supports-gather-scatter-ops option.

define void @gather_i32(ptr noalias %src, ptr noalias %offsets.addr, ptr noalias %dst) {
; CHECK-LABEL: define void @gather_i32(
; GATHER-SCATTER-ENABLED-LABEL: define void @gather_i32(
; GATHER-SCATTER-ENABLED-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[OFFSETS_ADDR:%.*]], ptr noalias [[DST:%.*]]) {
; GATHER-SCATTER-ENABLED-NEXT:  [[ENTRY:.*:]]
; GATHER-SCATTER-ENABLED-NEXT:    br label %[[VECTOR_PH:.*]]
; GATHER-SCATTER-ENABLED:       [[VECTOR_PH]]:
; GATHER-SCATTER-ENABLED-NEXT:    br label %[[VECTOR_BODY:.*]]
; GATHER-SCATTER-ENABLED:       [[VECTOR_BODY]]:
; GATHER-SCATTER-ENABLED-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[OFFSETS_ADDR]], i64 [[INDEX]]
; GATHER-SCATTER-ENABLED-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i64>, ptr [[TMP0]], align 8
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP1:%.*]] = getelementptr inbounds float, ptr [[SRC]], <4 x i64> [[WIDE_LOAD]]
; GATHER-SCATTER-ENABLED-NEXT:    [[WIDE_MASKED_GATHER:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0(<4 x ptr> align 4 [[TMP1]], <4 x i1> splat (i1 true), <4 x float> poison)
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP2:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[INDEX]]
; GATHER-SCATTER-ENABLED-NEXT:    store <4 x float> [[WIDE_MASKED_GATHER]], ptr [[TMP2]], align 4
; GATHER-SCATTER-ENABLED-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
; GATHER-SCATTER-ENABLED-NEXT:    br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; GATHER-SCATTER-ENABLED:       [[MIDDLE_BLOCK]]:
; GATHER-SCATTER-ENABLED-NEXT:    br label %[[EXIT:.*]]
; GATHER-SCATTER-ENABLED:       [[EXIT]]:
; GATHER-SCATTER-ENABLED-NEXT:    ret void
;
; GATHER-SCATTER-DISABLED-LABEL: define void @gather_i32(
; GATHER-SCATTER-DISABLED-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[OFFSETS_ADDR:%.*]], ptr noalias [[DST:%.*]]) {
; GATHER-SCATTER-DISABLED-NEXT:  [[ENTRY:.*:]]
; GATHER-SCATTER-DISABLED-NEXT:    br label %[[VECTOR_PH:.*]]
; GATHER-SCATTER-DISABLED:       [[VECTOR_PH]]:
; GATHER-SCATTER-DISABLED-NEXT:    br label %[[VECTOR_BODY:.*]]
; GATHER-SCATTER-DISABLED:       [[VECTOR_BODY]]:
; GATHER-SCATTER-DISABLED-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[OFFSETS_ADDR]], i64 [[INDEX]]
; GATHER-SCATTER-DISABLED-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i64>, ptr [[TMP0]], align 8
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP1:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 0
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP2:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 1
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP3:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 2
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP4:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 3
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP5:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[TMP1]]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP6:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[TMP2]]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP7:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[TMP3]]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP8:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[TMP4]]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP9:%.*]] = load float, ptr [[TMP5]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP10:%.*]] = load float, ptr [[TMP6]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP11:%.*]] = load float, ptr [[TMP7]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP12:%.*]] = load float, ptr [[TMP8]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP13:%.*]] = insertelement <4 x float> poison, float [[TMP9]], i32 0
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP14:%.*]] = insertelement <4 x float> [[TMP13]], float [[TMP10]], i32 1
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP15:%.*]] = insertelement <4 x float> [[TMP14]], float [[TMP11]], i32 2
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP16:%.*]] = insertelement <4 x float> [[TMP15]], float [[TMP12]], i32 3
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP17:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[INDEX]]
; GATHER-SCATTER-DISABLED-NEXT:    store <4 x float> [[TMP16]], ptr [[TMP17]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
; GATHER-SCATTER-DISABLED-NEXT:    br i1 [[TMP18]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; GATHER-SCATTER-DISABLED:       [[MIDDLE_BLOCK]]:
; GATHER-SCATTER-DISABLED-NEXT:    br label %[[EXIT:.*]]
; GATHER-SCATTER-DISABLED:       [[EXIT]]:
; GATHER-SCATTER-DISABLED-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %offset.addr = getelementptr inbounds i64, ptr %offsets.addr, i64 %iv
  %offset = load i64, ptr %offset.addr, align 8
  %val.addr = getelementptr inbounds float, ptr %src, i64 %offset
  %val = load float, ptr %val.addr, align 4
  %dst.addr = getelementptr inbounds float, ptr %dst, i64 %iv
  store float %val, ptr %dst.addr, align 4
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 1024
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret void
}

define void @scatter_i32(ptr noalias %src, ptr noalias %offsets.addr, ptr noalias %dst) {
; CHECK-LABEL: define void @scatter_i32(
; GATHER-SCATTER-ENABLED-LABEL: define void @scatter_i32(
; GATHER-SCATTER-ENABLED-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[OFFSETS_ADDR:%.*]], ptr noalias [[DST:%.*]]) {
; GATHER-SCATTER-ENABLED-NEXT:  [[ENTRY:.*:]]
; GATHER-SCATTER-ENABLED-NEXT:    br label %[[VECTOR_PH:.*]]
; GATHER-SCATTER-ENABLED:       [[VECTOR_PH]]:
; GATHER-SCATTER-ENABLED-NEXT:    br label %[[VECTOR_BODY:.*]]
; GATHER-SCATTER-ENABLED:       [[VECTOR_BODY]]:
; GATHER-SCATTER-ENABLED-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[OFFSETS_ADDR]], i64 [[INDEX]]
; GATHER-SCATTER-ENABLED-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i64>, ptr [[TMP0]], align 8
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP1:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[INDEX]]
; GATHER-SCATTER-ENABLED-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x float>, ptr [[TMP1]], align 4
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP2:%.*]] = getelementptr inbounds float, ptr [[DST]], <4 x i64> [[WIDE_LOAD]]
; GATHER-SCATTER-ENABLED-NEXT:    call void @llvm.masked.scatter.v4f32.v4p0(<4 x float> [[WIDE_LOAD1]], <4 x ptr> align 4 [[TMP2]], <4 x i1> splat (i1 true))
; GATHER-SCATTER-ENABLED-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; GATHER-SCATTER-ENABLED-NEXT:    [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
; GATHER-SCATTER-ENABLED-NEXT:    br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; GATHER-SCATTER-ENABLED:       [[MIDDLE_BLOCK]]:
; GATHER-SCATTER-ENABLED-NEXT:    br label %[[EXIT:.*]]
; GATHER-SCATTER-ENABLED:       [[EXIT]]:
; GATHER-SCATTER-ENABLED-NEXT:    ret void
;
; GATHER-SCATTER-DISABLED-LABEL: define void @scatter_i32(
; GATHER-SCATTER-DISABLED-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[OFFSETS_ADDR:%.*]], ptr noalias [[DST:%.*]]) {
; GATHER-SCATTER-DISABLED-NEXT:  [[ENTRY:.*:]]
; GATHER-SCATTER-DISABLED-NEXT:    br label %[[VECTOR_PH:.*]]
; GATHER-SCATTER-DISABLED:       [[VECTOR_PH]]:
; GATHER-SCATTER-DISABLED-NEXT:    br label %[[VECTOR_BODY:.*]]
; GATHER-SCATTER-DISABLED:       [[VECTOR_BODY]]:
; GATHER-SCATTER-DISABLED-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i64, ptr [[OFFSETS_ADDR]], i64 [[INDEX]]
; GATHER-SCATTER-DISABLED-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i64>, ptr [[TMP0]], align 8
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP1:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 0
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP2:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 1
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP3:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 2
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP4:%.*]] = extractelement <4 x i64> [[WIDE_LOAD]], i64 3
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP5:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[INDEX]]
; GATHER-SCATTER-DISABLED-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x float>, ptr [[TMP5]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP6:%.*]] = extractelement <4 x float> [[WIDE_LOAD1]], i64 0
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[WIDE_LOAD1]], i64 1
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[WIDE_LOAD1]], i64 2
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP9:%.*]] = extractelement <4 x float> [[WIDE_LOAD1]], i64 3
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP10:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[TMP1]]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP11:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[TMP2]]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP12:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[TMP3]]
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP13:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[TMP4]]
; GATHER-SCATTER-DISABLED-NEXT:    store float [[TMP6]], ptr [[TMP10]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    store float [[TMP7]], ptr [[TMP11]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    store float [[TMP8]], ptr [[TMP12]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    store float [[TMP9]], ptr [[TMP13]], align 4
; GATHER-SCATTER-DISABLED-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; GATHER-SCATTER-DISABLED-NEXT:    [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024
; GATHER-SCATTER-DISABLED-NEXT:    br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; GATHER-SCATTER-DISABLED:       [[MIDDLE_BLOCK]]:
; GATHER-SCATTER-DISABLED-NEXT:    br label %[[EXIT:.*]]
; GATHER-SCATTER-DISABLED:       [[EXIT]]:
; GATHER-SCATTER-DISABLED-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %offset.addr = getelementptr inbounds i64, ptr %offsets.addr, i64 %iv
  %offset = load i64, ptr %offset.addr, align 8
  %val.addr = getelementptr inbounds float, ptr %src, i64 %iv
  %val = load float, ptr %val.addr, align 4
  %dst.addr = getelementptr inbounds float, ptr %dst, i64 %offset
  store float %val, ptr %dst.addr, align 4
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 1024
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret void
}