test/Transforms/LoopVectorize/VPlan/tail-folding-multiuse-reductions.ll

; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -p loop-vectorize -force-vector-width=4 -tail-folding-policy=prefer-fold-tail -S -vplan-print-after="VPlanTransforms::handleMultiUseReductions$" -disable-output 2>&1 | FileCheck %s

define i64 @argmin_first_index(ptr %arr, i64 %n, i64 %start) {
; CHECK-LABEL: VPlan for loop in 'argmin_first_index'
; CHECK:  VPlan ' for UF>=1' {
; CHECK-NEXT:  Live-in vp<[[VP0:%[0-9]+]]> = VF
; CHECK-NEXT:  Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
; CHECK-NEXT:  Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
; CHECK-NEXT:  Live-in ir<%n> = original trip-count
; CHECK-EMPTY:
; CHECK-NEXT:  ir-bb<entry>:
; CHECK-NEXT:  Successor(s): scalar.ph, vector.ph
; CHECK-EMPTY:
; CHECK-NEXT:  vector.ph:
; CHECK-NEXT:  Successor(s): vector loop
; CHECK-EMPTY:
; CHECK-NEXT:  <x1> vector loop: {
; CHECK-NEXT:  vp<[[VP3:%[0-9]+]]> = CANONICAL-IV
; CHECK-NEXT:  vp<[[VP4:%[0-9]+]]> = HEADER-MASK
; CHECK-EMPTY:
; CHECK-NEXT:    vector.body:
; CHECK-NEXT:      ir<%iv> = WIDEN-INDUCTION nuw nsw ir<0>, ir<1>, vp<[[VP0]]>
; CHECK-NEXT:      WIDEN-REDUCTION-PHI ir<%min> = phi (smin) ir<%start>, vp<[[VP6:%[0-9]+]]>
; CHECK-NEXT:      WIDEN-REDUCTION-PHI ir<%min.loc> = phi (find-iv) ir<poison>, vp<[[VP7:%[0-9]+]]>
; CHECK-NEXT:    Successor(s): vector.body.split
; CHECK-EMPTY:
; CHECK-NEXT:    vector.body.split:
; CHECK-NEXT:      REPLICATE ir<%arrayidx> = getelementptr inbounds nuw ir<%arr>, ir<%iv>
; CHECK-NEXT:      REPLICATE ir<%0> = load ir<%arrayidx>, vp<[[VP4]]>
; CHECK-NEXT:      WIDEN ir<%cmp> = icmp slt ir<%0>, ir<%min>
; CHECK-NEXT:      WIDEN ir<%min.loc.next> = select ir<%cmp>, ir<%iv>, ir<%min.loc>
; CHECK-NEXT:      WIDEN-INTRINSIC ir<%min.next> = call llvm.smin(ir<%0>, ir<%min>)
; CHECK-NEXT:      WIDEN ir<%iv.next> = add nuw nsw ir<%iv>, ir<1>
; CHECK-NEXT:      CLONE ir<%exitcond.not> = icmp eq ir<%iv.next>, ir<%n>
; CHECK-NEXT:    Successor(s): vector.latch
; CHECK-EMPTY:
; CHECK-NEXT:    vector.latch:
; CHECK-NEXT:      EMIT vp<[[VP5:%[0-9]+]]> = not vp<[[VP4]]>
; CHECK-NEXT:      EMIT vp<[[VP6]]> = select vp<[[VP4]]>, ir<%min.next>, ir<%min>
; CHECK-NEXT:      EMIT vp<[[VP7]]> = select vp<[[VP4]]>, ir<%min.loc.next>, ir<%min.loc>
; CHECK-NEXT:      EMIT vp<%index.next> = add vp<[[VP3]]>, vp<[[VP1]]>
; CHECK-NEXT:      EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; CHECK-NEXT:    No successors
; CHECK-NEXT:  }
; CHECK-NEXT:  Successor(s): middle.block
; CHECK-EMPTY:
; CHECK-NEXT:  middle.block:
; CHECK-NEXT:    EMIT vp<[[VP9:%[0-9]+]]> = compute-reduction-result (smin) vp<[[VP6]]>
; CHECK-NEXT:    EMIT vp<[[VP10:%[0-9]+]]> = icmp eq vp<[[VP6]]>, vp<[[VP9]]>
; CHECK-NEXT:    EMIT vp<[[VP11:%[0-9]+]]> = select vp<[[VP10]]>, vp<[[VP7]]>, ir<-1>
; CHECK-NEXT:    EMIT vp<[[VP12:%[0-9]+]]> = compute-reduction-result (umin) vp<[[VP11]]>
; CHECK-NEXT:    EMIT vp<[[VP13:%[0-9]+]]> = icmp eq vp<[[VP9]]>, ir<%start>
; CHECK-NEXT:    EMIT vp<[[VP14:%[0-9]+]]> = select vp<[[VP13]]>, ir<0>, vp<[[VP12]]>
; CHECK-NEXT:    EMIT vp<[[VP15:%[0-9]+]]> = extract-last-part vp<[[VP9]]>
; CHECK-NEXT:    EMIT vp<[[VP16:%[0-9]+]]> = extract-last-lane vp<[[VP15]]>
; CHECK-NEXT:    EMIT vp<[[VP17:%[0-9]+]]> = extract-last-part vp<[[VP14]]>
; CHECK-NEXT:    EMIT vp<[[VP18:%[0-9]+]]> = extract-last-lane vp<[[VP17]]>
; CHECK-NEXT:    EMIT vp<[[VP19:%[0-9]+]]> = extract-last-part vp<[[VP14]]>
; CHECK-NEXT:    EMIT vp<[[VP20:%[0-9]+]]> = extract-last-lane vp<[[VP19]]>
; CHECK-NEXT:    EMIT vp<%cmp.n> = icmp eq ir<%n>, vp<[[VP2]]>
; CHECK-NEXT:    EMIT vp<[[VP21:%[0-9]+]]> = last-active-lane vp<[[VP4]]>
; CHECK-NEXT:    EMIT vp<[[VP22:%[0-9]+]]> = extract-lane vp<[[VP21]]>, vp<[[VP9]]>
; CHECK-NEXT:    EMIT vp<[[VP23:%[0-9]+]]> = last-active-lane vp<[[VP4]]>
; CHECK-NEXT:    EMIT vp<[[VP24:%[0-9]+]]> = extract-lane vp<[[VP23]]>, vp<[[VP14]]>
; CHECK-NEXT:    EMIT vp<[[VP25:%[0-9]+]]> = last-active-lane vp<[[VP4]]>
; CHECK-NEXT:    EMIT vp<[[VP26:%[0-9]+]]> = extract-lane vp<[[VP25]]>, vp<[[VP14]]>
; CHECK-NEXT:    EMIT branch-on-cond ir<true>
; CHECK-NEXT:  Successor(s): ir-bb<for.end>, scalar.ph
; CHECK-EMPTY:
; CHECK-NEXT:  ir-bb<for.end>:
; CHECK-NEXT:    IR   %min.loc.next.lcssa = phi i64 [ %min.loc.next, %for.body ] (extra operand: vp<[[VP14]]> from middle.block)
; CHECK-NEXT:  No successors
; CHECK-EMPTY:
; CHECK-NEXT:  scalar.ph:
; CHECK-NEXT:    EMIT-SCALAR vp<%bc.resume.val> = phi [ ir<%n>, middle.block ], [ ir<0>, ir-bb<entry> ]
; CHECK-NEXT:    EMIT-SCALAR vp<%bc.merge.rdx> = phi [ vp<[[VP9]]>, middle.block ], [ ir<%start>, ir-bb<entry> ]
; CHECK-NEXT:    EMIT-SCALAR vp<%bc.merge.rdx>.1 = phi [ vp<[[VP14]]>, middle.block ], [ ir<0>, ir-bb<entry> ]
; CHECK-NEXT:  Successor(s): ir-bb<for.body>
; CHECK-EMPTY:
; CHECK-NEXT:  ir-bb<for.body>:
; CHECK-NEXT:    IR   %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; CHECK-NEXT:    IR   %min = phi i64 [ %start, %entry ], [ %min.next, %for.body ] (extra operand: vp<%bc.merge.rdx> from scalar.ph)
; CHECK-NEXT:    IR   %min.loc = phi i64 [ 0, %entry ], [ %min.loc.next, %for.body ] (extra operand: vp<%bc.merge.rdx>.1 from scalar.ph)
; CHECK-NEXT:    IR   %arrayidx = getelementptr inbounds nuw [8 x i8], ptr %arr, i64 %iv
; CHECK-NEXT:    IR   %0 = load i64, ptr %arrayidx, align 4
; CHECK-NEXT:    IR   %cmp = icmp slt i64 %0, %min
; CHECK-NEXT:    IR   %min.loc.next = select i1 %cmp, i64 %iv, i64 %min.loc
; CHECK-NEXT:    IR   %min.next = tail call i64 @llvm.smin.i64(i64 %0, i64 %min)
; CHECK-NEXT:    IR   %iv.next = add nuw nsw i64 %iv, 1
; CHECK-NEXT:    IR   %exitcond.not = icmp eq i64 %iv.next, %n
; CHECK-NEXT:  No successors
; CHECK-NEXT:  }
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %min = phi i64 [ %start, %entry ], [ %min.next, %for.body ]
  %min.loc = phi i64 [ 0, %entry ], [ %min.loc.next, %for.body ]
  %arrayidx = getelementptr inbounds nuw [8 x i8], ptr %arr, i64 %iv
  %0 = load i64, ptr %arrayidx
  %cmp = icmp slt i64 %0, %min
  %min.loc.next = select i1 %cmp, i64 %iv, i64 %min.loc
  %min.next = tail call i64 @llvm.smin.i64(i64 %0, i64 %min)
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, %n
  br i1 %exitcond.not, label %for.end, label %for.body

for.end:
  ret i64 %min.loc.next
}