blob: f8aaeef7fcac8042cc3f745e1411fc239b055d44 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -vectorizer-maximize-bandwidth -mcpu=pwr8 -S -passes=loop-vectorize < %s | FileCheck --check-prefix=P8CHECK %s
; RUN: opt -vectorizer-maximize-bandwidth -mcpu=pwr9 -S -passes=loop-vectorize < %s | FileCheck --check-prefix=P9CHECK %s
; RUN: opt -vectorizer-maximize-bandwidth -mcpu=pwr10 -S -passes=loop-vectorize < %s | FileCheck --check-prefix=P10CHECK %s
target datalayout = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
target triple = "powerpc64le-unknown-linux-gnu"
; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define signext i32 @adds8(ptr nofree noundef readonly captures(none) %a, i32 noundef signext %n) {
; P8CHECK-LABEL: define signext i32 @adds8(
; P8CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; P8CHECK-NEXT: [[ENTRY:.*]]:
; P8CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P8CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P8CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P8CHECK: [[ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 16
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P8CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 128
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P8CHECK: [[VECTOR_PH]]:
; P8CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 127
; P8CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P8CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P8CHECK: [[VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX]]
; P8CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 16
; P8CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 32
; P8CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 48
; P8CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 64
; P8CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 80
; P8CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 96
; P8CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 112
; P8CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP1]], align 1, !tbaa [[CHAR_TBAA0:![0-9]+]]
; P8CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <16 x i8>, ptr [[TMP4]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <16 x i8>, ptr [[TMP5]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <16 x i8>, ptr [[TMP6]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <16 x i8>, ptr [[TMP7]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <16 x i8>, ptr [[TMP8]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[TMP9:%.*]] = sext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP9]])
; P8CHECK-NEXT: [[TMP10:%.*]] = sext <16 x i8> [[WIDE_LOAD9]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI2]], <16 x i32> [[TMP10]])
; P8CHECK-NEXT: [[TMP11:%.*]] = sext <16 x i8> [[WIDE_LOAD10]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI3]], <16 x i32> [[TMP11]])
; P8CHECK-NEXT: [[TMP12:%.*]] = sext <16 x i8> [[WIDE_LOAD11]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI4]], <16 x i32> [[TMP12]])
; P8CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i8> [[WIDE_LOAD12]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI5]], <16 x i32> [[TMP13]])
; P8CHECK-NEXT: [[TMP14:%.*]] = sext <16 x i8> [[WIDE_LOAD13]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI6]], <16 x i32> [[TMP14]])
; P8CHECK-NEXT: [[TMP15:%.*]] = sext <16 x i8> [[WIDE_LOAD14]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI7]], <16 x i32> [[TMP15]])
; P8CHECK-NEXT: [[TMP16:%.*]] = sext <16 x i8> [[WIDE_LOAD15]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI8]], <16 x i32> [[TMP16]])
; P8CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 128
; P8CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; P8CHECK: [[MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P8CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P8CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P8CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P8CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P8CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P8CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P8CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P8CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P8CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
; P8CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7:![0-9]+]]
; P8CHECK: [[VEC_EPILOG_PH]]:
; P8CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 15
; P8CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P8CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P8CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P8CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX30]]
; P8CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <16 x i8>, ptr [[TMP21]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[TMP22:%.*]] = sext <16 x i8> [[WIDE_LOAD32]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI31]], <16 x i32> [[TMP22]])
; P8CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 16
; P8CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
; P8CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P8CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P8CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P8CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P8CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P8CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P8CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P8CHECK: [[FOR_COND_CLEANUP]]:
; P8CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P8CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P8CHECK: [[FOR_BODY]]:
; P8CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[I_08]]
; P8CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[TMP25]] to i32
; P8CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_07]], [[CONV2]]
; P8CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P8CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P8CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
;
; P9CHECK-LABEL: define signext i32 @adds8(
; P9CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; P9CHECK-NEXT: [[ENTRY:.*]]:
; P9CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P9CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P9CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P9CHECK: [[ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 16
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P9CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 128
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P9CHECK: [[VECTOR_PH]]:
; P9CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 127
; P9CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P9CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P9CHECK: [[VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX]]
; P9CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 16
; P9CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 32
; P9CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 48
; P9CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 64
; P9CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 80
; P9CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 96
; P9CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 112
; P9CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP1]], align 1, !tbaa [[CHAR_TBAA0:![0-9]+]]
; P9CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <16 x i8>, ptr [[TMP4]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <16 x i8>, ptr [[TMP5]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <16 x i8>, ptr [[TMP6]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <16 x i8>, ptr [[TMP7]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <16 x i8>, ptr [[TMP8]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[TMP9:%.*]] = sext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP9]])
; P9CHECK-NEXT: [[TMP10:%.*]] = sext <16 x i8> [[WIDE_LOAD9]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI2]], <16 x i32> [[TMP10]])
; P9CHECK-NEXT: [[TMP11:%.*]] = sext <16 x i8> [[WIDE_LOAD10]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI3]], <16 x i32> [[TMP11]])
; P9CHECK-NEXT: [[TMP12:%.*]] = sext <16 x i8> [[WIDE_LOAD11]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI4]], <16 x i32> [[TMP12]])
; P9CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i8> [[WIDE_LOAD12]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI5]], <16 x i32> [[TMP13]])
; P9CHECK-NEXT: [[TMP14:%.*]] = sext <16 x i8> [[WIDE_LOAD13]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI6]], <16 x i32> [[TMP14]])
; P9CHECK-NEXT: [[TMP15:%.*]] = sext <16 x i8> [[WIDE_LOAD14]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI7]], <16 x i32> [[TMP15]])
; P9CHECK-NEXT: [[TMP16:%.*]] = sext <16 x i8> [[WIDE_LOAD15]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI8]], <16 x i32> [[TMP16]])
; P9CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 128
; P9CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; P9CHECK: [[MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P9CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P9CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P9CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P9CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P9CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P9CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P9CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P9CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P9CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
; P9CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7:![0-9]+]]
; P9CHECK: [[VEC_EPILOG_PH]]:
; P9CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 15
; P9CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P9CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P9CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P9CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX30]]
; P9CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <16 x i8>, ptr [[TMP21]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[TMP22:%.*]] = sext <16 x i8> [[WIDE_LOAD32]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI31]], <16 x i32> [[TMP22]])
; P9CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 16
; P9CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
; P9CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P9CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P9CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P9CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P9CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P9CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P9CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P9CHECK: [[FOR_COND_CLEANUP]]:
; P9CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P9CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P9CHECK: [[FOR_BODY]]:
; P9CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[I_08]]
; P9CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[TMP25]] to i32
; P9CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_07]], [[CONV2]]
; P9CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P9CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P9CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
;
; P10CHECK-LABEL: define signext i32 @adds8(
; P10CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; P10CHECK-NEXT: [[ENTRY:.*]]:
; P10CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P10CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P10CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P10CHECK: [[ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 16
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P10CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 128
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P10CHECK: [[VECTOR_PH]]:
; P10CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 127
; P10CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P10CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P10CHECK: [[VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX]]
; P10CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 16
; P10CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 32
; P10CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 48
; P10CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 64
; P10CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 80
; P10CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 96
; P10CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 112
; P10CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP1]], align 1, !tbaa [[CHAR_TBAA0:![0-9]+]]
; P10CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <16 x i8>, ptr [[TMP4]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <16 x i8>, ptr [[TMP5]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <16 x i8>, ptr [[TMP6]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <16 x i8>, ptr [[TMP7]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <16 x i8>, ptr [[TMP8]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[TMP9:%.*]] = sext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP9]])
; P10CHECK-NEXT: [[TMP10:%.*]] = sext <16 x i8> [[WIDE_LOAD9]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI2]], <16 x i32> [[TMP10]])
; P10CHECK-NEXT: [[TMP11:%.*]] = sext <16 x i8> [[WIDE_LOAD10]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI3]], <16 x i32> [[TMP11]])
; P10CHECK-NEXT: [[TMP12:%.*]] = sext <16 x i8> [[WIDE_LOAD11]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI4]], <16 x i32> [[TMP12]])
; P10CHECK-NEXT: [[TMP13:%.*]] = sext <16 x i8> [[WIDE_LOAD12]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI5]], <16 x i32> [[TMP13]])
; P10CHECK-NEXT: [[TMP14:%.*]] = sext <16 x i8> [[WIDE_LOAD13]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI6]], <16 x i32> [[TMP14]])
; P10CHECK-NEXT: [[TMP15:%.*]] = sext <16 x i8> [[WIDE_LOAD14]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI7]], <16 x i32> [[TMP15]])
; P10CHECK-NEXT: [[TMP16:%.*]] = sext <16 x i8> [[WIDE_LOAD15]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI8]], <16 x i32> [[TMP16]])
; P10CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 128
; P10CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; P10CHECK: [[MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P10CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P10CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P10CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P10CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P10CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P10CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P10CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P10CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P10CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
; P10CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7:![0-9]+]]
; P10CHECK: [[VEC_EPILOG_PH]]:
; P10CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 15
; P10CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P10CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P10CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P10CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX30]]
; P10CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <16 x i8>, ptr [[TMP21]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[TMP22:%.*]] = sext <16 x i8> [[WIDE_LOAD32]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI31]], <16 x i32> [[TMP22]])
; P10CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 16
; P10CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
; P10CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P10CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P10CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P10CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P10CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P10CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P10CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P10CHECK: [[FOR_COND_CLEANUP]]:
; P10CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P10CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P10CHECK: [[FOR_BODY]]:
; P10CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[I_08]]
; P10CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[TMP25]] to i32
; P10CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_07]], [[CONV2]]
; P10CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P10CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P10CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
;
entry:
%conv = zext nneg i32 %n to i64
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
for.body.preheader: ; preds = %entry
br label %for.body
for.cond.cleanup.loopexit: ; preds = %for.body
%add.lcssa = phi i32 [ %add, %for.body ]
br label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
%sum.0.lcssa = phi i32 [ 0, %entry ], [ %add.lcssa, %for.cond.cleanup.loopexit ]
ret i32 %sum.0.lcssa
for.body: ; preds = %for.body.preheader, %for.body
%i.08 = phi i64 [ %inc, %for.body ], [ 0, %for.body.preheader ]
%sum.07 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
%arrayidx = getelementptr inbounds nuw i8, ptr %a, i64 %i.08
%0 = load i8, ptr %arrayidx, align 1, !tbaa !10
%conv2 = sext i8 %0 to i32
%add = add nsw i32 %sum.07, %conv2
%inc = add nuw nsw i64 %i.08, 1
%exitcond.not = icmp eq i64 %inc, %conv
br i1 %exitcond.not, label %for.cond.cleanup.loopexit, label %for.body, !llvm.loop !12
}
; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define signext i32 @addu8(ptr nofree noundef readonly captures(none) %a, i32 noundef signext %n) {
; P8CHECK-LABEL: define signext i32 @addu8(
; P8CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P8CHECK-NEXT: [[ENTRY:.*]]:
; P8CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P8CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P8CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P8CHECK: [[ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 16
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P8CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 128
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P8CHECK: [[VECTOR_PH]]:
; P8CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 127
; P8CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P8CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P8CHECK: [[VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX]]
; P8CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 16
; P8CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 32
; P8CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 48
; P8CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 64
; P8CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 80
; P8CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 96
; P8CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 112
; P8CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP1]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <16 x i8>, ptr [[TMP4]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <16 x i8>, ptr [[TMP5]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <16 x i8>, ptr [[TMP6]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <16 x i8>, ptr [[TMP7]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <16 x i8>, ptr [[TMP8]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[TMP9:%.*]] = zext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP9]])
; P8CHECK-NEXT: [[TMP10:%.*]] = zext <16 x i8> [[WIDE_LOAD9]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI2]], <16 x i32> [[TMP10]])
; P8CHECK-NEXT: [[TMP11:%.*]] = zext <16 x i8> [[WIDE_LOAD10]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI3]], <16 x i32> [[TMP11]])
; P8CHECK-NEXT: [[TMP12:%.*]] = zext <16 x i8> [[WIDE_LOAD11]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI4]], <16 x i32> [[TMP12]])
; P8CHECK-NEXT: [[TMP13:%.*]] = zext <16 x i8> [[WIDE_LOAD12]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI5]], <16 x i32> [[TMP13]])
; P8CHECK-NEXT: [[TMP14:%.*]] = zext <16 x i8> [[WIDE_LOAD13]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI6]], <16 x i32> [[TMP14]])
; P8CHECK-NEXT: [[TMP15:%.*]] = zext <16 x i8> [[WIDE_LOAD14]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI7]], <16 x i32> [[TMP15]])
; P8CHECK-NEXT: [[TMP16:%.*]] = zext <16 x i8> [[WIDE_LOAD15]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI8]], <16 x i32> [[TMP16]])
; P8CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 128
; P8CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
; P8CHECK: [[MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P8CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P8CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P8CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P8CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P8CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P8CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P8CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P8CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P8CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
; P8CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7]]
; P8CHECK: [[VEC_EPILOG_PH]]:
; P8CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 15
; P8CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P8CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P8CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P8CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX30]]
; P8CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <16 x i8>, ptr [[TMP21]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[TMP22:%.*]] = zext <16 x i8> [[WIDE_LOAD32]] to <16 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI31]], <16 x i32> [[TMP22]])
; P8CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 16
; P8CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
; P8CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P8CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P8CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P8CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P8CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P8CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P8CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P8CHECK: [[FOR_COND_CLEANUP]]:
; P8CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P8CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P8CHECK: [[FOR_BODY]]:
; P8CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[I_08]]
; P8CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[CHAR_TBAA0]]
; P8CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[TMP25]] to i32
; P8CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[SUM_07]], [[CONV2]]
; P8CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P8CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P8CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
;
; P9CHECK-LABEL: define signext i32 @addu8(
; P9CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P9CHECK-NEXT: [[ENTRY:.*]]:
; P9CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P9CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P9CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P9CHECK: [[ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 16
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P9CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 128
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P9CHECK: [[VECTOR_PH]]:
; P9CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 127
; P9CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P9CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P9CHECK: [[VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX]]
; P9CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 16
; P9CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 32
; P9CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 48
; P9CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 64
; P9CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 80
; P9CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 96
; P9CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 112
; P9CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP1]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <16 x i8>, ptr [[TMP4]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <16 x i8>, ptr [[TMP5]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <16 x i8>, ptr [[TMP6]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <16 x i8>, ptr [[TMP7]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <16 x i8>, ptr [[TMP8]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[TMP9:%.*]] = zext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP9]])
; P9CHECK-NEXT: [[TMP10:%.*]] = zext <16 x i8> [[WIDE_LOAD9]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI2]], <16 x i32> [[TMP10]])
; P9CHECK-NEXT: [[TMP11:%.*]] = zext <16 x i8> [[WIDE_LOAD10]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI3]], <16 x i32> [[TMP11]])
; P9CHECK-NEXT: [[TMP12:%.*]] = zext <16 x i8> [[WIDE_LOAD11]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI4]], <16 x i32> [[TMP12]])
; P9CHECK-NEXT: [[TMP13:%.*]] = zext <16 x i8> [[WIDE_LOAD12]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI5]], <16 x i32> [[TMP13]])
; P9CHECK-NEXT: [[TMP14:%.*]] = zext <16 x i8> [[WIDE_LOAD13]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI6]], <16 x i32> [[TMP14]])
; P9CHECK-NEXT: [[TMP15:%.*]] = zext <16 x i8> [[WIDE_LOAD14]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI7]], <16 x i32> [[TMP15]])
; P9CHECK-NEXT: [[TMP16:%.*]] = zext <16 x i8> [[WIDE_LOAD15]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI8]], <16 x i32> [[TMP16]])
; P9CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 128
; P9CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
; P9CHECK: [[MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P9CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P9CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P9CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P9CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P9CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P9CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P9CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P9CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P9CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
; P9CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7]]
; P9CHECK: [[VEC_EPILOG_PH]]:
; P9CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 15
; P9CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P9CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P9CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P9CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX30]]
; P9CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <16 x i8>, ptr [[TMP21]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[TMP22:%.*]] = zext <16 x i8> [[WIDE_LOAD32]] to <16 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI31]], <16 x i32> [[TMP22]])
; P9CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 16
; P9CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
; P9CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P9CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P9CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P9CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P9CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P9CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P9CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P9CHECK: [[FOR_COND_CLEANUP]]:
; P9CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P9CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P9CHECK: [[FOR_BODY]]:
; P9CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[I_08]]
; P9CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[CHAR_TBAA0]]
; P9CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[TMP25]] to i32
; P9CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[SUM_07]], [[CONV2]]
; P9CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P9CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P9CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
;
; P10CHECK-LABEL: define signext i32 @addu8(
; P10CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P10CHECK-NEXT: [[ENTRY:.*]]:
; P10CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P10CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P10CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P10CHECK: [[ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 16
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P10CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 128
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P10CHECK: [[VECTOR_PH]]:
; P10CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 127
; P10CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P10CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P10CHECK: [[VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX]]
; P10CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 16
; P10CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 32
; P10CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 48
; P10CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 64
; P10CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 80
; P10CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 96
; P10CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 112
; P10CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP1]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <16 x i8>, ptr [[TMP4]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <16 x i8>, ptr [[TMP5]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <16 x i8>, ptr [[TMP6]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <16 x i8>, ptr [[TMP7]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <16 x i8>, ptr [[TMP8]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[TMP9:%.*]] = zext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP9]])
; P10CHECK-NEXT: [[TMP10:%.*]] = zext <16 x i8> [[WIDE_LOAD9]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI2]], <16 x i32> [[TMP10]])
; P10CHECK-NEXT: [[TMP11:%.*]] = zext <16 x i8> [[WIDE_LOAD10]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI3]], <16 x i32> [[TMP11]])
; P10CHECK-NEXT: [[TMP12:%.*]] = zext <16 x i8> [[WIDE_LOAD11]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI4]], <16 x i32> [[TMP12]])
; P10CHECK-NEXT: [[TMP13:%.*]] = zext <16 x i8> [[WIDE_LOAD12]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI5]], <16 x i32> [[TMP13]])
; P10CHECK-NEXT: [[TMP14:%.*]] = zext <16 x i8> [[WIDE_LOAD13]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI6]], <16 x i32> [[TMP14]])
; P10CHECK-NEXT: [[TMP15:%.*]] = zext <16 x i8> [[WIDE_LOAD14]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI7]], <16 x i32> [[TMP15]])
; P10CHECK-NEXT: [[TMP16:%.*]] = zext <16 x i8> [[WIDE_LOAD15]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI8]], <16 x i32> [[TMP16]])
; P10CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 128
; P10CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
; P10CHECK: [[MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P10CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P10CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P10CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P10CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P10CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P10CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P10CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P10CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P10CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
; P10CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF7]]
; P10CHECK: [[VEC_EPILOG_PH]]:
; P10CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 15
; P10CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P10CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P10CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P10CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[INDEX30]]
; P10CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <16 x i8>, ptr [[TMP21]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[TMP22:%.*]] = zext <16 x i8> [[WIDE_LOAD32]] to <16 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI31]], <16 x i32> [[TMP22]])
; P10CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 16
; P10CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
; P10CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P10CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P10CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P10CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P10CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P10CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P10CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P10CHECK: [[FOR_COND_CLEANUP]]:
; P10CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P10CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P10CHECK: [[FOR_BODY]]:
; P10CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 [[I_08]]
; P10CHECK-NEXT: [[TMP25:%.*]] = load i8, ptr [[ARRAYIDX]], align 1, !tbaa [[CHAR_TBAA0]]
; P10CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[TMP25]] to i32
; P10CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[SUM_07]], [[CONV2]]
; P10CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P10CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P10CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
;
entry:
%conv = zext nneg i32 %n to i64
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body, label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.body, %entry
%sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
ret i32 %sum.0.lcssa
for.body: ; preds = %entry, %for.body
%i.08 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
%sum.07 = phi i32 [ %add, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds nuw i8, ptr %a, i64 %i.08
%0 = load i8, ptr %arrayidx, align 1, !tbaa !10
%conv2 = zext i8 %0 to i32
%add = add nuw nsw i32 %sum.07, %conv2
%inc = add nuw nsw i64 %i.08, 1
%exitcond.not = icmp eq i64 %inc, %conv
br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !14
}
; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define signext i32 @adds16(ptr nofree noundef readonly captures(none) %a, i32 noundef signext %n) {
; P8CHECK-LABEL: define signext i32 @adds16(
; P8CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P8CHECK-NEXT: [[ENTRY:.*]]:
; P8CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P8CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P8CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P8CHECK: [[ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 8
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P8CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 64
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P8CHECK: [[VECTOR_PH]]:
; P8CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 63
; P8CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P8CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P8CHECK: [[VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX]]
; P8CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 8
; P8CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 16
; P8CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 24
; P8CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 32
; P8CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 40
; P8CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 48
; P8CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 56
; P8CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i16>, ptr [[TMP1]], align 2, !tbaa [[SHORT_TBAA13:![0-9]+]]
; P8CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <8 x i16>, ptr [[TMP2]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <8 x i16>, ptr [[TMP3]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <8 x i16>, ptr [[TMP4]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <8 x i16>, ptr [[TMP5]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <8 x i16>, ptr [[TMP6]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <8 x i16>, ptr [[TMP7]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <8 x i16>, ptr [[TMP8]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[TMP9:%.*]] = sext <8 x i16> [[WIDE_LOAD]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI]], <8 x i32> [[TMP9]])
; P8CHECK-NEXT: [[TMP10:%.*]] = sext <8 x i16> [[WIDE_LOAD9]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI2]], <8 x i32> [[TMP10]])
; P8CHECK-NEXT: [[TMP11:%.*]] = sext <8 x i16> [[WIDE_LOAD10]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI3]], <8 x i32> [[TMP11]])
; P8CHECK-NEXT: [[TMP12:%.*]] = sext <8 x i16> [[WIDE_LOAD11]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI4]], <8 x i32> [[TMP12]])
; P8CHECK-NEXT: [[TMP13:%.*]] = sext <8 x i16> [[WIDE_LOAD12]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI5]], <8 x i32> [[TMP13]])
; P8CHECK-NEXT: [[TMP14:%.*]] = sext <8 x i16> [[WIDE_LOAD13]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI6]], <8 x i32> [[TMP14]])
; P8CHECK-NEXT: [[TMP15:%.*]] = sext <8 x i16> [[WIDE_LOAD14]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI7]], <8 x i32> [[TMP15]])
; P8CHECK-NEXT: [[TMP16:%.*]] = sext <8 x i16> [[WIDE_LOAD15]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI8]], <8 x i32> [[TMP16]])
; P8CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 64
; P8CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
; P8CHECK: [[MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P8CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P8CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P8CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P8CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P8CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P8CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P8CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P8CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P8CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
; P8CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF16:![0-9]+]]
; P8CHECK: [[VEC_EPILOG_PH]]:
; P8CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 7
; P8CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P8CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P8CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P8CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX30]]
; P8CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <8 x i16>, ptr [[TMP21]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[TMP22:%.*]] = sext <8 x i16> [[WIDE_LOAD32]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI31]], <8 x i32> [[TMP22]])
; P8CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 8
; P8CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
; P8CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P8CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P8CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P8CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P8CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P8CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P8CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P8CHECK: [[FOR_COND_CLEANUP]]:
; P8CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P8CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P8CHECK: [[FOR_BODY]]:
; P8CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[I_08]]
; P8CHECK-NEXT: [[TMP25:%.*]] = load i16, ptr [[ARRAYIDX]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[TMP25]] to i32
; P8CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_07]], [[CONV2]]
; P8CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P8CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P8CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
;
; P9CHECK-LABEL: define signext i32 @adds16(
; P9CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P9CHECK-NEXT: [[ENTRY:.*]]:
; P9CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P9CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P9CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P9CHECK: [[ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 8
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P9CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 64
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P9CHECK: [[VECTOR_PH]]:
; P9CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 63
; P9CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P9CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P9CHECK: [[VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX]]
; P9CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 8
; P9CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 16
; P9CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 24
; P9CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 32
; P9CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 40
; P9CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 48
; P9CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 56
; P9CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i16>, ptr [[TMP1]], align 2, !tbaa [[SHORT_TBAA13:![0-9]+]]
; P9CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <8 x i16>, ptr [[TMP2]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <8 x i16>, ptr [[TMP3]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <8 x i16>, ptr [[TMP4]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <8 x i16>, ptr [[TMP5]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <8 x i16>, ptr [[TMP6]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <8 x i16>, ptr [[TMP7]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <8 x i16>, ptr [[TMP8]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[TMP9:%.*]] = sext <8 x i16> [[WIDE_LOAD]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI]], <8 x i32> [[TMP9]])
; P9CHECK-NEXT: [[TMP10:%.*]] = sext <8 x i16> [[WIDE_LOAD9]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI2]], <8 x i32> [[TMP10]])
; P9CHECK-NEXT: [[TMP11:%.*]] = sext <8 x i16> [[WIDE_LOAD10]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI3]], <8 x i32> [[TMP11]])
; P9CHECK-NEXT: [[TMP12:%.*]] = sext <8 x i16> [[WIDE_LOAD11]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI4]], <8 x i32> [[TMP12]])
; P9CHECK-NEXT: [[TMP13:%.*]] = sext <8 x i16> [[WIDE_LOAD12]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI5]], <8 x i32> [[TMP13]])
; P9CHECK-NEXT: [[TMP14:%.*]] = sext <8 x i16> [[WIDE_LOAD13]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI6]], <8 x i32> [[TMP14]])
; P9CHECK-NEXT: [[TMP15:%.*]] = sext <8 x i16> [[WIDE_LOAD14]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI7]], <8 x i32> [[TMP15]])
; P9CHECK-NEXT: [[TMP16:%.*]] = sext <8 x i16> [[WIDE_LOAD15]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI8]], <8 x i32> [[TMP16]])
; P9CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 64
; P9CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
; P9CHECK: [[MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P9CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P9CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P9CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P9CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P9CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P9CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P9CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P9CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P9CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
; P9CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF16:![0-9]+]]
; P9CHECK: [[VEC_EPILOG_PH]]:
; P9CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 7
; P9CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P9CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P9CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P9CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX30]]
; P9CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <8 x i16>, ptr [[TMP21]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[TMP22:%.*]] = sext <8 x i16> [[WIDE_LOAD32]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI31]], <8 x i32> [[TMP22]])
; P9CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 8
; P9CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
; P9CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P9CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P9CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P9CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P9CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P9CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P9CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P9CHECK: [[FOR_COND_CLEANUP]]:
; P9CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P9CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P9CHECK: [[FOR_BODY]]:
; P9CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[I_08]]
; P9CHECK-NEXT: [[TMP25:%.*]] = load i16, ptr [[ARRAYIDX]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[TMP25]] to i32
; P9CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_07]], [[CONV2]]
; P9CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P9CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P9CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
;
; P10CHECK-LABEL: define signext i32 @adds16(
; P10CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P10CHECK-NEXT: [[ENTRY:.*]]:
; P10CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P10CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P10CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P10CHECK: [[ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 8
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P10CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 64
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P10CHECK: [[VECTOR_PH]]:
; P10CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 63
; P10CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P10CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P10CHECK: [[VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX]]
; P10CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 8
; P10CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 16
; P10CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 24
; P10CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 32
; P10CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 40
; P10CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 48
; P10CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 56
; P10CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i16>, ptr [[TMP1]], align 2, !tbaa [[SHORT_TBAA13:![0-9]+]]
; P10CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <8 x i16>, ptr [[TMP2]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <8 x i16>, ptr [[TMP3]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <8 x i16>, ptr [[TMP4]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <8 x i16>, ptr [[TMP5]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <8 x i16>, ptr [[TMP6]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <8 x i16>, ptr [[TMP7]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <8 x i16>, ptr [[TMP8]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[TMP9:%.*]] = sext <8 x i16> [[WIDE_LOAD]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI]], <8 x i32> [[TMP9]])
; P10CHECK-NEXT: [[TMP10:%.*]] = sext <8 x i16> [[WIDE_LOAD9]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI2]], <8 x i32> [[TMP10]])
; P10CHECK-NEXT: [[TMP11:%.*]] = sext <8 x i16> [[WIDE_LOAD10]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI3]], <8 x i32> [[TMP11]])
; P10CHECK-NEXT: [[TMP12:%.*]] = sext <8 x i16> [[WIDE_LOAD11]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI4]], <8 x i32> [[TMP12]])
; P10CHECK-NEXT: [[TMP13:%.*]] = sext <8 x i16> [[WIDE_LOAD12]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI5]], <8 x i32> [[TMP13]])
; P10CHECK-NEXT: [[TMP14:%.*]] = sext <8 x i16> [[WIDE_LOAD13]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI6]], <8 x i32> [[TMP14]])
; P10CHECK-NEXT: [[TMP15:%.*]] = sext <8 x i16> [[WIDE_LOAD14]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI7]], <8 x i32> [[TMP15]])
; P10CHECK-NEXT: [[TMP16:%.*]] = sext <8 x i16> [[WIDE_LOAD15]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI8]], <8 x i32> [[TMP16]])
; P10CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 64
; P10CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
; P10CHECK: [[MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P10CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P10CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P10CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P10CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P10CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P10CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P10CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P10CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P10CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
; P10CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF16:![0-9]+]]
; P10CHECK: [[VEC_EPILOG_PH]]:
; P10CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 7
; P10CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P10CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P10CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P10CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX30]]
; P10CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <8 x i16>, ptr [[TMP21]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[TMP22:%.*]] = sext <8 x i16> [[WIDE_LOAD32]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI31]], <8 x i32> [[TMP22]])
; P10CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 8
; P10CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]]
; P10CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P10CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P10CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P10CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P10CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P10CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P10CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P10CHECK: [[FOR_COND_CLEANUP]]:
; P10CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P10CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P10CHECK: [[FOR_BODY]]:
; P10CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[I_08]]
; P10CHECK-NEXT: [[TMP25:%.*]] = load i16, ptr [[ARRAYIDX]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[TMP25]] to i32
; P10CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_07]], [[CONV2]]
; P10CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P10CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P10CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]
;
entry:
%conv = zext nneg i32 %n to i64
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body, label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.body, %entry
%sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
ret i32 %sum.0.lcssa
for.body: ; preds = %entry, %for.body
%i.08 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
%sum.07 = phi i32 [ %add, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds nuw [2 x i8], ptr %a, i64 %i.08
%0 = load i16, ptr %arrayidx, align 2, !tbaa !19
%conv2 = sext i16 %0 to i32
%add = add nsw i32 %sum.07, %conv2
%inc = add nuw nsw i64 %i.08, 1
%exitcond.not = icmp eq i64 %inc, %conv
br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !20
}
; Function Attrs: nofree norecurse nosync nounwind memory(argmem: read) uwtable
define signext i32 @addu16(ptr nofree noundef readonly captures(none) %a, i32 noundef signext %n) {
; P8CHECK-LABEL: define signext i32 @addu16(
; P8CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P8CHECK-NEXT: [[ENTRY:.*]]:
; P8CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P8CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P8CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P8CHECK: [[ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 8
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P8CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 64
; P8CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P8CHECK: [[VECTOR_PH]]:
; P8CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 63
; P8CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P8CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P8CHECK: [[VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX]]
; P8CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 8
; P8CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 16
; P8CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 24
; P8CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 32
; P8CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 40
; P8CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 48
; P8CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 56
; P8CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i16>, ptr [[TMP1]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <8 x i16>, ptr [[TMP2]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <8 x i16>, ptr [[TMP3]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <8 x i16>, ptr [[TMP4]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <8 x i16>, ptr [[TMP5]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <8 x i16>, ptr [[TMP6]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <8 x i16>, ptr [[TMP7]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <8 x i16>, ptr [[TMP8]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[TMP9:%.*]] = zext <8 x i16> [[WIDE_LOAD]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI]], <8 x i32> [[TMP9]])
; P8CHECK-NEXT: [[TMP10:%.*]] = zext <8 x i16> [[WIDE_LOAD9]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI2]], <8 x i32> [[TMP10]])
; P8CHECK-NEXT: [[TMP11:%.*]] = zext <8 x i16> [[WIDE_LOAD10]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI3]], <8 x i32> [[TMP11]])
; P8CHECK-NEXT: [[TMP12:%.*]] = zext <8 x i16> [[WIDE_LOAD11]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI4]], <8 x i32> [[TMP12]])
; P8CHECK-NEXT: [[TMP13:%.*]] = zext <8 x i16> [[WIDE_LOAD12]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI5]], <8 x i32> [[TMP13]])
; P8CHECK-NEXT: [[TMP14:%.*]] = zext <8 x i16> [[WIDE_LOAD13]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI6]], <8 x i32> [[TMP14]])
; P8CHECK-NEXT: [[TMP15:%.*]] = zext <8 x i16> [[WIDE_LOAD14]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI7]], <8 x i32> [[TMP15]])
; P8CHECK-NEXT: [[TMP16:%.*]] = zext <8 x i16> [[WIDE_LOAD15]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI8]], <8 x i32> [[TMP16]])
; P8CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 64
; P8CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
; P8CHECK: [[MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P8CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P8CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P8CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P8CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P8CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P8CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P8CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P8CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P8CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P8CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P8CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
; P8CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF16]]
; P8CHECK: [[VEC_EPILOG_PH]]:
; P8CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P8CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 7
; P8CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P8CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P8CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P8CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P8CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P8CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX30]]
; P8CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <8 x i16>, ptr [[TMP21]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[TMP22:%.*]] = zext <8 x i16> [[WIDE_LOAD32]] to <8 x i32>
; P8CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI31]], <8 x i32> [[TMP22]])
; P8CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 8
; P8CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
; P8CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P8CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P8CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P8CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P8CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P8CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P8CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P8CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P8CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P8CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P8CHECK: [[FOR_COND_CLEANUP]]:
; P8CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P8CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P8CHECK: [[FOR_BODY]]:
; P8CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P8CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[I_08]]
; P8CHECK-NEXT: [[TMP25:%.*]] = load i16, ptr [[ARRAYIDX]], align 2, !tbaa [[SHORT_TBAA13]]
; P8CHECK-NEXT: [[CONV2:%.*]] = zext i16 [[TMP25]] to i32
; P8CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[SUM_07]], [[CONV2]]
; P8CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P8CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P8CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
;
; P9CHECK-LABEL: define signext i32 @addu16(
; P9CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P9CHECK-NEXT: [[ENTRY:.*]]:
; P9CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P9CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P9CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P9CHECK: [[ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 8
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P9CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 64
; P9CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P9CHECK: [[VECTOR_PH]]:
; P9CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 63
; P9CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P9CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P9CHECK: [[VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX]]
; P9CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 8
; P9CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 16
; P9CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 24
; P9CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 32
; P9CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 40
; P9CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 48
; P9CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 56
; P9CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i16>, ptr [[TMP1]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <8 x i16>, ptr [[TMP2]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <8 x i16>, ptr [[TMP3]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <8 x i16>, ptr [[TMP4]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <8 x i16>, ptr [[TMP5]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <8 x i16>, ptr [[TMP6]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <8 x i16>, ptr [[TMP7]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <8 x i16>, ptr [[TMP8]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[TMP9:%.*]] = zext <8 x i16> [[WIDE_LOAD]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI]], <8 x i32> [[TMP9]])
; P9CHECK-NEXT: [[TMP10:%.*]] = zext <8 x i16> [[WIDE_LOAD9]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI2]], <8 x i32> [[TMP10]])
; P9CHECK-NEXT: [[TMP11:%.*]] = zext <8 x i16> [[WIDE_LOAD10]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI3]], <8 x i32> [[TMP11]])
; P9CHECK-NEXT: [[TMP12:%.*]] = zext <8 x i16> [[WIDE_LOAD11]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI4]], <8 x i32> [[TMP12]])
; P9CHECK-NEXT: [[TMP13:%.*]] = zext <8 x i16> [[WIDE_LOAD12]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI5]], <8 x i32> [[TMP13]])
; P9CHECK-NEXT: [[TMP14:%.*]] = zext <8 x i16> [[WIDE_LOAD13]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI6]], <8 x i32> [[TMP14]])
; P9CHECK-NEXT: [[TMP15:%.*]] = zext <8 x i16> [[WIDE_LOAD14]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI7]], <8 x i32> [[TMP15]])
; P9CHECK-NEXT: [[TMP16:%.*]] = zext <8 x i16> [[WIDE_LOAD15]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI8]], <8 x i32> [[TMP16]])
; P9CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 64
; P9CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
; P9CHECK: [[MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P9CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P9CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P9CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P9CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P9CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P9CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P9CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P9CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P9CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P9CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P9CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
; P9CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF16]]
; P9CHECK: [[VEC_EPILOG_PH]]:
; P9CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P9CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 7
; P9CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P9CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P9CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P9CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P9CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P9CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX30]]
; P9CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <8 x i16>, ptr [[TMP21]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[TMP22:%.*]] = zext <8 x i16> [[WIDE_LOAD32]] to <8 x i32>
; P9CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI31]], <8 x i32> [[TMP22]])
; P9CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 8
; P9CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
; P9CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P9CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P9CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P9CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P9CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P9CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P9CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P9CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P9CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P9CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P9CHECK: [[FOR_COND_CLEANUP]]:
; P9CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P9CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P9CHECK: [[FOR_BODY]]:
; P9CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P9CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[I_08]]
; P9CHECK-NEXT: [[TMP25:%.*]] = load i16, ptr [[ARRAYIDX]], align 2, !tbaa [[SHORT_TBAA13]]
; P9CHECK-NEXT: [[CONV2:%.*]] = zext i16 [[TMP25]] to i32
; P9CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[SUM_07]], [[CONV2]]
; P9CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P9CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P9CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
;
; P10CHECK-LABEL: define signext i32 @addu16(
; P10CHECK-SAME: ptr nofree noundef readonly captures(none) [[A:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] {
; P10CHECK-NEXT: [[ENTRY:.*]]:
; P10CHECK-NEXT: [[CONV:%.*]] = zext i32 [[N]] to i64
; P10CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0
; P10CHECK-NEXT: br i1 [[CMP6]], label %[[ITER_CHECK:.*]], label %[[FOR_COND_CLEANUP:.*]]
; P10CHECK: [[ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[CONV]], 8
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]
; P10CHECK: [[VECTOR_MAIN_LOOP_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 [[CONV]], 64
; P10CHECK-NEXT: br i1 [[MIN_ITERS_CHECK1]], label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH:.*]]
; P10CHECK: [[VECTOR_PH]]:
; P10CHECK-NEXT: [[TMP0:%.*]] = and i64 [[CONV]], 63
; P10CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[CONV]], [[TMP0]]
; P10CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; P10CHECK: [[VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE16:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE17:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE18:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE19:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE20:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI7:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE21:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI8:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[PARTIAL_REDUCE22:%.*]], %[[VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX]]
; P10CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 8
; P10CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 16
; P10CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 24
; P10CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 32
; P10CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 40
; P10CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 48
; P10CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 56
; P10CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i16>, ptr [[TMP1]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD9:%.*]] = load <8 x i16>, ptr [[TMP2]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <8 x i16>, ptr [[TMP3]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD11:%.*]] = load <8 x i16>, ptr [[TMP4]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <8 x i16>, ptr [[TMP5]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD13:%.*]] = load <8 x i16>, ptr [[TMP6]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <8 x i16>, ptr [[TMP7]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <8 x i16>, ptr [[TMP8]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[TMP9:%.*]] = zext <8 x i16> [[WIDE_LOAD]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI]], <8 x i32> [[TMP9]])
; P10CHECK-NEXT: [[TMP10:%.*]] = zext <8 x i16> [[WIDE_LOAD9]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE16]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI2]], <8 x i32> [[TMP10]])
; P10CHECK-NEXT: [[TMP11:%.*]] = zext <8 x i16> [[WIDE_LOAD10]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE17]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI3]], <8 x i32> [[TMP11]])
; P10CHECK-NEXT: [[TMP12:%.*]] = zext <8 x i16> [[WIDE_LOAD11]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE18]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI4]], <8 x i32> [[TMP12]])
; P10CHECK-NEXT: [[TMP13:%.*]] = zext <8 x i16> [[WIDE_LOAD12]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE19]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI5]], <8 x i32> [[TMP13]])
; P10CHECK-NEXT: [[TMP14:%.*]] = zext <8 x i16> [[WIDE_LOAD13]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE20]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI6]], <8 x i32> [[TMP14]])
; P10CHECK-NEXT: [[TMP15:%.*]] = zext <8 x i16> [[WIDE_LOAD14]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE21]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI7]], <8 x i32> [[TMP15]])
; P10CHECK-NEXT: [[TMP16:%.*]] = zext <8 x i16> [[WIDE_LOAD15]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE22]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI8]], <8 x i32> [[TMP16]])
; P10CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 64
; P10CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[TMP17]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]]
; P10CHECK: [[MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[BIN_RDX:%.*]] = add <4 x i32> [[PARTIAL_REDUCE16]], [[PARTIAL_REDUCE]]
; P10CHECK-NEXT: [[BIN_RDX23:%.*]] = add <4 x i32> [[PARTIAL_REDUCE17]], [[BIN_RDX]]
; P10CHECK-NEXT: [[BIN_RDX24:%.*]] = add <4 x i32> [[PARTIAL_REDUCE18]], [[BIN_RDX23]]
; P10CHECK-NEXT: [[BIN_RDX25:%.*]] = add <4 x i32> [[PARTIAL_REDUCE19]], [[BIN_RDX24]]
; P10CHECK-NEXT: [[BIN_RDX26:%.*]] = add <4 x i32> [[PARTIAL_REDUCE20]], [[BIN_RDX25]]
; P10CHECK-NEXT: [[BIN_RDX27:%.*]] = add <4 x i32> [[PARTIAL_REDUCE21]], [[BIN_RDX26]]
; P10CHECK-NEXT: [[BIN_RDX28:%.*]] = add <4 x i32> [[PARTIAL_REDUCE22]], [[BIN_RDX27]]
; P10CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[BIN_RDX28]])
; P10CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[CONV]], [[N_VEC]]
; P10CHECK-NEXT: br i1 [[CMP_N]], label %[[FOR_COND_CLEANUP_LOOPEXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
; P10CHECK: [[VEC_EPILOG_ITER_CHECK]]:
; P10CHECK-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 8
; P10CHECK-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label %[[VEC_EPILOG_SCALAR_PH]], label %[[VEC_EPILOG_PH]], !prof [[PROF16]]
; P10CHECK: [[VEC_EPILOG_PH]]:
; P10CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
; P10CHECK-NEXT: [[TMP19:%.*]] = and i64 [[CONV]], 7
; P10CHECK-NEXT: [[N_VEC29:%.*]] = sub i64 [[CONV]], [[TMP19]]
; P10CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[BC_MERGE_RDX]], i64 0
; P10CHECK-NEXT: br label %[[VEC_EPILOG_VECTOR_BODY:.*]]
; P10CHECK: [[VEC_EPILOG_VECTOR_BODY]]:
; P10CHECK-NEXT: [[INDEX30:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT34:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[VEC_PHI31:%.*]] = phi <4 x i32> [ [[TMP20]], %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE33:%.*]], %[[VEC_EPILOG_VECTOR_BODY]] ]
; P10CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[INDEX30]]
; P10CHECK-NEXT: [[WIDE_LOAD32:%.*]] = load <8 x i16>, ptr [[TMP21]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[TMP22:%.*]] = zext <8 x i16> [[WIDE_LOAD32]] to <8 x i32>
; P10CHECK-NEXT: [[PARTIAL_REDUCE33]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> [[VEC_PHI31]], <8 x i32> [[TMP22]])
; P10CHECK-NEXT: [[INDEX_NEXT34]] = add nuw i64 [[INDEX30]], 8
; P10CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT34]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[TMP23]], label %[[VEC_EPILOG_MIDDLE_BLOCK:.*]], label %[[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]]
; P10CHECK: [[VEC_EPILOG_MIDDLE_BLOCK]]:
; P10CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE33]])
; P10CHECK-NEXT: [[CMP_N35:%.*]] = icmp eq i64 [[CONV]], [[N_VEC29]]
; P10CHECK-NEXT: br i1 [[CMP_N35]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[VEC_EPILOG_SCALAR_PH]]
; P10CHECK: [[VEC_EPILOG_SCALAR_PH]]:
; P10CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC29]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: [[BC_MERGE_RDX36:%.*]] = phi i32 [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[TMP18]], %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[ITER_CHECK]] ]
; P10CHECK-NEXT: br label %[[FOR_BODY:.*]]
; P10CHECK: [[FOR_COND_CLEANUP_LOOPEXIT]]:
; P10CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD:%.*]], %[[FOR_BODY]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ [[TMP24]], %[[VEC_EPILOG_MIDDLE_BLOCK]] ]
; P10CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
; P10CHECK: [[FOR_COND_CLEANUP]]:
; P10CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[FOR_COND_CLEANUP_LOOPEXIT]] ]
; P10CHECK-NEXT: ret i32 [[SUM_0_LCSSA]]
; P10CHECK: [[FOR_BODY]]:
; P10CHECK-NEXT: [[I_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[SUM_07:%.*]] = phi i32 [ [[ADD]], %[[FOR_BODY]] ], [ [[BC_MERGE_RDX36]], %[[VEC_EPILOG_SCALAR_PH]] ]
; P10CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [2 x i8], ptr [[A]], i64 [[I_08]]
; P10CHECK-NEXT: [[TMP25:%.*]] = load i16, ptr [[ARRAYIDX]], align 2, !tbaa [[SHORT_TBAA13]]
; P10CHECK-NEXT: [[CONV2:%.*]] = zext i16 [[TMP25]] to i32
; P10CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[SUM_07]], [[CONV2]]
; P10CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_08]], 1
; P10CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[CONV]]
; P10CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]]
;
entry:
%conv = zext nneg i32 %n to i64
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body, label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.body, %entry
%sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
ret i32 %sum.0.lcssa
for.body: ; preds = %entry, %for.body
%i.08 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
%sum.07 = phi i32 [ %add, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds nuw [2 x i8], ptr %a, i64 %i.08
%0 = load i16, ptr %arrayidx, align 2, !tbaa !19
%conv2 = zext i16 %0 to i32
%add = add nuw nsw i32 %sum.07, %conv2
%inc = add nuw nsw i64 %i.08, 1
%exitcond.not = icmp eq i64 %inc, %conv
br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !22
}
!0 = !{!"Simple C/C++ TBAA"}
!1 = !{!"omnipotent char", !0, i64 0}
!5 = !{!"int", !1, i64 0}
!10 = !{!1, !1, i64 0}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
!14 = distinct !{!14, !11}
!15 = !{!"short", !1, i64 0}
!19 = !{!15, !15, i64 0}
!20 = distinct !{!20, !11}
!22 = distinct !{!22, !11}
;.
; P8CHECK: [[CHAR_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; P8CHECK: [[META1]] = !{!"omnipotent char", [[META2:![0-9]+]], i64 0}
; P8CHECK: [[META2]] = !{!"Simple C/C++ TBAA"}
; P8CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META4:![0-9]+]], [[META5:![0-9]+]], [[META6:![0-9]+]]}
; P8CHECK: [[META4]] = !{!"llvm.loop.mustprogress"}
; P8CHECK: [[META5]] = !{!"llvm.loop.isvectorized", i32 1}
; P8CHECK: [[META6]] = !{!"llvm.loop.unroll.runtime.disable"}
; P8CHECK: [[PROF7]] = !{!"branch_weights", i32 16, i32 112}
; P8CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META4]], [[META5]], [[META6]]}
; P8CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META4]], [[META6]], [[META5]]}
; P8CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META4]], [[META5]], [[META6]]}
; P8CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META4]], [[META5]], [[META6]]}
; P8CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META4]], [[META6]], [[META5]]}
; P8CHECK: [[SHORT_TBAA13]] = !{[[META14:![0-9]+]], [[META14]], i64 0}
; P8CHECK: [[META14]] = !{!"short", [[META1]], i64 0}
; P8CHECK: [[LOOP15]] = distinct !{[[LOOP15]], [[META4]], [[META5]], [[META6]]}
; P8CHECK: [[PROF16]] = !{!"branch_weights", i32 8, i32 56}
; P8CHECK: [[LOOP17]] = distinct !{[[LOOP17]], [[META4]], [[META5]], [[META6]]}
; P8CHECK: [[LOOP18]] = distinct !{[[LOOP18]], [[META4]], [[META6]], [[META5]]}
; P8CHECK: [[LOOP19]] = distinct !{[[LOOP19]], [[META4]], [[META5]], [[META6]]}
; P8CHECK: [[LOOP20]] = distinct !{[[LOOP20]], [[META4]], [[META5]], [[META6]]}
; P8CHECK: [[LOOP21]] = distinct !{[[LOOP21]], [[META4]], [[META6]], [[META5]]}
;.
; P9CHECK: [[CHAR_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; P9CHECK: [[META1]] = !{!"omnipotent char", [[META2:![0-9]+]], i64 0}
; P9CHECK: [[META2]] = !{!"Simple C/C++ TBAA"}
; P9CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META4:![0-9]+]], [[META5:![0-9]+]], [[META6:![0-9]+]]}
; P9CHECK: [[META4]] = !{!"llvm.loop.mustprogress"}
; P9CHECK: [[META5]] = !{!"llvm.loop.isvectorized", i32 1}
; P9CHECK: [[META6]] = !{!"llvm.loop.unroll.runtime.disable"}
; P9CHECK: [[PROF7]] = !{!"branch_weights", i32 16, i32 112}
; P9CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META4]], [[META5]], [[META6]]}
; P9CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META4]], [[META6]], [[META5]]}
; P9CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META4]], [[META5]], [[META6]]}
; P9CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META4]], [[META5]], [[META6]]}
; P9CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META4]], [[META6]], [[META5]]}
; P9CHECK: [[SHORT_TBAA13]] = !{[[META14:![0-9]+]], [[META14]], i64 0}
; P9CHECK: [[META14]] = !{!"short", [[META1]], i64 0}
; P9CHECK: [[LOOP15]] = distinct !{[[LOOP15]], [[META4]], [[META5]], [[META6]]}
; P9CHECK: [[PROF16]] = !{!"branch_weights", i32 8, i32 56}
; P9CHECK: [[LOOP17]] = distinct !{[[LOOP17]], [[META4]], [[META5]], [[META6]]}
; P9CHECK: [[LOOP18]] = distinct !{[[LOOP18]], [[META4]], [[META6]], [[META5]]}
; P9CHECK: [[LOOP19]] = distinct !{[[LOOP19]], [[META4]], [[META5]], [[META6]]}
; P9CHECK: [[LOOP20]] = distinct !{[[LOOP20]], [[META4]], [[META5]], [[META6]]}
; P9CHECK: [[LOOP21]] = distinct !{[[LOOP21]], [[META4]], [[META6]], [[META5]]}
;.
; P10CHECK: [[CHAR_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
; P10CHECK: [[META1]] = !{!"omnipotent char", [[META2:![0-9]+]], i64 0}
; P10CHECK: [[META2]] = !{!"Simple C/C++ TBAA"}
; P10CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META4:![0-9]+]], [[META5:![0-9]+]], [[META6:![0-9]+]]}
; P10CHECK: [[META4]] = !{!"llvm.loop.mustprogress"}
; P10CHECK: [[META5]] = !{!"llvm.loop.isvectorized", i32 1}
; P10CHECK: [[META6]] = !{!"llvm.loop.unroll.runtime.disable"}
; P10CHECK: [[PROF7]] = !{!"branch_weights", i32 16, i32 112}
; P10CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META4]], [[META5]], [[META6]]}
; P10CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META4]], [[META6]], [[META5]]}
; P10CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META4]], [[META5]], [[META6]]}
; P10CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META4]], [[META5]], [[META6]]}
; P10CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META4]], [[META6]], [[META5]]}
; P10CHECK: [[SHORT_TBAA13]] = !{[[META14:![0-9]+]], [[META14]], i64 0}
; P10CHECK: [[META14]] = !{!"short", [[META1]], i64 0}
; P10CHECK: [[LOOP15]] = distinct !{[[LOOP15]], [[META4]], [[META5]], [[META6]]}
; P10CHECK: [[PROF16]] = !{!"branch_weights", i32 8, i32 56}
; P10CHECK: [[LOOP17]] = distinct !{[[LOOP17]], [[META4]], [[META5]], [[META6]]}
; P10CHECK: [[LOOP18]] = distinct !{[[LOOP18]], [[META4]], [[META6]], [[META5]]}
; P10CHECK: [[LOOP19]] = distinct !{[[LOOP19]], [[META4]], [[META5]], [[META6]]}
; P10CHECK: [[LOOP20]] = distinct !{[[LOOP20]], [[META4]], [[META5]], [[META6]]}
; P10CHECK: [[LOOP21]] = distinct !{[[LOOP21]], [[META4]], [[META6]], [[META5]]}
;.