test/Transforms/LoopInterchange/atomic-memory-ordering.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=loop-interchange -loop-interchange-profitabilities=ignore -S | FileCheck %s

@g = global i64 0

; Test cases that contain atomic instructions inside the loops thus interchange
; must not be applied.

define void @atomicrmw() {
; CHECK-LABEL: define void @atomicrmw() {
; CHECK-NEXT:  [[FOR_J_PREHEADER:.*]]:
; CHECK-NEXT:    br label %[[FOR_J:.*]]
; CHECK:       [[FOR_J]]:
; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, %[[FOR_J_PREHEADER]] ], [ [[I_NEXT:%.*]], %[[FOR_I_LATCH:.*]] ]
; CHECK-NEXT:    br label %[[FOR_I_HEADER_PREHEADER:.*]]
; CHECK:       [[FOR_I_HEADER_PREHEADER]]:
; CHECK-NEXT:    [[J:%.*]] = phi i64 [ 0, %[[FOR_J]] ], [ [[TMP0:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT:    [[OLD:%.*]] = atomicrmw xchg ptr @g, i64 [[J]] monotonic, align 8
; CHECK-NEXT:    [[TMP0]] = add i64 [[J]], 1
; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i64 [[TMP0]], 8
; CHECK-NEXT:    br i1 [[TMP1]], label %[[FOR_I_LATCH]], label %[[FOR_I_HEADER_PREHEADER]]
; CHECK:       [[FOR_I_LATCH]]:
; CHECK-NEXT:    [[I_NEXT]] = add i64 [[I]], 1
; CHECK-NEXT:    [[EC_I:%.*]] = icmp eq i64 [[I_NEXT]], 8
; CHECK-NEXT:    br i1 [[EC_I]], label %[[EXIT:.*]], label %[[FOR_J]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.i.header

for.i.header:
  %i = phi i64 [ 0, %entry ], [ %i.next, %for.i.latch ]
  br label %for.j

for.j:
  %j = phi i64 [ 0, %for.i.header ], [ %j.next, %for.j ]
  %old = atomicrmw xchg ptr @g, i64 %j monotonic
  %j.next = add i64 %j, 1
  %ec.j = icmp eq i64 %j.next, 8
  br i1 %ec.j, label %for.i.latch, label %for.j

for.i.latch:
  %i.next = add i64 %i, 1
  %ec.i = icmp eq i64 %i.next, 8
  br i1 %ec.i, label %exit, label %for.i.header

exit:
  ret void
}

define void @cmpxchg(i64 %cmp) {
; CHECK-LABEL: define void @cmpxchg(
; CHECK-SAME: i64 [[CMP:%.*]]) {
; CHECK-NEXT:  [[FOR_J_PREHEADER:.*]]:
; CHECK-NEXT:    br label %[[FOR_J:.*]]
; CHECK:       [[FOR_J]]:
; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, %[[FOR_J_PREHEADER]] ], [ [[I_NEXT:%.*]], %[[FOR_I_LATCH:.*]] ]
; CHECK-NEXT:    br label %[[FOR_I_HEADER_PREHEADER:.*]]
; CHECK:       [[FOR_I_HEADER_PREHEADER]]:
; CHECK-NEXT:    [[J:%.*]] = phi i64 [ 0, %[[FOR_J]] ], [ [[TMP0:%.*]], %[[FOR_I_HEADER_PREHEADER]] ]
; CHECK-NEXT:    [[OLD:%.*]] = cmpxchg ptr @g, i64 [[CMP]], i64 [[J]] monotonic monotonic, align 8
; CHECK-NEXT:    [[TMP0]] = add i64 [[J]], 1
; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i64 [[TMP0]], 8
; CHECK-NEXT:    br i1 [[TMP1]], label %[[FOR_I_LATCH]], label %[[FOR_I_HEADER_PREHEADER]]
; CHECK:       [[FOR_I_LATCH]]:
; CHECK-NEXT:    [[I_NEXT]] = add i64 [[I]], 1
; CHECK-NEXT:    [[EC_I:%.*]] = icmp eq i64 [[I_NEXT]], 8
; CHECK-NEXT:    br i1 [[EC_I]], label %[[EXIT:.*]], label %[[FOR_J]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.i.header

for.i.header:
  %i = phi i64 [ 0, %entry ], [ %i.next, %for.i.latch ]
  br label %for.j

for.j:
  %j = phi i64 [ 0, %for.i.header ], [ %j.next, %for.j ]
  %old = cmpxchg ptr @g, i64 %cmp, i64 %j monotonic monotonic
  %j.next = add i64 %j, 1
  %ec.j = icmp eq i64 %j.next, 8
  br i1 %ec.j, label %for.i.latch, label %for.j

for.i.latch:
  %i.next = add i64 %i, 1
  %ec.i = icmp eq i64 %i.next, 8
  br i1 %ec.i, label %exit, label %for.i.header

exit:
  ret void
}

define void @atomic_load_store(ptr noalias %A, ptr noalias %B) {
; CHECK-LABEL: define void @atomic_load_store(
; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_I_HEADER:.*]]
; CHECK:       [[FOR_I_HEADER]]:
; CHECK-NEXT:    [[I:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[FOR_I_LATCH:.*]] ]
; CHECK-NEXT:    br label %[[FOR_J:.*]]
; CHECK:       [[FOR_J]]:
; CHECK-NEXT:    [[J:%.*]] = phi i64 [ 0, %[[FOR_I_HEADER]] ], [ [[J_NEXT:%.*]], %[[FOR_J]] ]
; CHECK-NEXT:    [[GEP_A:%.*]] = getelementptr [8 x i8], ptr [[A]], i64 [[J]], i64 [[I]]
; CHECK-NEXT:    [[GEP_B:%.*]] = getelementptr [8 x i8], ptr [[B]], i64 [[J]], i64 [[I]]
; CHECK-NEXT:    [[VAL_A:%.*]] = load atomic i8, ptr [[GEP_A]] monotonic, align 1
; CHECK-NEXT:    store atomic i8 [[VAL_A]], ptr [[GEP_B]] monotonic, align 1
; CHECK-NEXT:    [[J_NEXT]] = add i64 [[J]], 1
; CHECK-NEXT:    [[EC_J:%.*]] = icmp eq i64 [[J_NEXT]], 8
; CHECK-NEXT:    br i1 [[EC_J]], label %[[FOR_I_LATCH]], label %[[FOR_J]]
; CHECK:       [[FOR_I_LATCH]]:
; CHECK-NEXT:    [[I_NEXT]] = add i64 [[I]], 1
; CHECK-NEXT:    [[EC_I:%.*]] = icmp eq i64 [[I_NEXT]], 8
; CHECK-NEXT:    br i1 [[EC_I]], label %[[EXIT:.*]], label %[[FOR_I_HEADER]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.i.header

for.i.header:
  %i = phi i64 [ 0, %entry ], [ %i.next, %for.i.latch ]
  br label %for.j

for.j:
  %j = phi i64 [ 0, %for.i.header ], [ %j.next, %for.j ]
  %gep.A = getelementptr [8 x i8], ptr %A, i64 %j, i64 %i
  %gep.B = getelementptr [8 x i8], ptr %B, i64 %j, i64 %i
  %val.A = load atomic i8, ptr %gep.A monotonic, align 1
  store atomic i8 %val.A, ptr %gep.B monotonic, align 1
  %j.next = add i64 %j, 1
  %ec.j = icmp eq i64 %j.next, 8
  br i1 %ec.j, label %for.i.latch, label %for.j

for.i.latch:
  %i.next = add i64 %i, 1
  %ec.i = icmp eq i64 %i.next, 8
  br i1 %ec.i, label %exit, label %for.i.header

exit:
  ret void
}