test/CodeGen/X86/coalescer-empty-interval-overlaps.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=register-coalescer -verify-coalescing -o - %s | FileCheck %s

# This test demonstrates a bug in RegisterCoalescer where LiveRange::overlaps()
# is called on a register with an empty live interval, leading to a crash.
# Overlapping check must be symmetric.
#
# The pattern needed to reproduce the crash:
#   1. Copy A: %dst = COPY %src, where %dst is terminal (no other copy affinity)
#   2. Copy B: %src = COPY %undef_reg, redefining %src from an undefined register
#   3. %undef_reg has no definition (empty live interval)
#   4. %undef_reg is non-terminal (appears in at least two copies)
#

---
name:            empty_interval_overlaps_crash
tracksRegLiveness: true
body:             |
  bb.0:
    ; Copy A: %1 = COPY %0 (SrcReg=%0, DstReg=%1)
    ; %0 is undef here (no prior def). %1 is terminal (only non-copy use below).
    ; CHECK-LABEL: name: empty_interval_overlaps_crash
    ; CHECK: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
    ; CHECK-NEXT: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr [[DEF]], [[DEF1]], implicit-def dead $eflags
    ; CHECK-NEXT: $eax = COPY [[ADD32rr]]
    ; CHECK-NEXT: RET 0, implicit $eax
    %1:gr32 = COPY undef %0:gr32

    ; Copy B: %0 = COPY %2 (SrcReg=%0 as destination)
    ; applyTerminalRule for Copy A finds this, extracts OtherReg=%0,
    ; sees OtherReg==SrcReg, swaps to OtherReg=%2.
    ; %2 has no def -> empty interval -> crash in overlaps().
    %0:gr32 = COPY undef %2:gr32

    ; Copy C: makes %2 non-terminal (two copy uses required)
    %3:gr32 = COPY undef %2:gr32

    ; Non-copy uses to keep %1 and %3 alive
    %4:gr32 = ADD32rr %1, %3, implicit-def dead $eflags

    $eax = COPY %4
    RET 0, implicit $eax
...