test/CodeGen/WebAssembly/narrow-simd-mul.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=wasm32 -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s

define <8 x i8> @mul_v8i8(<8 x i8> %a, <8 x i8> %b) {
; CHECK-LABEL: mul_v8i8:
; CHECK:         .functype mul_v8i8 (v128, v128) -> (v128)
; CHECK-NEXT:  # %bb.0:
; CHECK-NEXT:    i16x8.extmul_low_i8x16_u $push0=, $0, $1
; CHECK-NEXT:    i8x16.shuffle $push1=, $pop0, $1, 0, 2, 4, 6, 8, 10, 12, 14, 0, 0, 0, 0, 0, 0, 0, 0
; CHECK-NEXT:    return $pop1
  %mul = mul <8 x i8> %a, %b
  ret <8 x i8> %mul
}

define <4 x i16> @mul_v4i16(<4 x i16> %a, <4 x i16> %b) {
; CHECK-LABEL: mul_v4i16:
; CHECK:         .functype mul_v4i16 (v128, v128) -> (v128)
; CHECK-NEXT:  # %bb.0:
; CHECK-NEXT:    i16x8.mul $push0=, $0, $1
; CHECK-NEXT:    return $pop0
  %mul = mul <4 x i16> %a, %b
  ret <4 x i16> %mul
}

define <2 x i32> @mul_v2i32(<2 x i32> %a, <2 x i32> %b) {
; CHECK-LABEL: mul_v2i32:
; CHECK:         .functype mul_v2i32 (v128, v128) -> (v128)
; CHECK-NEXT:  # %bb.0:
; CHECK-NEXT:    i32x4.mul $push0=, $0, $1
; CHECK-NEXT:    return $pop0
  %mul = mul <2 x i32> %a, %b
  ret <2 x i32> %mul
}