test/CodeGen/WebAssembly/mask-beforefirst.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=wasm32 -mattr=+simd128 | FileCheck %s

define <2 x i64> @v2i1(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: v2i1:
; CHECK:         .functype v2i1 (v128, v128) -> (v128)
; CHECK-NEXT:    .local v128, i64, i64, i32
; CHECK-NEXT:  # %bb.0:
; CHECK-NEXT:    local.get 0
; CHECK-NEXT:    local.get 1
; CHECK-NEXT:    i64.const -1
; CHECK-NEXT:    i64.const 0
; CHECK-NEXT:    i64.const 2
; CHECK-NEXT:    local.get 0
; CHECK-NEXT:    local.get 1
; CHECK-NEXT:    i64x2.gt_s
; CHECK-NEXT:    v128.const 2, 1
; CHECK-NEXT:    v128.and
; CHECK-NEXT:    local.tee 2
; CHECK-NEXT:    i64x2.extract_lane 0
; CHECK-NEXT:    local.tee 3
; CHECK-NEXT:    local.get 2
; CHECK-NEXT:    i64x2.extract_lane 1
; CHECK-NEXT:    local.tee 4
; CHECK-NEXT:    local.get 3
; CHECK-NEXT:    local.get 4
; CHECK-NEXT:    i64.gt_u
; CHECK-NEXT:    i64.select
; CHECK-NEXT:    i64.sub
; CHECK-NEXT:    i32.wrap_i64
; CHECK-NEXT:    local.tee 5
; CHECK-NEXT:    i64.select
; CHECK-NEXT:    i64x2.splat
; CHECK-NEXT:    i64.const -1
; CHECK-NEXT:    i64.const 0
; CHECK-NEXT:    local.get 5
; CHECK-NEXT:    i32.const 1
; CHECK-NEXT:    i32.gt_u
; CHECK-NEXT:    i64.select
; CHECK-NEXT:    i64x2.replace_lane 1
; CHECK-NEXT:    v128.bitselect
; CHECK-NEXT:    # fallthrough-return
  %m = icmp sgt <2 x i64> %a0, %a1
  %x = call <2 x i1> @llvm.mask.beforefirst(<2 x i1> %m)
  %r = select <2 x i1> %x, <2 x i64> %a0, <2 x i64> %a1
  ret <2 x i64> %r
}