test/CodeGen/SystemZ/copy-phys-reg-gr128-to-vr128.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=s390x-ibm-linux -mcpu=z13 -run-pass=postrapseudos -verify-machineinstrs -o - %s | FileCheck %s

---
name:            copy_gr128_to_vr128__r0q_to_v0
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $r0q
    ; CHECK-LABEL: name: copy_gr128_to_vr128__r0q_to_v0
    ; CHECK: liveins: $r0q
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $v0 = VLVGP $r0d, $r1d
    ; CHECK-NEXT: Return implicit $v0
    $v0 = COPY $r0q
    Return implicit $v0
...

---
name:            copy_gr128_to_vr128__r0q_to_v0_killed
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $r0q
    ; CHECK-LABEL: name: copy_gr128_to_vr128__r0q_to_v0_killed
    ; CHECK: liveins: $r0q
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $v0 = VLVGP $r0d, $r1d
    ; CHECK-NEXT: Return implicit $v0
    $v0 = COPY killed $r0q
    Return implicit $v0
...

---
name:            copy_gr128_to_vr128__r0q_to_v0_undef
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $r0q
    ; CHECK-LABEL: name: copy_gr128_to_vr128__r0q_to_v0_undef
    ; CHECK: liveins: $r0q
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $v0 = KILL undef $r0q
    ; CHECK-NEXT: Return implicit $v0
    $v0 = COPY undef $r0q
    Return implicit $v0
...