test/CodeGen/SystemZ/args-23.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z16 | FileCheck %s --check-prefix=VECTOR
;
; Test passing IR vector arguments.

@Fnptr = external global ptr
@Src = external global ptr
@Dst = external global ptr

%Ty0 = type <1 x i128>
define void @arg0(%Ty0 %A) {
; CHECK-LABEL: arg0:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lg %r0, 8(%r2)
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    lg %r2, 0(%r2)
; CHECK-NEXT:    stg %r0, 8(%r1)
; CHECK-NEXT:    stg %r2, 0(%r1)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: arg0:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    br %r14
  store %Ty0 %A, ptr @Dst
  ret void
}

define void @call0() {
; CHECK-LABEL: call0:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -176
; CHECK-NEXT:    .cfi_def_cfa_offset 336
; CHECK-NEXT:    lgrl %r1, Src@GOT
; CHECK-NEXT:    lg %r0, 8(%r1)
; CHECK-NEXT:    lg %r1, 0(%r1)
; CHECK-NEXT:    stg %r0, 168(%r15)
; CHECK-NEXT:    la %r2, 160(%r15)
; CHECK-NEXT:    stg %r1, 160(%r15)
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lmg %r14, %r15, 288(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: call0:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    lgrl %r1, Src@GOT
; VECTOR-NEXT:    vl %v24, 0(%r1), 3
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %L = load %Ty0, ptr @Src
  call void @Fnptr(%Ty0 %L)
  ret void
}

define void @ret0() {
; CHECK-LABEL: ret0:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -160
; CHECK-NEXT:    .cfi_def_cfa_offset 320
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    stg %r3, 8(%r1)
; CHECK-NEXT:    stg %r2, 0(%r1)
; CHECK-NEXT:    lmg %r14, %r15, 272(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: ret0:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %C = call %Ty0 @Fnptr()
  store %Ty0 %C, ptr @Dst
  ret void
}

%Ty1 = type <1 x fp128>
define void @arg1(%Ty1 %A) {
; CHECK-LABEL: arg1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    ld %f0, 0(%r2)
; CHECK-NEXT:    ld %f2, 8(%r2)
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    std %f0, 0(%r1)
; CHECK-NEXT:    std %f2, 8(%r1)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: arg1:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    br %r14
  store %Ty1 %A, ptr @Dst
  ret void
}

define void @call1() {
; CHECK-LABEL: call1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -176
; CHECK-NEXT:    .cfi_def_cfa_offset 336
; CHECK-NEXT:    lgrl %r1, Src@GOT
; CHECK-NEXT:    ld %f0, 0(%r1)
; CHECK-NEXT:    ld %f2, 8(%r1)
; CHECK-NEXT:    la %r2, 160(%r15)
; CHECK-NEXT:    std %f0, 160(%r15)
; CHECK-NEXT:    std %f2, 168(%r15)
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lmg %r14, %r15, 288(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: call1:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    lgrl %r1, Src@GOT
; VECTOR-NEXT:    vl %v24, 0(%r1), 3
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %L = load %Ty1, ptr @Src
  call void @Fnptr(%Ty1 %L)
  ret void
}

define void @ret1() {
; CHECK-LABEL: ret1:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -176
; CHECK-NEXT:    .cfi_def_cfa_offset 336
; CHECK-NEXT:    la %r2, 160(%r15)
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    ld %f0, 160(%r15)
; CHECK-NEXT:    ld %f2, 168(%r15)
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    std %f0, 0(%r1)
; CHECK-NEXT:    std %f2, 8(%r1)
; CHECK-NEXT:    lmg %r14, %r15, 288(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: ret1:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %C = call %Ty1 @Fnptr()
  store %Ty1 %C, ptr @Dst
  ret void
}

%Ty2 = type <2 x i64>
define void @arg2(%Ty2 %A) {
; CHECK-LABEL: arg2:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lg %r0, 8(%r2)
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    lg %r2, 0(%r2)
; CHECK-NEXT:    stg %r0, 8(%r1)
; CHECK-NEXT:    stg %r2, 0(%r1)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: arg2:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    br %r14
  store %Ty2 %A, ptr @Dst
  ret void
}

define void @call2() {
; CHECK-LABEL: call2:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -176
; CHECK-NEXT:    .cfi_def_cfa_offset 336
; CHECK-NEXT:    lgrl %r1, Src@GOT
; CHECK-NEXT:    lg %r0, 8(%r1)
; CHECK-NEXT:    lg %r1, 0(%r1)
; CHECK-NEXT:    stg %r0, 168(%r15)
; CHECK-NEXT:    la %r2, 160(%r15)
; CHECK-NEXT:    stg %r1, 160(%r15)
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lmg %r14, %r15, 288(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: call2:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    lgrl %r1, Src@GOT
; VECTOR-NEXT:    vl %v24, 0(%r1), 3
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %L = load %Ty2, ptr @Src
  call void @Fnptr(%Ty2 %L)
  ret void
}

define void @ret2() {
; CHECK-LABEL: ret2:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -160
; CHECK-NEXT:    .cfi_def_cfa_offset 320
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    stg %r3, 8(%r1)
; CHECK-NEXT:    stg %r2, 0(%r1)
; CHECK-NEXT:    lmg %r14, %r15, 272(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: ret2:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %C = call %Ty2 @Fnptr()
  store %Ty2 %C, ptr @Dst
  ret void
}

%Ty3 = type <2 x double>
define void @arg3(%Ty3 %A) {
; CHECK-LABEL: arg3:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    std %f2, 8(%r1)
; CHECK-NEXT:    std %f0, 0(%r1)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: arg3:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    br %r14
  store %Ty3 %A, ptr @Dst
  ret void
}

define void @call3() {
; CHECK-LABEL: call3:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -160
; CHECK-NEXT:    .cfi_def_cfa_offset 320
; CHECK-NEXT:    lgrl %r1, Src@GOT
; CHECK-NEXT:    ld %f2, 8(%r1)
; CHECK-NEXT:    ld %f0, 0(%r1)
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lmg %r14, %r15, 272(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: call3:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    lgrl %r1, Src@GOT
; VECTOR-NEXT:    vl %v24, 0(%r1), 3
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %L = load %Ty3, ptr @Src
  call void @Fnptr(%Ty3 %L)
  ret void
}

define void @ret3() {
; CHECK-LABEL: ret3:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -160
; CHECK-NEXT:    .cfi_def_cfa_offset 320
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    std %f2, 8(%r1)
; CHECK-NEXT:    std %f0, 0(%r1)
; CHECK-NEXT:    lmg %r14, %r15, 272(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: ret3:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -160
; VECTOR-NEXT:    .cfi_def_cfa_offset 320
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v24, 0(%r1), 3
; VECTOR-NEXT:    lmg %r14, %r15, 272(%r15)
; VECTOR-NEXT:    br %r14
  %C = call %Ty3 @Fnptr()
  store %Ty3 %C, ptr @Dst
  ret void
}

%Ty4 = type <1 x i256>
define void @arg4(%Ty4 %A) {
; CHECK-LABEL: arg4:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lg %r0, 24(%r2)
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    lg %r3, 16(%r2)
; CHECK-NEXT:    lg %r4, 8(%r2)
; CHECK-NEXT:    lg %r2, 0(%r2)
; CHECK-NEXT:    stg %r0, 24(%r1)
; CHECK-NEXT:    stg %r3, 16(%r1)
; CHECK-NEXT:    stg %r4, 8(%r1)
; CHECK-NEXT:    stg %r2, 0(%r1)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: arg4:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    vl %v0, 0(%r2), 3
; VECTOR-NEXT:    vl %v1, 16(%r2), 3
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v1, 16(%r1), 4
; VECTOR-NEXT:    vst %v0, 0(%r1), 4
; VECTOR-NEXT:    br %r14
  store %Ty4 %A, ptr @Dst
  ret void
}

define void @call4() {
; CHECK-LABEL: call4:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -192
; CHECK-NEXT:    .cfi_def_cfa_offset 352
; CHECK-NEXT:    lgrl %r1, Src@GOT
; CHECK-NEXT:    lg %r0, 24(%r1)
; CHECK-NEXT:    lg %r2, 16(%r1)
; CHECK-NEXT:    lg %r3, 8(%r1)
; CHECK-NEXT:    lg %r1, 0(%r1)
; CHECK-NEXT:    stg %r0, 184(%r15)
; CHECK-NEXT:    stg %r2, 176(%r15)
; CHECK-NEXT:    stg %r3, 168(%r15)
; CHECK-NEXT:    la %r2, 160(%r15)
; CHECK-NEXT:    stg %r1, 160(%r15)
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lmg %r14, %r15, 304(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: call4:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -192
; VECTOR-NEXT:    .cfi_def_cfa_offset 352
; VECTOR-NEXT:    lgrl %r1, Src@GOT
; VECTOR-NEXT:    vl %v0, 0(%r1), 4
; VECTOR-NEXT:    vl %v1, 16(%r1), 4
; VECTOR-NEXT:    la %r2, 160(%r15)
; VECTOR-NEXT:    vst %v1, 176(%r15), 3
; VECTOR-NEXT:    vst %v0, 160(%r15), 3
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    lmg %r14, %r15, 304(%r15)
; VECTOR-NEXT:    br %r14
  %L = load %Ty4, ptr @Src
  call void @Fnptr(%Ty4 %L)
  ret void
}

define void @ret4() {
; CHECK-LABEL: ret4:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-NEXT:    .cfi_offset %r14, -48
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -160
; CHECK-NEXT:    .cfi_def_cfa_offset 320
; CHECK-NEXT:    brasl %r14, Fnptr@PLT
; CHECK-NEXT:    lgrl %r1, Dst@GOT
; CHECK-NEXT:    stg %r5, 24(%r1)
; CHECK-NEXT:    stg %r4, 16(%r1)
; CHECK-NEXT:    stg %r3, 8(%r1)
; CHECK-NEXT:    stg %r2, 0(%r1)
; CHECK-NEXT:    lmg %r14, %r15, 272(%r15)
; CHECK-NEXT:    br %r14
;
; VECTOR-LABEL: ret4:
; VECTOR:       # %bb.0:
; VECTOR-NEXT:    stmg %r14, %r15, 112(%r15)
; VECTOR-NEXT:    .cfi_offset %r14, -48
; VECTOR-NEXT:    .cfi_offset %r15, -40
; VECTOR-NEXT:    aghi %r15, -192
; VECTOR-NEXT:    .cfi_def_cfa_offset 352
; VECTOR-NEXT:    la %r2, 160(%r15)
; VECTOR-NEXT:    brasl %r14, Fnptr@PLT
; VECTOR-NEXT:    vl %v0, 160(%r15), 3
; VECTOR-NEXT:    vl %v1, 176(%r15), 3
; VECTOR-NEXT:    lgrl %r1, Dst@GOT
; VECTOR-NEXT:    vst %v1, 16(%r1), 4
; VECTOR-NEXT:    vst %v0, 0(%r1), 4
; VECTOR-NEXT:    lmg %r14, %r15, 304(%r15)
; VECTOR-NEXT:    br %r14
  %C = call %Ty4 @Fnptr()
  store %Ty4 %C, ptr @Dst
  ret void
}