test/CodeGen/RISCV/umulh.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=riscv32 | FileCheck %s --check-prefixes=CHECK,CHECK-I,RV32I
; RUN: llc < %s -mtriple=riscv64 | FileCheck %s --check-prefixes=CHECK,CHECK-I,RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefixes=CHECK,CHECK-M,RV32M,RV32IM
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefixes=CHECK,CHECK-M,RV64M,RV64IM
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v | FileCheck %s --check-prefixes=CHECK,CHECK-M,RV32M,CHECK-V,RV32V
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v | FileCheck %s --check-prefixes=CHECK,CHECK-M,RV64M,CHECK-V,RV64V

define i16 @umulh_i16(i16 %x, i16 %y) nounwind {
; RV32I-LABEL: umulh_i16:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lui a2, 16
; RV32I-NEXT:    addi a2, a2, -1
; RV32I-NEXT:    and a0, a0, a2
; RV32I-NEXT:    and a1, a1, a2
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli a0, a0, 16
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_i16:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lui a2, 16
; RV64I-NEXT:    addi a2, a2, -1
; RV64I-NEXT:    and a0, a0, a2
; RV64I-NEXT:    and a1, a1, a2
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 16
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; CHECK-M-LABEL: umulh_i16:
; CHECK-M:       # %bb.0:
; CHECK-M-NEXT:    lui a2, 16
; CHECK-M-NEXT:    addi a2, a2, -1
; CHECK-M-NEXT:    and a1, a1, a2
; CHECK-M-NEXT:    and a0, a0, a2
; CHECK-M-NEXT:    mul a0, a0, a1
; CHECK-M-NEXT:    srli a0, a0, 16
; CHECK-M-NEXT:    ret
  %r = call i16 @llvm.umulh(i16 %x, i16 %y)
  ret i16 %r
}

define i32 @umulh_i32(i32 %x, i32 %y) nounwind {
; RV32I-LABEL: umulh_i32:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a2, a1
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv a0, a1
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_i32:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    slli a0, a0, 32
; RV64I-NEXT:    slli a1, a1, 32
; RV64I-NEXT:    srli a0, a0, 32
; RV64I-NEXT:    srli a1, a1, 32
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 32
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV32M-LABEL: umulh_i32:
; RV32M:       # %bb.0:
; RV32M-NEXT:    mulhu a0, a0, a1
; RV32M-NEXT:    ret
;
; RV64M-LABEL: umulh_i32:
; RV64M:       # %bb.0:
; RV64M-NEXT:    slli a1, a1, 32
; RV64M-NEXT:    slli a0, a0, 32
; RV64M-NEXT:    mulhu a0, a0, a1
; RV64M-NEXT:    srli a0, a0, 32
; RV64M-NEXT:    ret
  %r = call i32 @llvm.umulh(i32 %x, i32 %y)
  ret i32 %r
}

define i64 @umulh_i64(i64 %x, i64 %y) nounwind {
; RV32I-LABEL: umulh_i64:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -32
; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv s0, a3
; RV32I-NEXT:    mv s1, a2
; RV32I-NEXT:    mv s2, a1
; RV32I-NEXT:    mv s3, a0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s4, a1
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s4, a0, s4
; RV32I-NEXT:    sltu a0, s4, a0
; RV32I-NEXT:    add s1, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s4, a0, s4
; RV32I-NEXT:    sltu a0, s4, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s3, s1, a0
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add a2, a0, s3
; RV32I-NEXT:    sltu a3, s3, s1
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add a1, a1, a3
; RV32I-NEXT:    add a1, a1, a0
; RV32I-NEXT:    mv a0, a2
; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 32
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_i64:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv a2, a1
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv a0, a1
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV32M-LABEL: umulh_i64:
; RV32M:       # %bb.0:
; RV32M-NEXT:    mulhu a4, a0, a2
; RV32M-NEXT:    mul a5, a1, a2
; RV32M-NEXT:    mul a6, a0, a3
; RV32M-NEXT:    mulhu a2, a1, a2
; RV32M-NEXT:    mulhu a0, a0, a3
; RV32M-NEXT:    mul a7, a1, a3
; RV32M-NEXT:    add a4, a5, a4
; RV32M-NEXT:    mulhu a1, a1, a3
; RV32M-NEXT:    add a3, a6, a4
; RV32M-NEXT:    sltu a4, a4, a5
; RV32M-NEXT:    sltu a3, a3, a6
; RV32M-NEXT:    add a2, a2, a4
; RV32M-NEXT:    add a0, a0, a3
; RV32M-NEXT:    add a3, a2, a0
; RV32M-NEXT:    add a0, a7, a3
; RV32M-NEXT:    sltu a2, a3, a2
; RV32M-NEXT:    sltu a3, a0, a7
; RV32M-NEXT:    add a1, a1, a2
; RV32M-NEXT:    add a1, a1, a3
; RV32M-NEXT:    ret
;
; RV64M-LABEL: umulh_i64:
; RV64M:       # %bb.0:
; RV64M-NEXT:    mulhu a0, a0, a1
; RV64M-NEXT:    ret
  %r = call i64 @llvm.umulh(i64 %x, i64 %y)
  ret i64 %r
}

define i96 @umulh_i96(i96 %x, i96 %y) nounwind {
; RV32I-LABEL: umulh_i96:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -80
; RV32I-NEXT:    sw ra, 76(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 72(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 68(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 64(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 56(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 52(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s10, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s11, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s6, 0(a2)
; RV32I-NEXT:    lw s5, 4(a2)
; RV32I-NEXT:    lw a2, 8(a2)
; RV32I-NEXT:    sw a2, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s4, 0(a1)
; RV32I-NEXT:    lw s3, 4(a1)
; RV32I-NEXT:    lw s2, 8(a1)
; RV32I-NEXT:    sw a0, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s4
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s7, a0
; RV32I-NEXT:    mv s8, a1
; RV32I-NEXT:    li a0, 0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s0, s7, a1
; RV32I-NEXT:    sltu a0, s0, s7
; RV32I-NEXT:    add s8, s8, a0
; RV32I-NEXT:    li a0, 0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s0, a0, s0
; RV32I-NEXT:    sltu a0, s0, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s0, s8, a0
; RV32I-NEXT:    sltu s1, s0, s8
; RV32I-NEXT:    mv a0, s4
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s0, a0, s0
; RV32I-NEXT:    add a1, a1, s1
; RV32I-NEXT:    sltu a0, s0, a0
; RV32I-NEXT:    add s1, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s8, a0
; RV32I-NEXT:    mv s9, a1
; RV32I-NEXT:    sw s2, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s7, a0
; RV32I-NEXT:    mv s6, a1
; RV32I-NEXT:    add s9, a0, s9
; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s2, s8, s0
; RV32I-NEXT:    add a2, a0, s9
; RV32I-NEXT:    add s1, a2, s1
; RV32I-NEXT:    sltu s10, s2, s8
; RV32I-NEXT:    add s3, s1, s10
; RV32I-NEXT:    beq s3, a2, .LBB3_2
; RV32I-NEXT:  # %bb.1:
; RV32I-NEXT:    sltu s10, s3, a2
; RV32I-NEXT:  .LBB3_2:
; RV32I-NEXT:    sltu s0, s9, s7
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s0, s6, s0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s11, s0, a0
; RV32I-NEXT:    lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s1, a0
; RV32I-NEXT:    sw a1, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s6, a0, s11
; RV32I-NEXT:    add s10, s6, s10
; RV32I-NEXT:    mv a0, s4
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s8, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s5, a0
; RV32I-NEXT:    mv s7, a1
; RV32I-NEXT:    li a0, 0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s9, a0
; RV32I-NEXT:    add s8, s5, a1
; RV32I-NEXT:    li a0, 0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s2, s9, s2
; RV32I-NEXT:    add a2, a0, s8
; RV32I-NEXT:    add a3, a2, s3
; RV32I-NEXT:    sltu s2, s2, s9
; RV32I-NEXT:    add a3, a3, s2
; RV32I-NEXT:    beq a3, a2, .LBB3_4
; RV32I-NEXT:  # %bb.3:
; RV32I-NEXT:    sltu s2, a3, a2
; RV32I-NEXT:  .LBB3_4:
; RV32I-NEXT:    sltu a3, s8, s5
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s7, s7, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s3, s7, a0
; RV32I-NEXT:    mv a0, s4
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s6, s1
; RV32I-NEXT:    add a3, a0, s3
; RV32I-NEXT:    sltu a4, s11, s0
; RV32I-NEXT:    add s2, a3, s2
; RV32I-NEXT:    lw a5, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add a4, a5, a4
; RV32I-NEXT:    add s9, s10, s2
; RV32I-NEXT:    sltu a5, s10, s6
; RV32I-NEXT:    add a2, a2, a5
; RV32I-NEXT:    sltu a5, s3, s7
; RV32I-NEXT:    add a1, a1, a5
; RV32I-NEXT:    sltu a0, a3, a0
; RV32I-NEXT:    sltu a3, s2, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s1, a4, a2
; RV32I-NEXT:    add a0, a0, a3
; RV32I-NEXT:    sltu s0, s9, s10
; RV32I-NEXT:    add a0, s1, a0
; RV32I-NEXT:    add s2, a0, s0
; RV32I-NEXT:    lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s7
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s3, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s5, a0
; RV32I-NEXT:    mv s6, a1
; RV32I-NEXT:    lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s4, a0
; RV32I-NEXT:    mv s3, a1
; RV32I-NEXT:    add s8, a0, s6
; RV32I-NEXT:    mv a0, s7
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s6, s5, s9
; RV32I-NEXT:    add a2, a0, s8
; RV32I-NEXT:    sltu s7, s6, s5
; RV32I-NEXT:    add s5, a2, s7
; RV32I-NEXT:    add s5, s5, s2
; RV32I-NEXT:    beq s5, a2, .LBB3_6
; RV32I-NEXT:  # %bb.5:
; RV32I-NEXT:    sltu s7, s5, a2
; RV32I-NEXT:  .LBB3_6:
; RV32I-NEXT:    beq s2, s1, .LBB3_8
; RV32I-NEXT:  # %bb.7:
; RV32I-NEXT:    sltu s0, s2, s1
; RV32I-NEXT:  .LBB3_8:
; RV32I-NEXT:    sltu a3, s8, s4
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add a3, s3, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s1, a3, a0
; RV32I-NEXT:    lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    lw a1, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sw s6, 0(a1)
; RV32I-NEXT:    add a0, a0, s0
; RV32I-NEXT:    add a0, a0, s7
; RV32I-NEXT:    add a0, a0, s1
; RV32I-NEXT:    sw s5, 4(a1)
; RV32I-NEXT:    sw a0, 8(a1)
; RV32I-NEXT:    lw ra, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s10, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s11, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 80
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_i96:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -64
; RV64I-NEXT:    sd ra, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s6, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a2
; RV64I-NEXT:    mv s1, a1
; RV64I-NEXT:    mv s2, a0
; RV64I-NEXT:    slli a3, a3, 32
; RV64I-NEXT:    srli s3, a3, 32
; RV64I-NEXT:    slli s4, a0, 32
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a0, s4
; RV64I-NEXT:    mv a2, s3
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv s5, a0
; RV64I-NEXT:    mv s6, a1
; RV64I-NEXT:    mv a0, s4
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv s4, a1
; RV64I-NEXT:    srli a0, s2, 32
; RV64I-NEXT:    slli s1, s1, 32
; RV64I-NEXT:    or s1, s1, a0
; RV64I-NEXT:    mv a0, s1
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s4, a0, s4
; RV64I-NEXT:    add a2, s5, s4
; RV64I-NEXT:    sltu a2, a2, s5
; RV64I-NEXT:    sltu a0, s4, a0
; RV64I-NEXT:    add a2, s6, a2
; RV64I-NEXT:    add s0, a1, a0
; RV64I-NEXT:    add s2, s0, a2
; RV64I-NEXT:    mv a0, s1
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s3
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add a2, a0, s2
; RV64I-NEXT:    sltu a3, s2, s0
; RV64I-NEXT:    sltu a0, a2, a0
; RV64I-NEXT:    add a1, a1, a3
; RV64I-NEXT:    add a1, a1, a0
; RV64I-NEXT:    mv a0, a2
; RV64I-NEXT:    ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s6, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 64
; RV64I-NEXT:    ret
;
; RV32M-LABEL: umulh_i96:
; RV32M:       # %bb.0:
; RV32M-NEXT:    lw a7, 0(a2)
; RV32M-NEXT:    lw a4, 4(a2)
; RV32M-NEXT:    lw a5, 0(a1)
; RV32M-NEXT:    lw a3, 4(a1)
; RV32M-NEXT:    lw a1, 8(a1)
; RV32M-NEXT:    lw a2, 8(a2)
; RV32M-NEXT:    mulhu a6, a5, a7
; RV32M-NEXT:    mul t0, a5, a4
; RV32M-NEXT:    mulhu t3, a3, a7
; RV32M-NEXT:    mul t1, a1, a7
; RV32M-NEXT:    mulhu t4, a5, a4
; RV32M-NEXT:    mul t2, a3, a4
; RV32M-NEXT:    mul t5, a3, a7
; RV32M-NEXT:    add a6, t0, a6
; RV32M-NEXT:    sltu t0, a6, t0
; RV32M-NEXT:    add t3, t1, t3
; RV32M-NEXT:    add t0, t4, t0
; RV32M-NEXT:    add t4, t2, t3
; RV32M-NEXT:    add a6, t5, a6
; RV32M-NEXT:    add t0, t4, t0
; RV32M-NEXT:    sltu a6, a6, t5
; RV32M-NEXT:    add t0, t0, a6
; RV32M-NEXT:    beq t0, t4, .LBB3_2
; RV32M-NEXT:  # %bb.1:
; RV32M-NEXT:    sltu a6, t0, t4
; RV32M-NEXT:  .LBB3_2:
; RV32M-NEXT:    mulhu a7, a1, a7
; RV32M-NEXT:    mulhu t5, a3, a4
; RV32M-NEXT:    mul t6, a5, a2
; RV32M-NEXT:    sltu t1, t3, t1
; RV32M-NEXT:    mul t3, a1, a4
; RV32M-NEXT:    sltu t2, t4, t2
; RV32M-NEXT:    add a7, a7, t1
; RV32M-NEXT:    seqz t1, t0
; RV32M-NEXT:    mulhu a5, a5, a2
; RV32M-NEXT:    mulhu a4, a1, a4
; RV32M-NEXT:    addi t1, t1, -1
; RV32M-NEXT:    add t2, t5, t2
; RV32M-NEXT:    add t0, t6, t0
; RV32M-NEXT:    add t2, a7, t2
; RV32M-NEXT:    sltu t0, t0, t6
; RV32M-NEXT:    add t4, t3, t2
; RV32M-NEXT:    and t0, t1, t0
; RV32M-NEXT:    sltu a7, t2, a7
; RV32M-NEXT:    add a6, t4, a6
; RV32M-NEXT:    add t0, a5, t0
; RV32M-NEXT:    mul t2, a3, a2
; RV32M-NEXT:    mulhu t5, a3, a2
; RV32M-NEXT:    mul a3, a1, a2
; RV32M-NEXT:    add t6, a6, t0
; RV32M-NEXT:    add a7, a4, a7
; RV32M-NEXT:    sltu a4, t6, a6
; RV32M-NEXT:    sltu t1, t4, t3
; RV32M-NEXT:    add a7, a7, t1
; RV32M-NEXT:    sltu t1, a6, t4
; RV32M-NEXT:    add t1, a7, t1
; RV32M-NEXT:    sltu a5, t0, a5
; RV32M-NEXT:    add a6, t1, a5
; RV32M-NEXT:    add a5, t2, t6
; RV32M-NEXT:    add a7, a3, t5
; RV32M-NEXT:    sltu t0, a5, t2
; RV32M-NEXT:    add t2, a6, a4
; RV32M-NEXT:    add a6, a7, t0
; RV32M-NEXT:    add a6, a6, t2
; RV32M-NEXT:    beq a6, a7, .LBB3_4
; RV32M-NEXT:  # %bb.3:
; RV32M-NEXT:    sltu t0, a6, a7
; RV32M-NEXT:  .LBB3_4:
; RV32M-NEXT:    beq t2, t1, .LBB3_6
; RV32M-NEXT:  # %bb.5:
; RV32M-NEXT:    sltu a4, t2, t1
; RV32M-NEXT:  .LBB3_6:
; RV32M-NEXT:    mulhu a1, a1, a2
; RV32M-NEXT:    sltu a2, a7, a3
; RV32M-NEXT:    add a2, a2, a4
; RV32M-NEXT:    add a2, a2, t0
; RV32M-NEXT:    add a1, a1, a2
; RV32M-NEXT:    sw a5, 0(a0)
; RV32M-NEXT:    sw a6, 4(a0)
; RV32M-NEXT:    sw a1, 8(a0)
; RV32M-NEXT:    ret
;
; RV64M-LABEL: umulh_i96:
; RV64M:       # %bb.0:
; RV64M-NEXT:    slli a3, a3, 32
; RV64M-NEXT:    srli a3, a3, 32
; RV64M-NEXT:    srli a4, a0, 32
; RV64M-NEXT:    slli a1, a1, 32
; RV64M-NEXT:    slli a0, a0, 32
; RV64M-NEXT:    or a1, a1, a4
; RV64M-NEXT:    mulhu a4, a0, a2
; RV64M-NEXT:    mul a5, a1, a2
; RV64M-NEXT:    mul a6, a0, a3
; RV64M-NEXT:    mulhu a2, a1, a2
; RV64M-NEXT:    mulhu a0, a0, a3
; RV64M-NEXT:    mul a7, a1, a3
; RV64M-NEXT:    add a4, a5, a4
; RV64M-NEXT:    mulhu a1, a1, a3
; RV64M-NEXT:    add a3, a6, a4
; RV64M-NEXT:    sltu a4, a4, a5
; RV64M-NEXT:    sltu a3, a3, a6
; RV64M-NEXT:    add a2, a2, a4
; RV64M-NEXT:    add a0, a0, a3
; RV64M-NEXT:    add a3, a2, a0
; RV64M-NEXT:    add a0, a7, a3
; RV64M-NEXT:    sltu a2, a3, a2
; RV64M-NEXT:    sltu a3, a0, a7
; RV64M-NEXT:    add a1, a1, a2
; RV64M-NEXT:    add a1, a1, a3
; RV64M-NEXT:    ret
  %r = call i96 @llvm.umulh(i96 %x, i96 %y)
  ret i96 %r
}

define i128 @umulh_i128(i128 %x, i128 %y) nounwind {
; RV32I-LABEL: umulh_i128:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -96
; RV32I-NEXT:    sw ra, 92(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 88(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 84(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 80(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 76(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 72(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 68(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 64(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 56(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 52(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s10, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s11, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s8, 0(a2)
; RV32I-NEXT:    lw s7, 4(a2)
; RV32I-NEXT:    lw a3, 8(a2)
; RV32I-NEXT:    sw a3, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a2, 12(a2)
; RV32I-NEXT:    sw a2, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s6, 0(a1)
; RV32I-NEXT:    lw s4, 4(a1)
; RV32I-NEXT:    lw s3, 8(a1)
; RV32I-NEXT:    lw s2, 12(a1)
; RV32I-NEXT:    sw a0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s9, a1
; RV32I-NEXT:    mv a0, s4
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s9, a0, s9
; RV32I-NEXT:    sltu a0, s9, a0
; RV32I-NEXT:    add s0, a1, a0
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s7
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s9, a0, s9
; RV32I-NEXT:    sltu a0, s9, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s1, s0, a0
; RV32I-NEXT:    sw s4, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s4
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s7
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s4, a0, s1
; RV32I-NEXT:    sltu a2, s1, s0
; RV32I-NEXT:    sltu a0, s4, a0
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    add s0, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s10, a0
; RV32I-NEXT:    mv s11, a1
; RV32I-NEXT:    sw s2, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s9, a0
; RV32I-NEXT:    mv s8, a1
; RV32I-NEXT:    add s11, a0, s11
; RV32I-NEXT:    sw s3, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s7
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s4, s10, s4
; RV32I-NEXT:    add a2, a0, s11
; RV32I-NEXT:    add s5, a2, s0
; RV32I-NEXT:    sltu s0, s4, s10
; RV32I-NEXT:    add s5, s5, s0
; RV32I-NEXT:    beq s5, a2, .LBB4_2
; RV32I-NEXT:  # %bb.1:
; RV32I-NEXT:    sltu s0, s5, a2
; RV32I-NEXT:  .LBB4_2:
; RV32I-NEXT:    sltu a3, s11, s9
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add a3, s8, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    sw a3, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s2, a3, a0
; RV32I-NEXT:    lw a0, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s7
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s8, a0
; RV32I-NEXT:    sw a1, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s1, a0, s2
; RV32I-NEXT:    add s7, s1, s0
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s3, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s11, a0
; RV32I-NEXT:    mv s0, a1
; RV32I-NEXT:    lw a0, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s3, a0
; RV32I-NEXT:    mv s9, a1
; RV32I-NEXT:    add s10, a0, s0
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw a2, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s4, s11, s4
; RV32I-NEXT:    add a2, a0, s10
; RV32I-NEXT:    add a3, a2, s5
; RV32I-NEXT:    sltu s0, s4, s11
; RV32I-NEXT:    add a3, a3, s0
; RV32I-NEXT:    beq a3, a2, .LBB4_4
; RV32I-NEXT:  # %bb.3:
; RV32I-NEXT:    sltu s0, a3, a2
; RV32I-NEXT:  .LBB4_4:
; RV32I-NEXT:    sltu a3, s10, s3
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s9, s9, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s3, s9, a0
; RV32I-NEXT:    lw a0, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s10, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s10
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s7, s1
; RV32I-NEXT:    add a3, a0, s3
; RV32I-NEXT:    sltu a4, s1, s8
; RV32I-NEXT:    add s0, a3, s0
; RV32I-NEXT:    lw a5, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sltu a5, s2, a5
; RV32I-NEXT:    add s2, s7, s0
; RV32I-NEXT:    lw a6, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add a5, a6, a5
; RV32I-NEXT:    add a2, a4, a2
; RV32I-NEXT:    sltu a4, s3, s9
; RV32I-NEXT:    sltu a0, a3, a0
; RV32I-NEXT:    add a1, a1, a4
; RV32I-NEXT:    sltu a3, s0, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s3, a5, a2
; RV32I-NEXT:    add a0, a0, a3
; RV32I-NEXT:    sltu s1, s2, s7
; RV32I-NEXT:    add a0, s3, a0
; RV32I-NEXT:    add s7, a0, s1
; RV32I-NEXT:    lw s9, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s4, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv s6, a1
; RV32I-NEXT:    lw a0, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s5, a0
; RV32I-NEXT:    mv s4, a1
; RV32I-NEXT:    add s8, a0, s6
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s10
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s2, s0, s2
; RV32I-NEXT:    add a2, a0, s8
; RV32I-NEXT:    sltu s6, s2, s0
; RV32I-NEXT:    add s0, a2, s6
; RV32I-NEXT:    add s0, s0, s7
; RV32I-NEXT:    beq s0, a2, .LBB4_6
; RV32I-NEXT:  # %bb.5:
; RV32I-NEXT:    sltu s6, s0, a2
; RV32I-NEXT:  .LBB4_6:
; RV32I-NEXT:    beq s7, s3, .LBB4_8
; RV32I-NEXT:  # %bb.7:
; RV32I-NEXT:    sltu s1, s7, s3
; RV32I-NEXT:  .LBB4_8:
; RV32I-NEXT:    sltu a3, s8, s5
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s4, s4, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s3, s4, a0
; RV32I-NEXT:    lw a0, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw a2, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s3, s4
; RV32I-NEXT:    add s3, a0, s3
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    add s1, s3, s1
; RV32I-NEXT:    sltu a0, s3, a0
; RV32I-NEXT:    add s6, s1, s6
; RV32I-NEXT:    sltu a2, s1, s3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    sltu a1, s6, s1
; RV32I-NEXT:    add a0, a0, a2
; RV32I-NEXT:    add a0, a0, a1
; RV32I-NEXT:    lw a1, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sw s2, 0(a1)
; RV32I-NEXT:    sw s0, 4(a1)
; RV32I-NEXT:    sw s6, 8(a1)
; RV32I-NEXT:    sw a0, 12(a1)
; RV32I-NEXT:    lw ra, 92(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 88(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 84(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 80(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s10, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s11, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 96
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_i128:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -48
; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a3
; RV64I-NEXT:    mv s1, a2
; RV64I-NEXT:    mv s2, a1
; RV64I-NEXT:    mv s3, a0
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv s4, a1
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s1
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s4, a0, s4
; RV64I-NEXT:    sltu a0, s4, a0
; RV64I-NEXT:    add s1, a1, a0
; RV64I-NEXT:    mv a0, s3
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s4, a0, s4
; RV64I-NEXT:    sltu a0, s4, a0
; RV64I-NEXT:    add a0, a1, a0
; RV64I-NEXT:    add s3, s1, a0
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add a2, a0, s3
; RV64I-NEXT:    sltu a3, s3, s1
; RV64I-NEXT:    sltu a0, a2, a0
; RV64I-NEXT:    add a1, a1, a3
; RV64I-NEXT:    add a1, a1, a0
; RV64I-NEXT:    mv a0, a2
; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 48
; RV64I-NEXT:    ret
;
; RV32M-LABEL: umulh_i128:
; RV32M:       # %bb.0:
; RV32M-NEXT:    addi sp, sp, -32
; RV32M-NEXT:    sw s0, 28(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s1, 24(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s2, 20(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s3, 16(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s4, 12(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s5, 8(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s6, 4(sp) # 4-byte Folded Spill
; RV32M-NEXT:    lw a7, 0(a1)
; RV32M-NEXT:    lw a5, 4(a1)
; RV32M-NEXT:    lw t0, 0(a2)
; RV32M-NEXT:    lw a6, 4(a2)
; RV32M-NEXT:    lw a4, 8(a2)
; RV32M-NEXT:    lw a2, 12(a2)
; RV32M-NEXT:    lw a3, 8(a1)
; RV32M-NEXT:    lw a1, 12(a1)
; RV32M-NEXT:    mulhu t3, a7, t0
; RV32M-NEXT:    mul t4, a5, t0
; RV32M-NEXT:    mul t5, a7, a6
; RV32M-NEXT:    mulhu t6, a5, t0
; RV32M-NEXT:    mulhu s0, a7, a6
; RV32M-NEXT:    mul s1, a5, a6
; RV32M-NEXT:    mulhu s2, a5, a6
; RV32M-NEXT:    mulhu s3, a3, t0
; RV32M-NEXT:    mul t1, a1, t0
; RV32M-NEXT:    mul t2, a3, a6
; RV32M-NEXT:    add t3, t4, t3
; RV32M-NEXT:    sltu t4, t3, t4
; RV32M-NEXT:    add t3, t5, t3
; RV32M-NEXT:    sltu t3, t3, t5
; RV32M-NEXT:    mul t5, a3, t0
; RV32M-NEXT:    add t4, t6, t4
; RV32M-NEXT:    add t3, s0, t3
; RV32M-NEXT:    add t3, t4, t3
; RV32M-NEXT:    sltu t4, t3, t4
; RV32M-NEXT:    add t3, s1, t3
; RV32M-NEXT:    add t4, s2, t4
; RV32M-NEXT:    sltu t6, t3, s1
; RV32M-NEXT:    add s0, t1, s3
; RV32M-NEXT:    add t6, t4, t6
; RV32M-NEXT:    add s1, t2, s0
; RV32M-NEXT:    add t4, t5, t3
; RV32M-NEXT:    add t6, s1, t6
; RV32M-NEXT:    sltu t3, t4, t5
; RV32M-NEXT:    add t6, t6, t3
; RV32M-NEXT:    beq t6, s1, .LBB4_2
; RV32M-NEXT:  # %bb.1:
; RV32M-NEXT:    sltu t3, t6, s1
; RV32M-NEXT:  .LBB4_2:
; RV32M-NEXT:    mulhu t0, a1, t0
; RV32M-NEXT:    mulhu s4, a3, a6
; RV32M-NEXT:    mulhu s5, a7, a4
; RV32M-NEXT:    mul s2, a5, a4
; RV32M-NEXT:    mul s3, a7, a2
; RV32M-NEXT:    mul s6, a7, a4
; RV32M-NEXT:    mul t5, a1, a6
; RV32M-NEXT:    sltu t1, s0, t1
; RV32M-NEXT:    sltu s0, s1, t2
; RV32M-NEXT:    add t2, t0, t1
; RV32M-NEXT:    add s0, s4, s0
; RV32M-NEXT:    add s1, s2, s5
; RV32M-NEXT:    add s0, t2, s0
; RV32M-NEXT:    add s4, s3, s1
; RV32M-NEXT:    add t4, s6, t4
; RV32M-NEXT:    add t6, s4, t6
; RV32M-NEXT:    sltu t1, t4, s6
; RV32M-NEXT:    add t4, t5, s0
; RV32M-NEXT:    add t6, t6, t1
; RV32M-NEXT:    add t0, t4, t3
; RV32M-NEXT:    beq t6, s4, .LBB4_4
; RV32M-NEXT:  # %bb.3:
; RV32M-NEXT:    sltu t1, t6, s4
; RV32M-NEXT:  .LBB4_4:
; RV32M-NEXT:    mulhu t3, a5, a4
; RV32M-NEXT:    mulhu a7, a7, a2
; RV32M-NEXT:    sltu t6, s1, s2
; RV32M-NEXT:    sltu s1, s4, s3
; RV32M-NEXT:    mul s2, a5, a2
; RV32M-NEXT:    sltu s3, t0, t4
; RV32M-NEXT:    sltu t4, t4, t5
; RV32M-NEXT:    sltu t2, s0, t2
; RV32M-NEXT:    mulhu t5, a1, a6
; RV32M-NEXT:    mulhu a6, a5, a2
; RV32M-NEXT:    mulhu s0, a3, a4
; RV32M-NEXT:    add t3, t3, t6
; RV32M-NEXT:    add a7, a7, s1
; RV32M-NEXT:    add t2, t2, t4
; RV32M-NEXT:    add a7, t3, a7
; RV32M-NEXT:    add t2, t2, s3
; RV32M-NEXT:    add t4, s2, a7
; RV32M-NEXT:    sltu a7, a7, t3
; RV32M-NEXT:    mul a5, a1, a4
; RV32M-NEXT:    add t3, t4, t1
; RV32M-NEXT:    mul t6, a3, a4
; RV32M-NEXT:    add s1, t0, t3
; RV32M-NEXT:    mul t1, a3, a2
; RV32M-NEXT:    sltu s2, t4, s2
; RV32M-NEXT:    add a6, a6, a7
; RV32M-NEXT:    sltu a7, t3, t4
; RV32M-NEXT:    add a6, a6, s2
; RV32M-NEXT:    add t5, t5, t2
; RV32M-NEXT:    add a6, a6, a7
; RV32M-NEXT:    sltu t0, s1, t0
; RV32M-NEXT:    add a7, t5, a6
; RV32M-NEXT:    add t3, a5, s0
; RV32M-NEXT:    add a6, t6, s1
; RV32M-NEXT:    add t4, t1, t3
; RV32M-NEXT:    sltu t2, a6, t6
; RV32M-NEXT:    add t6, a7, t0
; RV32M-NEXT:    add a7, t4, t2
; RV32M-NEXT:    add a7, a7, t6
; RV32M-NEXT:    beq a7, t4, .LBB4_6
; RV32M-NEXT:  # %bb.5:
; RV32M-NEXT:    sltu t2, a7, t4
; RV32M-NEXT:  .LBB4_6:
; RV32M-NEXT:    beq t6, t5, .LBB4_8
; RV32M-NEXT:  # %bb.7:
; RV32M-NEXT:    sltu t0, t6, t5
; RV32M-NEXT:  .LBB4_8:
; RV32M-NEXT:    mulhu a4, a1, a4
; RV32M-NEXT:    mulhu a3, a3, a2
; RV32M-NEXT:    mul t5, a1, a2
; RV32M-NEXT:    mulhu a1, a1, a2
; RV32M-NEXT:    sltu a2, t3, a5
; RV32M-NEXT:    sltu a5, t4, t1
; RV32M-NEXT:    add a2, a4, a2
; RV32M-NEXT:    add a3, a3, a5
; RV32M-NEXT:    add a3, a2, a3
; RV32M-NEXT:    add a4, t5, a3
; RV32M-NEXT:    sltu a2, a3, a2
; RV32M-NEXT:    add t0, a4, t0
; RV32M-NEXT:    sltu a3, a4, t5
; RV32M-NEXT:    add a1, a1, a2
; RV32M-NEXT:    add t2, t0, t2
; RV32M-NEXT:    sltu a2, t0, a4
; RV32M-NEXT:    add a1, a1, a3
; RV32M-NEXT:    sltu a3, t2, t0
; RV32M-NEXT:    add a1, a1, a2
; RV32M-NEXT:    add a1, a1, a3
; RV32M-NEXT:    sw a6, 0(a0)
; RV32M-NEXT:    sw a7, 4(a0)
; RV32M-NEXT:    sw t2, 8(a0)
; RV32M-NEXT:    sw a1, 12(a0)
; RV32M-NEXT:    lw s0, 28(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s1, 24(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s2, 20(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s3, 16(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s4, 12(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s5, 8(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s6, 4(sp) # 4-byte Folded Reload
; RV32M-NEXT:    addi sp, sp, 32
; RV32M-NEXT:    ret
;
; RV64M-LABEL: umulh_i128:
; RV64M:       # %bb.0:
; RV64M-NEXT:    mulhu a4, a0, a2
; RV64M-NEXT:    mul a5, a1, a2
; RV64M-NEXT:    mul a6, a0, a3
; RV64M-NEXT:    mulhu a2, a1, a2
; RV64M-NEXT:    mulhu a0, a0, a3
; RV64M-NEXT:    mul a7, a1, a3
; RV64M-NEXT:    add a4, a5, a4
; RV64M-NEXT:    mulhu a1, a1, a3
; RV64M-NEXT:    add a3, a6, a4
; RV64M-NEXT:    sltu a4, a4, a5
; RV64M-NEXT:    sltu a3, a3, a6
; RV64M-NEXT:    add a2, a2, a4
; RV64M-NEXT:    add a0, a0, a3
; RV64M-NEXT:    add a3, a2, a0
; RV64M-NEXT:    add a0, a7, a3
; RV64M-NEXT:    sltu a2, a3, a2
; RV64M-NEXT:    sltu a3, a0, a7
; RV64M-NEXT:    add a1, a1, a2
; RV64M-NEXT:    add a1, a1, a3
; RV64M-NEXT:    ret
  %r = call i128 @llvm.umulh(i128 %x, i128 %y)
  ret i128 %r
}

define <8 x i8> @umulh_v8i8(<8 x i8> %x, <8 x i8> %y) nounwind {
; RV32I-LABEL: umulh_v8i8:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -80
; RV32I-NEXT:    sw ra, 76(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 72(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 68(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 64(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 56(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 52(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s10, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s11, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu s6, 16(a1)
; RV32I-NEXT:    lbu s5, 20(a1)
; RV32I-NEXT:    lbu a3, 24(a1)
; RV32I-NEXT:    sw a3, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 28(a1)
; RV32I-NEXT:    sw a3, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu s7, 16(a2)
; RV32I-NEXT:    lbu s8, 20(a2)
; RV32I-NEXT:    lbu a3, 24(a2)
; RV32I-NEXT:    sw a3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 28(a2)
; RV32I-NEXT:    sw a3, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 0(a1)
; RV32I-NEXT:    lbu s9, 4(a1)
; RV32I-NEXT:    lbu s10, 8(a1)
; RV32I-NEXT:    lbu s11, 12(a1)
; RV32I-NEXT:    lbu a1, 0(a2)
; RV32I-NEXT:    lbu s1, 4(a2)
; RV32I-NEXT:    lbu s2, 8(a2)
; RV32I-NEXT:    lbu s3, 12(a2)
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s4, a0, 8
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    mv a1, s1
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s1, a0, 8
; RV32I-NEXT:    mv a0, s10
; RV32I-NEXT:    mv a1, s2
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s2, a0, 8
; RV32I-NEXT:    mv a0, s11
; RV32I-NEXT:    mv a1, s3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s3, a0, 8
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    mv a1, s7
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s6, a0, 8
; RV32I-NEXT:    mv a0, s5
; RV32I-NEXT:    mv a1, s8
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s5, a0, 8
; RV32I-NEXT:    lw a0, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s7, a0, 8
; RV32I-NEXT:    lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    sb s6, 4(s0)
; RV32I-NEXT:    srli a0, a0, 8
; RV32I-NEXT:    sb s5, 5(s0)
; RV32I-NEXT:    sb s7, 6(s0)
; RV32I-NEXT:    sb a0, 7(s0)
; RV32I-NEXT:    sb s4, 0(s0)
; RV32I-NEXT:    sb s1, 1(s0)
; RV32I-NEXT:    sb s2, 2(s0)
; RV32I-NEXT:    sb s3, 3(s0)
; RV32I-NEXT:    lw ra, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s10, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s11, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 80
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v8i8:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -144
; RV64I-NEXT:    sd ra, 136(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 128(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 120(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 112(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 104(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 96(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 88(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s6, 80(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s7, 72(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s8, 64(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s9, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s10, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s11, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu s6, 32(a1)
; RV64I-NEXT:    lbu s5, 40(a1)
; RV64I-NEXT:    lbu a3, 48(a1)
; RV64I-NEXT:    sd a3, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 56(a1)
; RV64I-NEXT:    sd a3, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu s7, 32(a2)
; RV64I-NEXT:    lbu s8, 40(a2)
; RV64I-NEXT:    lbu a3, 48(a2)
; RV64I-NEXT:    sd a3, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 56(a2)
; RV64I-NEXT:    sd a3, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 0(a1)
; RV64I-NEXT:    lbu s9, 8(a1)
; RV64I-NEXT:    lbu s10, 16(a1)
; RV64I-NEXT:    lbu s11, 24(a1)
; RV64I-NEXT:    lbu a1, 0(a2)
; RV64I-NEXT:    lbu s1, 8(a2)
; RV64I-NEXT:    lbu s2, 16(a2)
; RV64I-NEXT:    lbu s3, 24(a2)
; RV64I-NEXT:    mv s0, a0
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s4, a0, 8
; RV64I-NEXT:    mv a0, s9
; RV64I-NEXT:    mv a1, s1
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s1, a0, 8
; RV64I-NEXT:    mv a0, s10
; RV64I-NEXT:    mv a1, s2
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s2, a0, 8
; RV64I-NEXT:    mv a0, s11
; RV64I-NEXT:    mv a1, s3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s3, a0, 8
; RV64I-NEXT:    mv a0, s6
; RV64I-NEXT:    mv a1, s7
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s6, a0, 8
; RV64I-NEXT:    mv a0, s5
; RV64I-NEXT:    mv a1, s8
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s5, a0, 8
; RV64I-NEXT:    ld a0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s7, a0, 8
; RV64I-NEXT:    ld a0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    sb s6, 4(s0)
; RV64I-NEXT:    srli a0, a0, 8
; RV64I-NEXT:    sb s5, 5(s0)
; RV64I-NEXT:    sb s7, 6(s0)
; RV64I-NEXT:    sb a0, 7(s0)
; RV64I-NEXT:    sb s4, 0(s0)
; RV64I-NEXT:    sb s1, 1(s0)
; RV64I-NEXT:    sb s2, 2(s0)
; RV64I-NEXT:    sb s3, 3(s0)
; RV64I-NEXT:    ld ra, 136(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 128(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 120(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 104(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 96(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s6, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s7, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s8, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s9, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s10, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s11, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 144
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v8i8:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    addi sp, sp, -16
; RV32IM-NEXT:    sw s0, 12(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s1, 8(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    lbu a3, 16(a2)
; RV32IM-NEXT:    lbu a4, 20(a2)
; RV32IM-NEXT:    lbu a5, 24(a2)
; RV32IM-NEXT:    lbu a6, 28(a2)
; RV32IM-NEXT:    lbu a7, 0(a2)
; RV32IM-NEXT:    lbu t0, 4(a2)
; RV32IM-NEXT:    lbu t1, 8(a2)
; RV32IM-NEXT:    lbu a2, 12(a2)
; RV32IM-NEXT:    lbu t2, 0(a1)
; RV32IM-NEXT:    lbu t3, 4(a1)
; RV32IM-NEXT:    lbu t4, 8(a1)
; RV32IM-NEXT:    lbu t5, 12(a1)
; RV32IM-NEXT:    lbu t6, 16(a1)
; RV32IM-NEXT:    lbu s0, 20(a1)
; RV32IM-NEXT:    lbu s1, 24(a1)
; RV32IM-NEXT:    lbu a1, 28(a1)
; RV32IM-NEXT:    mul a7, t2, a7
; RV32IM-NEXT:    mul t0, t3, t0
; RV32IM-NEXT:    mul t1, t4, t1
; RV32IM-NEXT:    mul a2, t5, a2
; RV32IM-NEXT:    mul a3, t6, a3
; RV32IM-NEXT:    mul a4, s0, a4
; RV32IM-NEXT:    mul a5, s1, a5
; RV32IM-NEXT:    mul a1, a1, a6
; RV32IM-NEXT:    srli a6, a7, 8
; RV32IM-NEXT:    srli a7, t0, 8
; RV32IM-NEXT:    srli t0, t1, 8
; RV32IM-NEXT:    srli a2, a2, 8
; RV32IM-NEXT:    srli a3, a3, 8
; RV32IM-NEXT:    srli a4, a4, 8
; RV32IM-NEXT:    srli a5, a5, 8
; RV32IM-NEXT:    srli a1, a1, 8
; RV32IM-NEXT:    sb a3, 4(a0)
; RV32IM-NEXT:    sb a4, 5(a0)
; RV32IM-NEXT:    sb a5, 6(a0)
; RV32IM-NEXT:    sb a1, 7(a0)
; RV32IM-NEXT:    sb a6, 0(a0)
; RV32IM-NEXT:    sb a7, 1(a0)
; RV32IM-NEXT:    sb t0, 2(a0)
; RV32IM-NEXT:    sb a2, 3(a0)
; RV32IM-NEXT:    lw s0, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s1, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    addi sp, sp, 16
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v8i8:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    addi sp, sp, -16
; RV64IM-NEXT:    sd s0, 8(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s1, 0(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    lbu a3, 32(a2)
; RV64IM-NEXT:    lbu a4, 40(a2)
; RV64IM-NEXT:    lbu a5, 48(a2)
; RV64IM-NEXT:    lbu a6, 56(a2)
; RV64IM-NEXT:    lbu a7, 0(a2)
; RV64IM-NEXT:    lbu t0, 8(a2)
; RV64IM-NEXT:    lbu t1, 16(a2)
; RV64IM-NEXT:    lbu a2, 24(a2)
; RV64IM-NEXT:    lbu t2, 0(a1)
; RV64IM-NEXT:    lbu t3, 8(a1)
; RV64IM-NEXT:    lbu t4, 16(a1)
; RV64IM-NEXT:    lbu t5, 24(a1)
; RV64IM-NEXT:    lbu t6, 32(a1)
; RV64IM-NEXT:    lbu s0, 40(a1)
; RV64IM-NEXT:    lbu s1, 48(a1)
; RV64IM-NEXT:    lbu a1, 56(a1)
; RV64IM-NEXT:    mul a7, t2, a7
; RV64IM-NEXT:    mul t0, t3, t0
; RV64IM-NEXT:    mul t1, t4, t1
; RV64IM-NEXT:    mul a2, t5, a2
; RV64IM-NEXT:    mul a3, t6, a3
; RV64IM-NEXT:    mul a4, s0, a4
; RV64IM-NEXT:    mul a5, s1, a5
; RV64IM-NEXT:    mul a1, a1, a6
; RV64IM-NEXT:    srli a6, a7, 8
; RV64IM-NEXT:    srli a7, t0, 8
; RV64IM-NEXT:    srli t0, t1, 8
; RV64IM-NEXT:    srli a2, a2, 8
; RV64IM-NEXT:    srli a3, a3, 8
; RV64IM-NEXT:    srli a4, a4, 8
; RV64IM-NEXT:    srli a5, a5, 8
; RV64IM-NEXT:    srli a1, a1, 8
; RV64IM-NEXT:    sb a3, 4(a0)
; RV64IM-NEXT:    sb a4, 5(a0)
; RV64IM-NEXT:    sb a5, 6(a0)
; RV64IM-NEXT:    sb a1, 7(a0)
; RV64IM-NEXT:    sb a6, 0(a0)
; RV64IM-NEXT:    sb a7, 1(a0)
; RV64IM-NEXT:    sb t0, 2(a0)
; RV64IM-NEXT:    sb a2, 3(a0)
; RV64IM-NEXT:    ld s0, 8(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s1, 0(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    addi sp, sp, 16
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v8i8:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <8 x i8> @llvm.umulh(<8 x i8> %x, <8 x i8> %y)
  ret <8 x i8> %r
}

define <4 x i16> @umulh_v4i16(<4 x i16> %x, <4 x i16> %y) nounwind {
; RV32I-LABEL: umulh_v4i16:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -48
; RV32I-NEXT:    sw ra, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lhu a3, 0(a1)
; RV32I-NEXT:    lhu s0, 4(a1)
; RV32I-NEXT:    lhu s1, 8(a1)
; RV32I-NEXT:    lhu s2, 12(a1)
; RV32I-NEXT:    lhu a1, 0(a2)
; RV32I-NEXT:    lhu s3, 4(a2)
; RV32I-NEXT:    lhu s4, 8(a2)
; RV32I-NEXT:    lhu s5, 12(a2)
; RV32I-NEXT:    mv s6, a0
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s7, a0, 16
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    mv a1, s3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s0, a0, 16
; RV32I-NEXT:    mv a0, s1
; RV32I-NEXT:    mv a1, s4
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s1, a0, 16
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    mv a1, s5
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    sh s7, 0(s6)
; RV32I-NEXT:    srli a0, a0, 16
; RV32I-NEXT:    sh s0, 2(s6)
; RV32I-NEXT:    sh s1, 4(s6)
; RV32I-NEXT:    sh a0, 6(s6)
; RV32I-NEXT:    lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 48
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v4i16:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -80
; RV64I-NEXT:    sd ra, 72(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 64(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s6, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s7, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lhu a3, 0(a1)
; RV64I-NEXT:    lhu s0, 8(a1)
; RV64I-NEXT:    lhu s1, 16(a1)
; RV64I-NEXT:    lhu s2, 24(a1)
; RV64I-NEXT:    lhu a1, 0(a2)
; RV64I-NEXT:    lhu s3, 8(a2)
; RV64I-NEXT:    lhu s4, 16(a2)
; RV64I-NEXT:    lhu s5, 24(a2)
; RV64I-NEXT:    mv s6, a0
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s7, a0, 16
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    mv a1, s3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s0, a0, 16
; RV64I-NEXT:    mv a0, s1
; RV64I-NEXT:    mv a1, s4
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s1, a0, 16
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    mv a1, s5
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    sh s7, 0(s6)
; RV64I-NEXT:    srli a0, a0, 16
; RV64I-NEXT:    sh s0, 2(s6)
; RV64I-NEXT:    sh s1, 4(s6)
; RV64I-NEXT:    sh a0, 6(s6)
; RV64I-NEXT:    ld ra, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s6, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s7, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 80
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v4i16:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    lhu a3, 0(a2)
; RV32IM-NEXT:    lhu a4, 4(a2)
; RV32IM-NEXT:    lhu a5, 8(a2)
; RV32IM-NEXT:    lhu a2, 12(a2)
; RV32IM-NEXT:    lhu a6, 0(a1)
; RV32IM-NEXT:    lhu a7, 4(a1)
; RV32IM-NEXT:    lhu t0, 8(a1)
; RV32IM-NEXT:    lhu a1, 12(a1)
; RV32IM-NEXT:    mul a3, a6, a3
; RV32IM-NEXT:    mul a4, a7, a4
; RV32IM-NEXT:    mul a5, t0, a5
; RV32IM-NEXT:    mul a1, a1, a2
; RV32IM-NEXT:    srli a3, a3, 16
; RV32IM-NEXT:    srli a4, a4, 16
; RV32IM-NEXT:    srli a5, a5, 16
; RV32IM-NEXT:    srli a1, a1, 16
; RV32IM-NEXT:    sh a3, 0(a0)
; RV32IM-NEXT:    sh a4, 2(a0)
; RV32IM-NEXT:    sh a5, 4(a0)
; RV32IM-NEXT:    sh a1, 6(a0)
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v4i16:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    lhu a3, 0(a2)
; RV64IM-NEXT:    lhu a4, 8(a2)
; RV64IM-NEXT:    lhu a5, 16(a2)
; RV64IM-NEXT:    lhu a2, 24(a2)
; RV64IM-NEXT:    lhu a6, 0(a1)
; RV64IM-NEXT:    lhu a7, 8(a1)
; RV64IM-NEXT:    lhu t0, 16(a1)
; RV64IM-NEXT:    lhu a1, 24(a1)
; RV64IM-NEXT:    mul a3, a6, a3
; RV64IM-NEXT:    mul a4, a7, a4
; RV64IM-NEXT:    mul a5, t0, a5
; RV64IM-NEXT:    mul a1, a1, a2
; RV64IM-NEXT:    srli a3, a3, 16
; RV64IM-NEXT:    srli a4, a4, 16
; RV64IM-NEXT:    srli a5, a5, 16
; RV64IM-NEXT:    srli a1, a1, 16
; RV64IM-NEXT:    sh a3, 0(a0)
; RV64IM-NEXT:    sh a4, 2(a0)
; RV64IM-NEXT:    sh a5, 4(a0)
; RV64IM-NEXT:    sh a1, 6(a0)
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v4i16:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <4 x i16> @llvm.umulh(<4 x i16> %x, <4 x i16> %y)
  ret <4 x i16> %r
}

define <2 x i32> @umulh_v2i32(<2 x i32> %x, <2 x i32> %y) nounwind {
; RV32I-LABEL: umulh_v2i32:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 0(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv s0, a3
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s2, a1
; RV32I-NEXT:    mv a0, s1
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v2i32:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -32
; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT:    slli a1, a1, 32
; RV64I-NEXT:    slli a3, a3, 32
; RV64I-NEXT:    srli s0, a1, 32
; RV64I-NEXT:    srli s1, a3, 32
; RV64I-NEXT:    slli a0, a0, 32
; RV64I-NEXT:    slli a1, a2, 32
; RV64I-NEXT:    srli a0, a0, 32
; RV64I-NEXT:    srli a1, a1, 32
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s2, a0, 32
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    mv a1, s1
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    mv a1, a0
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    srli a1, a1, 32
; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 32
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v2i32:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    mulhu a0, a0, a2
; RV32IM-NEXT:    mulhu a1, a1, a3
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v2i32:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    slli a2, a2, 32
; RV64IM-NEXT:    slli a0, a0, 32
; RV64IM-NEXT:    slli a3, a3, 32
; RV64IM-NEXT:    slli a1, a1, 32
; RV64IM-NEXT:    mulhu a0, a0, a2
; RV64IM-NEXT:    mulhu a1, a1, a3
; RV64IM-NEXT:    srli a0, a0, 32
; RV64IM-NEXT:    srli a1, a1, 32
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v2i32:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <2 x i32> @llvm.umulh(<2 x i32> %x, <2 x i32> %y)
  ret <2 x i32> %r
}

define <1 x i64> @umulh_v1i64(<1 x i64> %x, <1 x i64> %y) nounwind {
; RV32I-LABEL: umulh_v1i64:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -32
; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv s0, a3
; RV32I-NEXT:    mv s1, a2
; RV32I-NEXT:    mv s2, a1
; RV32I-NEXT:    mv s3, a0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s4, a1
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s4, a0, s4
; RV32I-NEXT:    sltu a0, s4, a0
; RV32I-NEXT:    add s1, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s4, a0, s4
; RV32I-NEXT:    sltu a0, s4, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s3, s1, a0
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s0
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add a2, a0, s3
; RV32I-NEXT:    sltu a3, s3, s1
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add a1, a1, a3
; RV32I-NEXT:    add a1, a1, a0
; RV32I-NEXT:    mv a0, a2
; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 32
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v1i64:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv a2, a1
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv a0, a1
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v1i64:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    mulhu a4, a0, a2
; RV32IM-NEXT:    mul a5, a1, a2
; RV32IM-NEXT:    mul a6, a0, a3
; RV32IM-NEXT:    mulhu a2, a1, a2
; RV32IM-NEXT:    mulhu a0, a0, a3
; RV32IM-NEXT:    mul a7, a1, a3
; RV32IM-NEXT:    add a4, a5, a4
; RV32IM-NEXT:    mulhu a1, a1, a3
; RV32IM-NEXT:    add a3, a6, a4
; RV32IM-NEXT:    sltu a4, a4, a5
; RV32IM-NEXT:    sltu a3, a3, a6
; RV32IM-NEXT:    add a2, a2, a4
; RV32IM-NEXT:    add a0, a0, a3
; RV32IM-NEXT:    add a3, a2, a0
; RV32IM-NEXT:    add a0, a7, a3
; RV32IM-NEXT:    sltu a2, a3, a2
; RV32IM-NEXT:    sltu a3, a0, a7
; RV32IM-NEXT:    add a1, a1, a2
; RV32IM-NEXT:    add a1, a1, a3
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v1i64:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    mulhu a0, a0, a1
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v1i64:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 1, e64, m1, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <1 x i64> @llvm.umulh(<1 x i64> %x, <1 x i64> %y)
  ret <1 x i64> %r
}

define <16 x i8> @umulh_v16i8(<16 x i8> %x, <16 x i8> %y) nounwind {
; RV32I-LABEL: umulh_v16i8:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -144
; RV32I-NEXT:    sw ra, 140(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 136(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 132(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 128(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 124(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 120(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 116(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 112(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 108(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 104(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 100(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s10, 96(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s11, 92(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 48(a1)
; RV32I-NEXT:    sw a3, 64(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 52(a1)
; RV32I-NEXT:    sw a3, 72(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 56(a1)
; RV32I-NEXT:    sw a3, 80(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 60(a1)
; RV32I-NEXT:    sw a3, 88(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 48(a2)
; RV32I-NEXT:    sw a3, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 52(a2)
; RV32I-NEXT:    sw a3, 68(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 56(a2)
; RV32I-NEXT:    sw a3, 76(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 60(a2)
; RV32I-NEXT:    sw a3, 84(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 32(a1)
; RV32I-NEXT:    sw a3, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 36(a1)
; RV32I-NEXT:    sw a3, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 40(a1)
; RV32I-NEXT:    sw a3, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 44(a1)
; RV32I-NEXT:    sw a3, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 32(a2)
; RV32I-NEXT:    sw a3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 36(a2)
; RV32I-NEXT:    sw a3, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 40(a2)
; RV32I-NEXT:    sw a3, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 44(a2)
; RV32I-NEXT:    sw a3, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu s10, 16(a1)
; RV32I-NEXT:    lbu a3, 20(a1)
; RV32I-NEXT:    sw a3, 0(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 24(a1)
; RV32I-NEXT:    sw a3, 4(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 28(a1)
; RV32I-NEXT:    sw a3, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lbu a3, 0(a1)
; RV32I-NEXT:    lbu s11, 4(a1)
; RV32I-NEXT:    lbu s0, 8(a1)
; RV32I-NEXT:    lbu s1, 12(a1)
; RV32I-NEXT:    lbu s2, 16(a2)
; RV32I-NEXT:    lbu s3, 20(a2)
; RV32I-NEXT:    lbu s4, 24(a2)
; RV32I-NEXT:    lbu s9, 28(a2)
; RV32I-NEXT:    lbu a1, 0(a2)
; RV32I-NEXT:    lbu s6, 4(a2)
; RV32I-NEXT:    lbu s7, 8(a2)
; RV32I-NEXT:    lbu s8, 12(a2)
; RV32I-NEXT:    mv s5, a0
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli a0, a0, 8
; RV32I-NEXT:    sw a0, 56(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s11
; RV32I-NEXT:    mv a1, s6
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli a0, a0, 8
; RV32I-NEXT:    sw a0, 52(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    mv a1, s7
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli a0, a0, 8
; RV32I-NEXT:    sw a0, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s1
; RV32I-NEXT:    mv a1, s8
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli a0, a0, 8
; RV32I-NEXT:    sw a0, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s10
; RV32I-NEXT:    mv a1, s2
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s2, a0, 8
; RV32I-NEXT:    lw a0, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a1, s3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s3, a0, 8
; RV32I-NEXT:    lw a0, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a1, s4
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s4, a0, 8
; RV32I-NEXT:    lw a0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a1, s9
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s7, a0, 8
; RV32I-NEXT:    lw a0, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s8, a0, 8
; RV32I-NEXT:    lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s9, a0, 8
; RV32I-NEXT:    lw a0, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s10, a0, 8
; RV32I-NEXT:    lw a0, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s11, a0, 8
; RV32I-NEXT:    lw a0, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s6, a0, 8
; RV32I-NEXT:    lw a0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s0, a0, 8
; RV32I-NEXT:    lw a0, 80(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s1, a0, 8
; RV32I-NEXT:    lw a0, 88(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 84(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    sb s6, 12(s5)
; RV32I-NEXT:    srli a0, a0, 8
; RV32I-NEXT:    sb s0, 13(s5)
; RV32I-NEXT:    sb s1, 14(s5)
; RV32I-NEXT:    sb a0, 15(s5)
; RV32I-NEXT:    sb s8, 8(s5)
; RV32I-NEXT:    sb s9, 9(s5)
; RV32I-NEXT:    sb s10, 10(s5)
; RV32I-NEXT:    sb s11, 11(s5)
; RV32I-NEXT:    sb s2, 4(s5)
; RV32I-NEXT:    sb s3, 5(s5)
; RV32I-NEXT:    sb s4, 6(s5)
; RV32I-NEXT:    sb s7, 7(s5)
; RV32I-NEXT:    lw a0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sb a0, 0(s5)
; RV32I-NEXT:    lw a0, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sb a0, 1(s5)
; RV32I-NEXT:    lw a0, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sb a0, 2(s5)
; RV32I-NEXT:    lw a0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sb a0, 3(s5)
; RV32I-NEXT:    lw ra, 140(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 136(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 132(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 128(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 124(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 120(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 116(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 112(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 108(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 104(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 100(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s10, 96(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s11, 92(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 144
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v16i8:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -288
; RV64I-NEXT:    sd ra, 280(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 272(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 264(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 256(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 248(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 240(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 232(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s6, 224(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s7, 216(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s8, 208(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s9, 200(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s10, 192(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s11, 184(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 96(a1)
; RV64I-NEXT:    sd a3, 128(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 104(a1)
; RV64I-NEXT:    sd a3, 144(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 112(a1)
; RV64I-NEXT:    sd a3, 160(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 120(a1)
; RV64I-NEXT:    sd a3, 176(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 96(a2)
; RV64I-NEXT:    sd a3, 120(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 104(a2)
; RV64I-NEXT:    sd a3, 136(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 112(a2)
; RV64I-NEXT:    sd a3, 152(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 120(a2)
; RV64I-NEXT:    sd a3, 168(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 64(a1)
; RV64I-NEXT:    sd a3, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 72(a1)
; RV64I-NEXT:    sd a3, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 80(a1)
; RV64I-NEXT:    sd a3, 64(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 88(a1)
; RV64I-NEXT:    sd a3, 88(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 64(a2)
; RV64I-NEXT:    sd a3, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 72(a2)
; RV64I-NEXT:    sd a3, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 80(a2)
; RV64I-NEXT:    sd a3, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 88(a2)
; RV64I-NEXT:    sd a3, 72(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu s10, 32(a1)
; RV64I-NEXT:    lbu a3, 40(a1)
; RV64I-NEXT:    sd a3, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 48(a1)
; RV64I-NEXT:    sd a3, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 56(a1)
; RV64I-NEXT:    sd a3, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lbu a3, 0(a1)
; RV64I-NEXT:    lbu s11, 8(a1)
; RV64I-NEXT:    lbu s0, 16(a1)
; RV64I-NEXT:    lbu s1, 24(a1)
; RV64I-NEXT:    lbu s2, 32(a2)
; RV64I-NEXT:    lbu s3, 40(a2)
; RV64I-NEXT:    lbu s4, 48(a2)
; RV64I-NEXT:    lbu s9, 56(a2)
; RV64I-NEXT:    lbu a1, 0(a2)
; RV64I-NEXT:    lbu s6, 8(a2)
; RV64I-NEXT:    lbu s7, 16(a2)
; RV64I-NEXT:    lbu s8, 24(a2)
; RV64I-NEXT:    mv s5, a0
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 8
; RV64I-NEXT:    sd a0, 112(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv a0, s11
; RV64I-NEXT:    mv a1, s6
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 8
; RV64I-NEXT:    sd a0, 104(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    mv a1, s7
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 8
; RV64I-NEXT:    sd a0, 96(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv a0, s1
; RV64I-NEXT:    mv a1, s8
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 8
; RV64I-NEXT:    sd a0, 80(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv a0, s10
; RV64I-NEXT:    mv a1, s2
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s2, a0, 8
; RV64I-NEXT:    ld a0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT:    mv a1, s3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s3, a0, 8
; RV64I-NEXT:    ld a0, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    mv a1, s4
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s4, a0, 8
; RV64I-NEXT:    ld a0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    mv a1, s9
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s7, a0, 8
; RV64I-NEXT:    ld a0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s8, a0, 8
; RV64I-NEXT:    ld a0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s9, a0, 8
; RV64I-NEXT:    ld a0, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s10, a0, 8
; RV64I-NEXT:    ld a0, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s11, a0, 8
; RV64I-NEXT:    ld a0, 128(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 120(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s6, a0, 8
; RV64I-NEXT:    ld a0, 144(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 136(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s0, a0, 8
; RV64I-NEXT:    ld a0, 160(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 152(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s1, a0, 8
; RV64I-NEXT:    ld a0, 176(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 168(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    sb s6, 12(s5)
; RV64I-NEXT:    srli a0, a0, 8
; RV64I-NEXT:    sb s0, 13(s5)
; RV64I-NEXT:    sb s1, 14(s5)
; RV64I-NEXT:    sb a0, 15(s5)
; RV64I-NEXT:    sb s8, 8(s5)
; RV64I-NEXT:    sb s9, 9(s5)
; RV64I-NEXT:    sb s10, 10(s5)
; RV64I-NEXT:    sb s11, 11(s5)
; RV64I-NEXT:    sb s2, 4(s5)
; RV64I-NEXT:    sb s3, 5(s5)
; RV64I-NEXT:    sb s4, 6(s5)
; RV64I-NEXT:    sb s7, 7(s5)
; RV64I-NEXT:    ld a0, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT:    sb a0, 0(s5)
; RV64I-NEXT:    ld a0, 104(sp) # 8-byte Folded Reload
; RV64I-NEXT:    sb a0, 1(s5)
; RV64I-NEXT:    ld a0, 96(sp) # 8-byte Folded Reload
; RV64I-NEXT:    sb a0, 2(s5)
; RV64I-NEXT:    ld a0, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT:    sb a0, 3(s5)
; RV64I-NEXT:    ld ra, 280(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 272(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 264(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 256(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 248(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 240(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 232(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s6, 224(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s7, 216(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s8, 208(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s9, 200(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s10, 192(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s11, 184(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 288
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v16i8:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    addi sp, sp, -48
; RV32IM-NEXT:    sw s0, 44(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s1, 40(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s2, 36(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s3, 32(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s4, 28(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s5, 24(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s6, 20(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s7, 16(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s8, 12(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s9, 8(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s10, 4(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s11, 0(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    lbu t3, 48(a2)
; RV32IM-NEXT:    lbu t2, 52(a2)
; RV32IM-NEXT:    lbu t1, 56(a2)
; RV32IM-NEXT:    lbu a4, 60(a2)
; RV32IM-NEXT:    lbu t6, 48(a1)
; RV32IM-NEXT:    lbu t5, 52(a1)
; RV32IM-NEXT:    lbu t4, 56(a1)
; RV32IM-NEXT:    lbu t0, 60(a1)
; RV32IM-NEXT:    lbu s2, 16(a2)
; RV32IM-NEXT:    lbu s3, 20(a2)
; RV32IM-NEXT:    lbu s1, 24(a2)
; RV32IM-NEXT:    lbu s0, 28(a2)
; RV32IM-NEXT:    lbu a3, 0(a2)
; RV32IM-NEXT:    lbu a5, 0(a1)
; RV32IM-NEXT:    lbu a6, 4(a1)
; RV32IM-NEXT:    lbu a7, 4(a2)
; RV32IM-NEXT:    lbu s4, 8(a2)
; RV32IM-NEXT:    lbu s5, 12(a2)
; RV32IM-NEXT:    lbu s6, 8(a1)
; RV32IM-NEXT:    lbu s7, 12(a1)
; RV32IM-NEXT:    lbu s8, 16(a1)
; RV32IM-NEXT:    mul a3, a5, a3
; RV32IM-NEXT:    mul a5, a6, a7
; RV32IM-NEXT:    lbu s9, 20(a1)
; RV32IM-NEXT:    lbu s10, 24(a1)
; RV32IM-NEXT:    lbu s11, 28(a1)
; RV32IM-NEXT:    mul a6, s6, s4
; RV32IM-NEXT:    mul a7, s7, s5
; RV32IM-NEXT:    mul s2, s8, s2
; RV32IM-NEXT:    lbu s4, 32(a2)
; RV32IM-NEXT:    lbu s5, 36(a2)
; RV32IM-NEXT:    lbu s6, 40(a2)
; RV32IM-NEXT:    lbu a2, 44(a2)
; RV32IM-NEXT:    mul t3, t6, t3
; RV32IM-NEXT:    mul t2, t5, t2
; RV32IM-NEXT:    mul t1, t4, t1
; RV32IM-NEXT:    lbu t4, 32(a1)
; RV32IM-NEXT:    lbu t5, 36(a1)
; RV32IM-NEXT:    lbu t6, 40(a1)
; RV32IM-NEXT:    lbu a1, 44(a1)
; RV32IM-NEXT:    mul s3, s9, s3
; RV32IM-NEXT:    mul a4, t0, a4
; RV32IM-NEXT:    mul t0, s10, s1
; RV32IM-NEXT:    mul s0, s11, s0
; RV32IM-NEXT:    mul t4, t4, s4
; RV32IM-NEXT:    mul t5, t5, s5
; RV32IM-NEXT:    mul t6, t6, s6
; RV32IM-NEXT:    mul a1, a1, a2
; RV32IM-NEXT:    srli a2, t3, 8
; RV32IM-NEXT:    srli t2, t2, 8
; RV32IM-NEXT:    sb a2, 12(a0)
; RV32IM-NEXT:    srli a2, t1, 8
; RV32IM-NEXT:    sb t2, 13(a0)
; RV32IM-NEXT:    srli a4, a4, 8
; RV32IM-NEXT:    sb a2, 14(a0)
; RV32IM-NEXT:    sb a4, 15(a0)
; RV32IM-NEXT:    srli a2, t4, 8
; RV32IM-NEXT:    srli a4, t5, 8
; RV32IM-NEXT:    sb a2, 8(a0)
; RV32IM-NEXT:    srli a2, t6, 8
; RV32IM-NEXT:    sb a4, 9(a0)
; RV32IM-NEXT:    srli a1, a1, 8
; RV32IM-NEXT:    sb a2, 10(a0)
; RV32IM-NEXT:    sb a1, 11(a0)
; RV32IM-NEXT:    srli a1, s2, 8
; RV32IM-NEXT:    srli a2, s3, 8
; RV32IM-NEXT:    sb a1, 4(a0)
; RV32IM-NEXT:    srli a1, t0, 8
; RV32IM-NEXT:    sb a2, 5(a0)
; RV32IM-NEXT:    srli s0, s0, 8
; RV32IM-NEXT:    sb a1, 6(a0)
; RV32IM-NEXT:    sb s0, 7(a0)
; RV32IM-NEXT:    srli a3, a3, 8
; RV32IM-NEXT:    srli a5, a5, 8
; RV32IM-NEXT:    sb a3, 0(a0)
; RV32IM-NEXT:    srli a1, a6, 8
; RV32IM-NEXT:    sb a5, 1(a0)
; RV32IM-NEXT:    srli a2, a7, 8
; RV32IM-NEXT:    sb a1, 2(a0)
; RV32IM-NEXT:    sb a2, 3(a0)
; RV32IM-NEXT:    lw s0, 44(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s1, 40(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s2, 36(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s3, 32(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s4, 28(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s5, 24(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s6, 20(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s7, 16(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s8, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s9, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s10, 4(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s11, 0(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    addi sp, sp, 48
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v16i8:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    addi sp, sp, -96
; RV64IM-NEXT:    sd s0, 88(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s1, 80(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s2, 72(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s3, 64(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s4, 56(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s5, 48(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s6, 40(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s7, 32(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s8, 24(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s9, 16(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s10, 8(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s11, 0(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    lbu t3, 96(a2)
; RV64IM-NEXT:    lbu t2, 104(a2)
; RV64IM-NEXT:    lbu t1, 112(a2)
; RV64IM-NEXT:    lbu a4, 120(a2)
; RV64IM-NEXT:    lbu t6, 96(a1)
; RV64IM-NEXT:    lbu t5, 104(a1)
; RV64IM-NEXT:    lbu t4, 112(a1)
; RV64IM-NEXT:    lbu t0, 120(a1)
; RV64IM-NEXT:    lbu s2, 32(a2)
; RV64IM-NEXT:    lbu s3, 40(a2)
; RV64IM-NEXT:    lbu s1, 48(a2)
; RV64IM-NEXT:    lbu s0, 56(a2)
; RV64IM-NEXT:    lbu a3, 0(a2)
; RV64IM-NEXT:    lbu a5, 0(a1)
; RV64IM-NEXT:    lbu a6, 8(a1)
; RV64IM-NEXT:    lbu a7, 8(a2)
; RV64IM-NEXT:    lbu s4, 16(a2)
; RV64IM-NEXT:    lbu s5, 24(a2)
; RV64IM-NEXT:    lbu s6, 16(a1)
; RV64IM-NEXT:    lbu s7, 24(a1)
; RV64IM-NEXT:    lbu s8, 32(a1)
; RV64IM-NEXT:    mul a3, a5, a3
; RV64IM-NEXT:    mul a5, a6, a7
; RV64IM-NEXT:    lbu s9, 40(a1)
; RV64IM-NEXT:    lbu s10, 48(a1)
; RV64IM-NEXT:    lbu s11, 56(a1)
; RV64IM-NEXT:    mul a6, s6, s4
; RV64IM-NEXT:    mul a7, s7, s5
; RV64IM-NEXT:    mul s2, s8, s2
; RV64IM-NEXT:    lbu s4, 64(a2)
; RV64IM-NEXT:    lbu s5, 72(a2)
; RV64IM-NEXT:    lbu s6, 80(a2)
; RV64IM-NEXT:    lbu a2, 88(a2)
; RV64IM-NEXT:    mul t3, t6, t3
; RV64IM-NEXT:    mul t2, t5, t2
; RV64IM-NEXT:    mul t1, t4, t1
; RV64IM-NEXT:    lbu t4, 64(a1)
; RV64IM-NEXT:    lbu t5, 72(a1)
; RV64IM-NEXT:    lbu t6, 80(a1)
; RV64IM-NEXT:    lbu a1, 88(a1)
; RV64IM-NEXT:    mul s3, s9, s3
; RV64IM-NEXT:    mul a4, t0, a4
; RV64IM-NEXT:    mul t0, s10, s1
; RV64IM-NEXT:    mul s0, s11, s0
; RV64IM-NEXT:    mul t4, t4, s4
; RV64IM-NEXT:    mul t5, t5, s5
; RV64IM-NEXT:    mul t6, t6, s6
; RV64IM-NEXT:    mul a1, a1, a2
; RV64IM-NEXT:    srli a2, t3, 8
; RV64IM-NEXT:    srli t2, t2, 8
; RV64IM-NEXT:    sb a2, 12(a0)
; RV64IM-NEXT:    srli a2, t1, 8
; RV64IM-NEXT:    sb t2, 13(a0)
; RV64IM-NEXT:    srli a4, a4, 8
; RV64IM-NEXT:    sb a2, 14(a0)
; RV64IM-NEXT:    sb a4, 15(a0)
; RV64IM-NEXT:    srli a2, t4, 8
; RV64IM-NEXT:    srli a4, t5, 8
; RV64IM-NEXT:    sb a2, 8(a0)
; RV64IM-NEXT:    srli a2, t6, 8
; RV64IM-NEXT:    sb a4, 9(a0)
; RV64IM-NEXT:    srli a1, a1, 8
; RV64IM-NEXT:    sb a2, 10(a0)
; RV64IM-NEXT:    sb a1, 11(a0)
; RV64IM-NEXT:    srli a1, s2, 8
; RV64IM-NEXT:    srli a2, s3, 8
; RV64IM-NEXT:    sb a1, 4(a0)
; RV64IM-NEXT:    srli a1, t0, 8
; RV64IM-NEXT:    sb a2, 5(a0)
; RV64IM-NEXT:    srli s0, s0, 8
; RV64IM-NEXT:    sb a1, 6(a0)
; RV64IM-NEXT:    sb s0, 7(a0)
; RV64IM-NEXT:    srli a3, a3, 8
; RV64IM-NEXT:    srli a5, a5, 8
; RV64IM-NEXT:    sb a3, 0(a0)
; RV64IM-NEXT:    srli a1, a6, 8
; RV64IM-NEXT:    sb a5, 1(a0)
; RV64IM-NEXT:    srli a2, a7, 8
; RV64IM-NEXT:    sb a1, 2(a0)
; RV64IM-NEXT:    sb a2, 3(a0)
; RV64IM-NEXT:    ld s0, 88(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s1, 80(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s2, 72(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s3, 64(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s4, 56(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s5, 48(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s6, 40(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s7, 32(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s8, 24(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s9, 16(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s10, 8(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s11, 0(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    addi sp, sp, 96
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v16i8:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <16 x i8> @llvm.umulh(<16 x i8> %x, <16 x i8> %y)
  ret <16 x i8> %r
}

define <8 x i16> @umulh_v8i16(<8 x i16> %x, <8 x i16> %y) nounwind {
; RV32I-LABEL: umulh_v8i16:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -80
; RV32I-NEXT:    sw ra, 76(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 72(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 68(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 64(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 56(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 52(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s10, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s11, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lhu s6, 16(a1)
; RV32I-NEXT:    lhu s5, 20(a1)
; RV32I-NEXT:    lhu a3, 24(a1)
; RV32I-NEXT:    sw a3, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lhu a3, 28(a1)
; RV32I-NEXT:    sw a3, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lhu s7, 16(a2)
; RV32I-NEXT:    lhu s8, 20(a2)
; RV32I-NEXT:    lhu a3, 24(a2)
; RV32I-NEXT:    sw a3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lhu a3, 28(a2)
; RV32I-NEXT:    sw a3, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lhu a3, 0(a1)
; RV32I-NEXT:    lhu s9, 4(a1)
; RV32I-NEXT:    lhu s10, 8(a1)
; RV32I-NEXT:    lhu s11, 12(a1)
; RV32I-NEXT:    lhu a1, 0(a2)
; RV32I-NEXT:    lhu s1, 4(a2)
; RV32I-NEXT:    lhu s2, 8(a2)
; RV32I-NEXT:    lhu s3, 12(a2)
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s4, a0, 16
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    mv a1, s1
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s1, a0, 16
; RV32I-NEXT:    mv a0, s10
; RV32I-NEXT:    mv a1, s2
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s2, a0, 16
; RV32I-NEXT:    mv a0, s11
; RV32I-NEXT:    mv a1, s3
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s3, a0, 16
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    mv a1, s7
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s6, a0, 16
; RV32I-NEXT:    mv a0, s5
; RV32I-NEXT:    mv a1, s8
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s5, a0, 16
; RV32I-NEXT:    lw a0, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    srli s7, a0, 16
; RV32I-NEXT:    lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    call __mulsi3
; RV32I-NEXT:    sh s6, 8(s0)
; RV32I-NEXT:    srli a0, a0, 16
; RV32I-NEXT:    sh s5, 10(s0)
; RV32I-NEXT:    sh s7, 12(s0)
; RV32I-NEXT:    sh a0, 14(s0)
; RV32I-NEXT:    sh s4, 0(s0)
; RV32I-NEXT:    sh s1, 2(s0)
; RV32I-NEXT:    sh s2, 4(s0)
; RV32I-NEXT:    sh s3, 6(s0)
; RV32I-NEXT:    lw ra, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s10, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s11, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 80
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v8i16:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -144
; RV64I-NEXT:    sd ra, 136(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 128(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 120(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 112(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 104(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 96(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 88(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s6, 80(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s7, 72(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s8, 64(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s9, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s10, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s11, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lhu s6, 32(a1)
; RV64I-NEXT:    lhu s5, 40(a1)
; RV64I-NEXT:    lhu a3, 48(a1)
; RV64I-NEXT:    sd a3, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lhu a3, 56(a1)
; RV64I-NEXT:    sd a3, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lhu s7, 32(a2)
; RV64I-NEXT:    lhu s8, 40(a2)
; RV64I-NEXT:    lhu a3, 48(a2)
; RV64I-NEXT:    sd a3, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lhu a3, 56(a2)
; RV64I-NEXT:    sd a3, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lhu a3, 0(a1)
; RV64I-NEXT:    lhu s9, 8(a1)
; RV64I-NEXT:    lhu s10, 16(a1)
; RV64I-NEXT:    lhu s11, 24(a1)
; RV64I-NEXT:    lhu a1, 0(a2)
; RV64I-NEXT:    lhu s1, 8(a2)
; RV64I-NEXT:    lhu s2, 16(a2)
; RV64I-NEXT:    lhu s3, 24(a2)
; RV64I-NEXT:    mv s0, a0
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s4, a0, 16
; RV64I-NEXT:    mv a0, s9
; RV64I-NEXT:    mv a1, s1
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s1, a0, 16
; RV64I-NEXT:    mv a0, s10
; RV64I-NEXT:    mv a1, s2
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s2, a0, 16
; RV64I-NEXT:    mv a0, s11
; RV64I-NEXT:    mv a1, s3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s3, a0, 16
; RV64I-NEXT:    mv a0, s6
; RV64I-NEXT:    mv a1, s7
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s6, a0, 16
; RV64I-NEXT:    mv a0, s5
; RV64I-NEXT:    mv a1, s8
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s5, a0, 16
; RV64I-NEXT:    ld a0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s7, a0, 16
; RV64I-NEXT:    ld a0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld a1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    sh s6, 8(s0)
; RV64I-NEXT:    srli a0, a0, 16
; RV64I-NEXT:    sh s5, 10(s0)
; RV64I-NEXT:    sh s7, 12(s0)
; RV64I-NEXT:    sh a0, 14(s0)
; RV64I-NEXT:    sh s4, 0(s0)
; RV64I-NEXT:    sh s1, 2(s0)
; RV64I-NEXT:    sh s2, 4(s0)
; RV64I-NEXT:    sh s3, 6(s0)
; RV64I-NEXT:    ld ra, 136(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 128(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 120(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 104(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 96(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s6, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s7, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s8, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s9, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s10, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s11, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 144
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v8i16:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    addi sp, sp, -16
; RV32IM-NEXT:    sw s0, 12(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    sw s1, 8(sp) # 4-byte Folded Spill
; RV32IM-NEXT:    lhu a3, 16(a2)
; RV32IM-NEXT:    lhu a4, 20(a2)
; RV32IM-NEXT:    lhu a5, 24(a2)
; RV32IM-NEXT:    lhu a6, 28(a2)
; RV32IM-NEXT:    lhu a7, 0(a2)
; RV32IM-NEXT:    lhu t0, 4(a2)
; RV32IM-NEXT:    lhu t1, 8(a2)
; RV32IM-NEXT:    lhu a2, 12(a2)
; RV32IM-NEXT:    lhu t2, 0(a1)
; RV32IM-NEXT:    lhu t3, 4(a1)
; RV32IM-NEXT:    lhu t4, 8(a1)
; RV32IM-NEXT:    lhu t5, 12(a1)
; RV32IM-NEXT:    lhu t6, 16(a1)
; RV32IM-NEXT:    lhu s0, 20(a1)
; RV32IM-NEXT:    lhu s1, 24(a1)
; RV32IM-NEXT:    lhu a1, 28(a1)
; RV32IM-NEXT:    mul a7, t2, a7
; RV32IM-NEXT:    mul t0, t3, t0
; RV32IM-NEXT:    mul t1, t4, t1
; RV32IM-NEXT:    mul a2, t5, a2
; RV32IM-NEXT:    mul a3, t6, a3
; RV32IM-NEXT:    mul a4, s0, a4
; RV32IM-NEXT:    mul a5, s1, a5
; RV32IM-NEXT:    mul a1, a1, a6
; RV32IM-NEXT:    srli a6, a7, 16
; RV32IM-NEXT:    srli a7, t0, 16
; RV32IM-NEXT:    srli t0, t1, 16
; RV32IM-NEXT:    srli a2, a2, 16
; RV32IM-NEXT:    srli a3, a3, 16
; RV32IM-NEXT:    srli a4, a4, 16
; RV32IM-NEXT:    srli a5, a5, 16
; RV32IM-NEXT:    srli a1, a1, 16
; RV32IM-NEXT:    sh a3, 8(a0)
; RV32IM-NEXT:    sh a4, 10(a0)
; RV32IM-NEXT:    sh a5, 12(a0)
; RV32IM-NEXT:    sh a1, 14(a0)
; RV32IM-NEXT:    sh a6, 0(a0)
; RV32IM-NEXT:    sh a7, 2(a0)
; RV32IM-NEXT:    sh t0, 4(a0)
; RV32IM-NEXT:    sh a2, 6(a0)
; RV32IM-NEXT:    lw s0, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    lw s1, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT:    addi sp, sp, 16
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v8i16:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    addi sp, sp, -16
; RV64IM-NEXT:    sd s0, 8(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    sd s1, 0(sp) # 8-byte Folded Spill
; RV64IM-NEXT:    lhu a3, 32(a2)
; RV64IM-NEXT:    lhu a4, 40(a2)
; RV64IM-NEXT:    lhu a5, 48(a2)
; RV64IM-NEXT:    lhu a6, 56(a2)
; RV64IM-NEXT:    lhu a7, 0(a2)
; RV64IM-NEXT:    lhu t0, 8(a2)
; RV64IM-NEXT:    lhu t1, 16(a2)
; RV64IM-NEXT:    lhu a2, 24(a2)
; RV64IM-NEXT:    lhu t2, 0(a1)
; RV64IM-NEXT:    lhu t3, 8(a1)
; RV64IM-NEXT:    lhu t4, 16(a1)
; RV64IM-NEXT:    lhu t5, 24(a1)
; RV64IM-NEXT:    lhu t6, 32(a1)
; RV64IM-NEXT:    lhu s0, 40(a1)
; RV64IM-NEXT:    lhu s1, 48(a1)
; RV64IM-NEXT:    lhu a1, 56(a1)
; RV64IM-NEXT:    mul a7, t2, a7
; RV64IM-NEXT:    mul t0, t3, t0
; RV64IM-NEXT:    mul t1, t4, t1
; RV64IM-NEXT:    mul a2, t5, a2
; RV64IM-NEXT:    mul a3, t6, a3
; RV64IM-NEXT:    mul a4, s0, a4
; RV64IM-NEXT:    mul a5, s1, a5
; RV64IM-NEXT:    mul a1, a1, a6
; RV64IM-NEXT:    srli a6, a7, 16
; RV64IM-NEXT:    srli a7, t0, 16
; RV64IM-NEXT:    srli t0, t1, 16
; RV64IM-NEXT:    srli a2, a2, 16
; RV64IM-NEXT:    srli a3, a3, 16
; RV64IM-NEXT:    srli a4, a4, 16
; RV64IM-NEXT:    srli a5, a5, 16
; RV64IM-NEXT:    srli a1, a1, 16
; RV64IM-NEXT:    sh a3, 8(a0)
; RV64IM-NEXT:    sh a4, 10(a0)
; RV64IM-NEXT:    sh a5, 12(a0)
; RV64IM-NEXT:    sh a1, 14(a0)
; RV64IM-NEXT:    sh a6, 0(a0)
; RV64IM-NEXT:    sh a7, 2(a0)
; RV64IM-NEXT:    sh t0, 4(a0)
; RV64IM-NEXT:    sh a2, 6(a0)
; RV64IM-NEXT:    ld s0, 8(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    ld s1, 0(sp) # 8-byte Folded Reload
; RV64IM-NEXT:    addi sp, sp, 16
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v8i16:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 8, e16, m1, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <8 x i16> @llvm.umulh(<8 x i16> %x, <8 x i16> %y)
  ret <8 x i16> %r
}

define <4 x i32> @umulh_v4i32(<4 x i32> %x, <4 x i32> %y) nounwind {
; RV32I-LABEL: umulh_v4i32:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -48
; RV32I-NEXT:    sw ra, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 0(a1)
; RV32I-NEXT:    lw s0, 4(a1)
; RV32I-NEXT:    lw s1, 8(a1)
; RV32I-NEXT:    lw s2, 12(a1)
; RV32I-NEXT:    lw a4, 0(a2)
; RV32I-NEXT:    lw s3, 4(a2)
; RV32I-NEXT:    lw s4, 8(a2)
; RV32I-NEXT:    lw s5, 12(a2)
; RV32I-NEXT:    mv s6, a0
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, a4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s7, a1
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a1
; RV32I-NEXT:    mv a0, s1
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sw s7, 0(s6)
; RV32I-NEXT:    sw s0, 4(s6)
; RV32I-NEXT:    sw s1, 8(s6)
; RV32I-NEXT:    sw a1, 12(s6)
; RV32I-NEXT:    lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 48
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v4i32:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -80
; RV64I-NEXT:    sd ra, 72(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 64(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s6, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s7, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lwu a3, 0(a1)
; RV64I-NEXT:    lwu s0, 8(a1)
; RV64I-NEXT:    lwu s1, 16(a1)
; RV64I-NEXT:    lwu s2, 24(a1)
; RV64I-NEXT:    lwu a1, 0(a2)
; RV64I-NEXT:    lwu s3, 8(a2)
; RV64I-NEXT:    lwu s4, 16(a2)
; RV64I-NEXT:    lwu s5, 24(a2)
; RV64I-NEXT:    mv s6, a0
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s7, a0, 32
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    mv a1, s3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s0, a0, 32
; RV64I-NEXT:    mv a0, s1
; RV64I-NEXT:    mv a1, s4
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s1, a0, 32
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    mv a1, s5
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    sw s7, 0(s6)
; RV64I-NEXT:    srli a0, a0, 32
; RV64I-NEXT:    sw s0, 4(s6)
; RV64I-NEXT:    sw s1, 8(s6)
; RV64I-NEXT:    sw a0, 12(s6)
; RV64I-NEXT:    ld ra, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s6, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s7, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 80
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v4i32:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    lw a3, 0(a2)
; RV32IM-NEXT:    lw a4, 4(a2)
; RV32IM-NEXT:    lw a5, 8(a2)
; RV32IM-NEXT:    lw a2, 12(a2)
; RV32IM-NEXT:    lw a6, 0(a1)
; RV32IM-NEXT:    lw a7, 4(a1)
; RV32IM-NEXT:    lw t0, 8(a1)
; RV32IM-NEXT:    lw a1, 12(a1)
; RV32IM-NEXT:    mulhu a3, a6, a3
; RV32IM-NEXT:    mulhu a4, a7, a4
; RV32IM-NEXT:    mulhu a5, t0, a5
; RV32IM-NEXT:    mulhu a1, a1, a2
; RV32IM-NEXT:    sw a3, 0(a0)
; RV32IM-NEXT:    sw a4, 4(a0)
; RV32IM-NEXT:    sw a5, 8(a0)
; RV32IM-NEXT:    sw a1, 12(a0)
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v4i32:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    lwu a3, 0(a2)
; RV64IM-NEXT:    lwu a4, 8(a2)
; RV64IM-NEXT:    lwu a5, 16(a2)
; RV64IM-NEXT:    lwu a2, 24(a2)
; RV64IM-NEXT:    lwu a6, 0(a1)
; RV64IM-NEXT:    lwu a7, 8(a1)
; RV64IM-NEXT:    lwu t0, 16(a1)
; RV64IM-NEXT:    lwu a1, 24(a1)
; RV64IM-NEXT:    mul a3, a6, a3
; RV64IM-NEXT:    mul a4, a7, a4
; RV64IM-NEXT:    mul a5, t0, a5
; RV64IM-NEXT:    mul a1, a1, a2
; RV64IM-NEXT:    srli a3, a3, 32
; RV64IM-NEXT:    srli a4, a4, 32
; RV64IM-NEXT:    srli a5, a5, 32
; RV64IM-NEXT:    srli a1, a1, 32
; RV64IM-NEXT:    sw a3, 0(a0)
; RV64IM-NEXT:    sw a4, 4(a0)
; RV64IM-NEXT:    sw a5, 8(a0)
; RV64IM-NEXT:    sw a1, 12(a0)
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v4i32:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <4 x i32> @llvm.umulh(<4 x i32> %x, <4 x i32> %y)
  ret <4 x i32> %r
}

define <2 x i64> @umulh_v2i64(<2 x i64> %x, <2 x i64> %y) nounwind {
; RV32I-LABEL: umulh_v2i64:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -48
; RV32I-NEXT:    sw ra, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 4(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s5, 0(a2)
; RV32I-NEXT:    lw s6, 4(a2)
; RV32I-NEXT:    lw s4, 8(a2)
; RV32I-NEXT:    lw s1, 12(a2)
; RV32I-NEXT:    lw s7, 0(a1)
; RV32I-NEXT:    lw s8, 4(a1)
; RV32I-NEXT:    lw s3, 8(a1)
; RV32I-NEXT:    lw s2, 12(a1)
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv a0, s7
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s9, a1
; RV32I-NEXT:    mv a0, s8
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s9, a0, s9
; RV32I-NEXT:    sltu a0, s9, a0
; RV32I-NEXT:    add s5, a1, a0
; RV32I-NEXT:    mv a0, s7
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s9, a0, s9
; RV32I-NEXT:    sltu a0, s9, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s7, s5, a0
; RV32I-NEXT:    mv a0, s8
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s6, a0, s7
; RV32I-NEXT:    sltu a2, s7, s5
; RV32I-NEXT:    sltu a0, s6, a0
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    add s7, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s5, a1
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s5, a0, s5
; RV32I-NEXT:    sltu a0, s5, a0
; RV32I-NEXT:    add s4, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s5, a0, s5
; RV32I-NEXT:    sltu a0, s5, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s3, s4, a0
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s3, s4
; RV32I-NEXT:    add s3, a0, s3
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    sltu a0, s3, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    sw s6, 0(s0)
; RV32I-NEXT:    sw s7, 4(s0)
; RV32I-NEXT:    sw s3, 8(s0)
; RV32I-NEXT:    sw a0, 12(s0)
; RV32I-NEXT:    lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 48
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v2i64:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -32
; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a3
; RV64I-NEXT:    mv s1, a1
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv s2, a1
; RV64I-NEXT:    mv a0, s1
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 32
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v2i64:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    lw a3, 0(a1)
; RV32IM-NEXT:    lw a4, 4(a1)
; RV32IM-NEXT:    lw a5, 0(a2)
; RV32IM-NEXT:    lw a6, 4(a2)
; RV32IM-NEXT:    lw a7, 8(a2)
; RV32IM-NEXT:    lw a2, 12(a2)
; RV32IM-NEXT:    lw t0, 8(a1)
; RV32IM-NEXT:    lw a1, 12(a1)
; RV32IM-NEXT:    mulhu t1, a3, a5
; RV32IM-NEXT:    mul t2, a4, a5
; RV32IM-NEXT:    mulhu a5, a4, a5
; RV32IM-NEXT:    mul t3, a3, a6
; RV32IM-NEXT:    mulhu a3, a3, a6
; RV32IM-NEXT:    mul t4, a4, a6
; RV32IM-NEXT:    mulhu a4, a4, a6
; RV32IM-NEXT:    add t1, t2, t1
; RV32IM-NEXT:    mulhu a6, t0, a7
; RV32IM-NEXT:    sltu t2, t1, t2
; RV32IM-NEXT:    mul t5, a1, a7
; RV32IM-NEXT:    add a5, a5, t2
; RV32IM-NEXT:    mul t2, t0, a2
; RV32IM-NEXT:    add t1, t3, t1
; RV32IM-NEXT:    sltu t1, t1, t3
; RV32IM-NEXT:    mulhu a7, a1, a7
; RV32IM-NEXT:    mulhu t0, t0, a2
; RV32IM-NEXT:    add a3, a3, t1
; RV32IM-NEXT:    mul t1, a1, a2
; RV32IM-NEXT:    add a3, a5, a3
; RV32IM-NEXT:    mulhu a1, a1, a2
; RV32IM-NEXT:    sltu a2, a3, a5
; RV32IM-NEXT:    add a3, t4, a3
; RV32IM-NEXT:    add a6, t5, a6
; RV32IM-NEXT:    sltu a5, a6, t5
; RV32IM-NEXT:    add a6, t2, a6
; RV32IM-NEXT:    sltu a6, a6, t2
; RV32IM-NEXT:    sltu t2, a3, t4
; RV32IM-NEXT:    add a5, a7, a5
; RV32IM-NEXT:    add a6, t0, a6
; RV32IM-NEXT:    add a2, a4, a2
; RV32IM-NEXT:    add a6, a5, a6
; RV32IM-NEXT:    add a4, t1, a6
; RV32IM-NEXT:    sltu a5, a6, a5
; RV32IM-NEXT:    sltu a6, a4, t1
; RV32IM-NEXT:    add a1, a1, a5
; RV32IM-NEXT:    add a2, a2, t2
; RV32IM-NEXT:    add a1, a1, a6
; RV32IM-NEXT:    sw a3, 0(a0)
; RV32IM-NEXT:    sw a2, 4(a0)
; RV32IM-NEXT:    sw a4, 8(a0)
; RV32IM-NEXT:    sw a1, 12(a0)
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v2i64:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    mulhu a0, a0, a2
; RV64IM-NEXT:    mulhu a1, a1, a3
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v2i64:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <2 x i64> @llvm.umulh(<2 x i64> %x, <2 x i64> %y)
  ret <2 x i64> %r
}

define <3 x i32> @umulh_v3i32(<3 x i32> %x, <3 x i32> %y) nounwind {
; RV32I-LABEL: umulh_v3i32:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -32
; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 4(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 0(a1)
; RV32I-NEXT:    lw s0, 4(a1)
; RV32I-NEXT:    lw s1, 8(a1)
; RV32I-NEXT:    lw a4, 0(a2)
; RV32I-NEXT:    lw s2, 4(a2)
; RV32I-NEXT:    lw s3, 8(a2)
; RV32I-NEXT:    mv s4, a0
; RV32I-NEXT:    mv a0, a3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, a4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s5, a1
; RV32I-NEXT:    mv a0, s0
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s2
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a1
; RV32I-NEXT:    mv a0, s1
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sw s5, 0(s4)
; RV32I-NEXT:    sw s0, 4(s4)
; RV32I-NEXT:    sw a1, 8(s4)
; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 32
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v3i32:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -64
; RV64I-NEXT:    sd ra, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    lwu a3, 0(a1)
; RV64I-NEXT:    lwu s0, 8(a1)
; RV64I-NEXT:    lwu s1, 16(a1)
; RV64I-NEXT:    lwu a1, 0(a2)
; RV64I-NEXT:    lwu s2, 8(a2)
; RV64I-NEXT:    lwu s3, 16(a2)
; RV64I-NEXT:    mv s4, a0
; RV64I-NEXT:    mv a0, a3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli s5, a0, 32
; RV64I-NEXT:    mv a0, s0
; RV64I-NEXT:    mv a1, s2
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 32
; RV64I-NEXT:    slli a0, a0, 32
; RV64I-NEXT:    or s0, s5, a0
; RV64I-NEXT:    mv a0, s1
; RV64I-NEXT:    mv a1, s3
; RV64I-NEXT:    call __muldi3
; RV64I-NEXT:    srli a0, a0, 32
; RV64I-NEXT:    sd s0, 0(s4)
; RV64I-NEXT:    sw a0, 8(s4)
; RV64I-NEXT:    ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 64
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v3i32:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    lw a3, 0(a2)
; RV32IM-NEXT:    lw a4, 4(a2)
; RV32IM-NEXT:    lw a2, 8(a2)
; RV32IM-NEXT:    lw a5, 0(a1)
; RV32IM-NEXT:    lw a6, 4(a1)
; RV32IM-NEXT:    lw a1, 8(a1)
; RV32IM-NEXT:    mulhu a3, a5, a3
; RV32IM-NEXT:    mulhu a4, a6, a4
; RV32IM-NEXT:    mulhu a1, a1, a2
; RV32IM-NEXT:    sw a3, 0(a0)
; RV32IM-NEXT:    sw a4, 4(a0)
; RV32IM-NEXT:    sw a1, 8(a0)
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v3i32:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    lwu a3, 8(a2)
; RV64IM-NEXT:    lwu a4, 8(a1)
; RV64IM-NEXT:    lwu a5, 0(a1)
; RV64IM-NEXT:    lwu a6, 0(a2)
; RV64IM-NEXT:    lwu a2, 16(a2)
; RV64IM-NEXT:    lwu a1, 16(a1)
; RV64IM-NEXT:    mul a3, a4, a3
; RV64IM-NEXT:    mul a4, a5, a6
; RV64IM-NEXT:    mul a1, a1, a2
; RV64IM-NEXT:    srli a3, a3, 32
; RV64IM-NEXT:    srli a4, a4, 32
; RV64IM-NEXT:    slli a3, a3, 32
; RV64IM-NEXT:    or a3, a4, a3
; RV64IM-NEXT:    srli a1, a1, 32
; RV64IM-NEXT:    sd a3, 0(a0)
; RV64IM-NEXT:    sw a1, 8(a0)
; RV64IM-NEXT:    ret
;
; CHECK-V-LABEL: umulh_v3i32:
; CHECK-V:       # %bb.0:
; CHECK-V-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-V-NEXT:    vmulhu.vv v8, v8, v9
; CHECK-V-NEXT:    ret
  %r = call <3 x i32> @llvm.umulh(<3 x i32> %x, <3 x i32> %y)
  ret <3 x i32> %r
}

define <2 x i48> @umulh_v2i48(<2 x i48> %x, <2 x i48> %y) nounwind {
; RV32I-LABEL: umulh_v2i48:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -64
; RV32I-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 52(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s10, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s11, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s8, 0(a1)
; RV32I-NEXT:    lw s11, 4(a1)
; RV32I-NEXT:    lw s10, 8(a1)
; RV32I-NEXT:    lw s9, 12(a1)
; RV32I-NEXT:    lw s3, 0(a2)
; RV32I-NEXT:    lhu s4, 4(a2)
; RV32I-NEXT:    lw s2, 8(a2)
; RV32I-NEXT:    lhu s1, 12(a2)
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    slli s5, s8, 16
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a0, s5
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s6, a0
; RV32I-NEXT:    mv s7, a1
; RV32I-NEXT:    mv a0, s5
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s5, a1
; RV32I-NEXT:    srli a0, s8, 16
; RV32I-NEXT:    slli s11, s11, 16
; RV32I-NEXT:    or s8, s11, a0
; RV32I-NEXT:    mv a0, s8
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s5, a0, s5
; RV32I-NEXT:    add a2, s6, s5
; RV32I-NEXT:    sltu a2, a2, s6
; RV32I-NEXT:    sltu a0, s5, a0
; RV32I-NEXT:    add a2, s7, a2
; RV32I-NEXT:    add s3, a1, a0
; RV32I-NEXT:    add s5, s3, a2
; RV32I-NEXT:    mv a0, s8
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s7, a0, s5
; RV32I-NEXT:    sltu a2, s5, s3
; RV32I-NEXT:    sltu s8, s7, a0
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    add s8, a1, s8
; RV32I-NEXT:    slli s3, s10, 16
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s4, a0
; RV32I-NEXT:    mv s5, a1
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s2
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s3, a1
; RV32I-NEXT:    srli a0, s10, 16
; RV32I-NEXT:    slli s9, s9, 16
; RV32I-NEXT:    or s6, s9, a0
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s2
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s3, a0, s3
; RV32I-NEXT:    add a2, s4, s3
; RV32I-NEXT:    sltu a2, a2, s4
; RV32I-NEXT:    sltu a0, s3, a0
; RV32I-NEXT:    add a2, s5, a2
; RV32I-NEXT:    add s2, a1, a0
; RV32I-NEXT:    add s3, s2, a2
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s3, s2
; RV32I-NEXT:    add s3, a0, s3
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    sltu a0, s3, a0
; RV32I-NEXT:    srli a2, s3, 16
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    sw s7, 0(s0)
; RV32I-NEXT:    sh s8, 4(s0)
; RV32I-NEXT:    sh s3, 6(s0)
; RV32I-NEXT:    sh a2, 8(s0)
; RV32I-NEXT:    sh a0, 10(s0)
; RV32I-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s10, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s11, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 64
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v2i48:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -32
; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT:    mv s0, a1
; RV64I-NEXT:    li a1, -1
; RV64I-NEXT:    srli a1, a1, 16
; RV64I-NEXT:    and s1, a3, a1
; RV64I-NEXT:    and a2, a2, a1
; RV64I-NEXT:    slli a0, a0, 16
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv s2, a1
; RV64I-NEXT:    slli a0, s0, 16
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s1
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 32
; RV64I-NEXT:    ret
;
; RV32IM-LABEL: umulh_v2i48:
; RV32IM:       # %bb.0:
; RV32IM-NEXT:    lw a3, 0(a1)
; RV32IM-NEXT:    lw a4, 4(a1)
; RV32IM-NEXT:    lw a5, 0(a2)
; RV32IM-NEXT:    lhu a6, 4(a2)
; RV32IM-NEXT:    lw a7, 8(a2)
; RV32IM-NEXT:    lhu a2, 12(a2)
; RV32IM-NEXT:    lw t0, 8(a1)
; RV32IM-NEXT:    lw a1, 12(a1)
; RV32IM-NEXT:    srli t1, a3, 16
; RV32IM-NEXT:    slli a4, a4, 16
; RV32IM-NEXT:    slli a3, a3, 16
; RV32IM-NEXT:    or a4, a4, t1
; RV32IM-NEXT:    mulhu t1, a3, a5
; RV32IM-NEXT:    mul t2, a4, a5
; RV32IM-NEXT:    mulhu a5, a4, a5
; RV32IM-NEXT:    mul t3, a3, a6
; RV32IM-NEXT:    slli t4, t0, 16
; RV32IM-NEXT:    srli t0, t0, 16
; RV32IM-NEXT:    slli a1, a1, 16
; RV32IM-NEXT:    mulhu a3, a3, a6
; RV32IM-NEXT:    mulhu t5, t4, a7
; RV32IM-NEXT:    add t1, t2, t1
; RV32IM-NEXT:    or a1, a1, t0
; RV32IM-NEXT:    sltu t0, t1, t2
; RV32IM-NEXT:    mul t2, a4, a6
; RV32IM-NEXT:    add a5, a5, t0
; RV32IM-NEXT:    mul t0, a1, a7
; RV32IM-NEXT:    add t1, t3, t1
; RV32IM-NEXT:    sltu t1, t1, t3
; RV32IM-NEXT:    mul t3, t4, a2
; RV32IM-NEXT:    add a3, a3, t1
; RV32IM-NEXT:    mulhu a7, a1, a7
; RV32IM-NEXT:    add a3, a5, a3
; RV32IM-NEXT:    mulhu t1, t4, a2
; RV32IM-NEXT:    mulhu a4, a4, a6
; RV32IM-NEXT:    mul a6, a1, a2
; RV32IM-NEXT:    mulhu a1, a1, a2
; RV32IM-NEXT:    sltu a2, a3, a5
; RV32IM-NEXT:    add a3, t2, a3
; RV32IM-NEXT:    add t5, t0, t5
; RV32IM-NEXT:    sltu a5, t5, t0
; RV32IM-NEXT:    add t5, t3, t5
; RV32IM-NEXT:    sltu t0, t5, t3
; RV32IM-NEXT:    sltu t2, a3, t2
; RV32IM-NEXT:    add a5, a7, a5
; RV32IM-NEXT:    add t0, t1, t0
; RV32IM-NEXT:    add a2, a4, a2
; RV32IM-NEXT:    add t0, a5, t0
; RV32IM-NEXT:    add a4, a6, t0
; RV32IM-NEXT:    sltu a5, t0, a5
; RV32IM-NEXT:    sltu a6, a4, a6
; RV32IM-NEXT:    add a1, a1, a5
; RV32IM-NEXT:    add a2, a2, t2
; RV32IM-NEXT:    add a1, a1, a6
; RV32IM-NEXT:    srli a5, a4, 16
; RV32IM-NEXT:    sw a3, 0(a0)
; RV32IM-NEXT:    sh a2, 4(a0)
; RV32IM-NEXT:    sh a4, 6(a0)
; RV32IM-NEXT:    sh a5, 8(a0)
; RV32IM-NEXT:    sh a1, 10(a0)
; RV32IM-NEXT:    ret
;
; RV64IM-LABEL: umulh_v2i48:
; RV64IM:       # %bb.0:
; RV64IM-NEXT:    li a4, -1
; RV64IM-NEXT:    srli a4, a4, 16
; RV64IM-NEXT:    and a3, a3, a4
; RV64IM-NEXT:    and a2, a2, a4
; RV64IM-NEXT:    slli a0, a0, 16
; RV64IM-NEXT:    slli a1, a1, 16
; RV64IM-NEXT:    mulhu a0, a0, a2
; RV64IM-NEXT:    mulhu a1, a1, a3
; RV64IM-NEXT:    ret
;
; RV32V-LABEL: umulh_v2i48:
; RV32V:       # %bb.0:
; RV32V-NEXT:    addi sp, sp, -16
; RV32V-NEXT:    li a0, -1
; RV32V-NEXT:    lui a1, 16
; RV32V-NEXT:    addi a1, a1, -1
; RV32V-NEXT:    sw a0, 8(sp)
; RV32V-NEXT:    sw a1, 12(sp)
; RV32V-NEXT:    addi a0, sp, 8
; RV32V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
; RV32V-NEXT:    vlse64.v v10, (a0), zero
; RV32V-NEXT:    vand.vv v9, v9, v10
; RV32V-NEXT:    vsll.vi v8, v8, 16
; RV32V-NEXT:    vmulhu.vv v8, v8, v9
; RV32V-NEXT:    addi sp, sp, 16
; RV32V-NEXT:    ret
;
; RV64V-LABEL: umulh_v2i48:
; RV64V:       # %bb.0:
; RV64V-NEXT:    li a0, -1
; RV64V-NEXT:    srli a0, a0, 16
; RV64V-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
; RV64V-NEXT:    vand.vx v9, v9, a0
; RV64V-NEXT:    vsll.vi v8, v8, 16
; RV64V-NEXT:    vmulhu.vv v8, v8, v9
; RV64V-NEXT:    ret
  %r = call <2 x i48> @llvm.umulh(<2 x i48> %x, <2 x i48> %y)
  ret <2 x i48> %r
}

define <2 x i128> @umulh_v2i128(<2 x i128> %x, <2 x i128> %y) nounwind {
; RV32I-LABEL: umulh_v2i128:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -128
; RV32I-NEXT:    sw ra, 124(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s0, 120(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s1, 116(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s2, 112(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s3, 108(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s4, 104(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s5, 100(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s6, 96(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s7, 92(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s8, 88(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s9, 84(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s10, 80(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw s11, 76(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 16(a2)
; RV32I-NEXT:    sw a3, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 20(a2)
; RV32I-NEXT:    sw a3, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 24(a2)
; RV32I-NEXT:    sw a3, 52(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 28(a2)
; RV32I-NEXT:    sw a3, 68(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 16(a1)
; RV32I-NEXT:    sw a3, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 20(a1)
; RV32I-NEXT:    sw a3, 64(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 24(a1)
; RV32I-NEXT:    sw a3, 56(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a3, 28(a1)
; RV32I-NEXT:    sw a3, 72(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s5, 0(a2)
; RV32I-NEXT:    lw s4, 4(a2)
; RV32I-NEXT:    lw a3, 8(a2)
; RV32I-NEXT:    sw a3, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw a2, 12(a2)
; RV32I-NEXT:    sw a2, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    lw s3, 0(a1)
; RV32I-NEXT:    lw s2, 4(a1)
; RV32I-NEXT:    lw s9, 8(a1)
; RV32I-NEXT:    lw s11, 12(a1)
; RV32I-NEXT:    sw a0, 32(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s6, a1
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s6, a0, s6
; RV32I-NEXT:    sltu a0, s6, a0
; RV32I-NEXT:    add s0, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s6, a0, s6
; RV32I-NEXT:    sltu a0, s6, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s1, s0, a0
; RV32I-NEXT:    sw s2, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s2, a0, s1
; RV32I-NEXT:    sltu a2, s1, s0
; RV32I-NEXT:    sltu a0, s2, a0
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    add s0, a1, a0
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s7, a0
; RV32I-NEXT:    mv s8, a1
; RV32I-NEXT:    mv a0, s11
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s6, a0
; RV32I-NEXT:    mv s5, a1
; RV32I-NEXT:    add s8, a0, s8
; RV32I-NEXT:    sw s9, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s1, s7, s2
; RV32I-NEXT:    add a2, a0, s8
; RV32I-NEXT:    add s0, a2, s0
; RV32I-NEXT:    sltu s9, s1, s7
; RV32I-NEXT:    add s2, s0, s9
; RV32I-NEXT:    beq s2, a2, .LBB15_2
; RV32I-NEXT:  # %bb.1:
; RV32I-NEXT:    sltu s9, s2, a2
; RV32I-NEXT:  .LBB15_2:
; RV32I-NEXT:    sltu a3, s8, s6
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add a3, s5, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    sw a3, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s10, a3, a0
; RV32I-NEXT:    sw s11, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    mv a0, s11
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s4, a0
; RV32I-NEXT:    sw a1, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s5, a0, s10
; RV32I-NEXT:    add s9, s5, s9
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s6, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s8, a0
; RV32I-NEXT:    mv s0, a1
; RV32I-NEXT:    lw a0, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s6
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s11, a0
; RV32I-NEXT:    mv s6, a1
; RV32I-NEXT:    add s7, a0, s0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw a2, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s1, s8, s1
; RV32I-NEXT:    add a2, a0, s7
; RV32I-NEXT:    add a3, a2, s2
; RV32I-NEXT:    sltu s0, s1, s8
; RV32I-NEXT:    add a3, a3, s0
; RV32I-NEXT:    beq a3, a2, .LBB15_4
; RV32I-NEXT:  # %bb.3:
; RV32I-NEXT:    sltu s0, a3, a2
; RV32I-NEXT:  .LBB15_4:
; RV32I-NEXT:    sltu a3, s7, s11
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s6, s6, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s1, s6, a0
; RV32I-NEXT:    lw a0, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s8, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s9, s5
; RV32I-NEXT:    add a3, a0, s1
; RV32I-NEXT:    sltu a4, s5, s4
; RV32I-NEXT:    add s0, a3, s0
; RV32I-NEXT:    lw a5, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sltu a5, s10, a5
; RV32I-NEXT:    add s7, s9, s0
; RV32I-NEXT:    lw a6, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add a5, a6, a5
; RV32I-NEXT:    add a2, a4, a2
; RV32I-NEXT:    sltu a4, s1, s6
; RV32I-NEXT:    sltu a0, a3, a0
; RV32I-NEXT:    add a1, a1, a4
; RV32I-NEXT:    sltu a3, s0, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s4, a5, a2
; RV32I-NEXT:    add a0, a0, a3
; RV32I-NEXT:    sltu s9, s7, s9
; RV32I-NEXT:    add a0, s4, a0
; RV32I-NEXT:    add s5, a0, s9
; RV32I-NEXT:    lw s10, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s10
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s1, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv s3, a1
; RV32I-NEXT:    lw s6, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s2, a0
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    add s3, a0, s3
; RV32I-NEXT:    mv a0, s10
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s8
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s7, s0, s7
; RV32I-NEXT:    add a2, a0, s3
; RV32I-NEXT:    sw s7, 36(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sltu s8, s7, s0
; RV32I-NEXT:    add a3, a2, s8
; RV32I-NEXT:    add a3, a3, s5
; RV32I-NEXT:    beq a3, a2, .LBB15_6
; RV32I-NEXT:  # %bb.5:
; RV32I-NEXT:    sltu s8, a3, a2
; RV32I-NEXT:  .LBB15_6:
; RV32I-NEXT:    sw a3, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT:    beq s5, s4, .LBB15_8
; RV32I-NEXT:  # %bb.7:
; RV32I-NEXT:    sltu s9, s5, s4
; RV32I-NEXT:  .LBB15_8:
; RV32I-NEXT:    sltu a3, s3, s2
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s1, s1, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s0, s1, a0
; RV32I-NEXT:    mv a0, s6
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw a2, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s10, a0, s0
; RV32I-NEXT:    sltu s5, s0, s1
; RV32I-NEXT:    add s9, s10, s9
; RV32I-NEXT:    sw s9, 40(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sltu a0, s10, a0
; RV32I-NEXT:    sw a0, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s5, a1, s5
; RV32I-NEXT:    lw s3, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s4, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a1
; RV32I-NEXT:    lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s0, a0, s0
; RV32I-NEXT:    sltu a0, s0, a0
; RV32I-NEXT:    add s1, a1, a0
; RV32I-NEXT:    mv a0, s3
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s11, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s11
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s0, a0, s0
; RV32I-NEXT:    sltu a0, s0, a0
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s0, s1, a0
; RV32I-NEXT:    mv a0, s2
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s11
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s6, a0, s0
; RV32I-NEXT:    sltu a2, s0, s1
; RV32I-NEXT:    sltu a0, s6, a0
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    add s7, a1, a0
; RV32I-NEXT:    lw s9, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv s3, a1
; RV32I-NEXT:    lw a0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s4
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s2, a0
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    add s3, a0, s3
; RV32I-NEXT:    mv a0, s9
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s11
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s6, s0, s6
; RV32I-NEXT:    add a2, a0, s3
; RV32I-NEXT:    add s7, a2, s7
; RV32I-NEXT:    sltu s11, s6, s0
; RV32I-NEXT:    add s9, s7, s11
; RV32I-NEXT:    beq s9, a2, .LBB15_10
; RV32I-NEXT:  # %bb.9:
; RV32I-NEXT:    sltu s11, s9, a2
; RV32I-NEXT:  .LBB15_10:
; RV32I-NEXT:    lw a3, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add s8, a3, s8
; RV32I-NEXT:    sw s8, 60(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sltu a3, a3, s10
; RV32I-NEXT:    sw a3, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sltu a3, s3, s2
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add a3, s1, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    lw a1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add a1, s5, a1
; RV32I-NEXT:    sw a1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sw a3, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s10, a3, a0
; RV32I-NEXT:    lw a0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw a2, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s8, a0
; RV32I-NEXT:    sw a1, 44(sp) # 4-byte Folded Spill
; RV32I-NEXT:    add s2, a0, s10
; RV32I-NEXT:    add s11, s2, s11
; RV32I-NEXT:    lw s1, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s1
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s3, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv s5, a1
; RV32I-NEXT:    lw a0, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s3
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s7, a0
; RV32I-NEXT:    mv s3, a1
; RV32I-NEXT:    add s4, a0, s5
; RV32I-NEXT:    mv a0, s1
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw a2, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s6, s0, s6
; RV32I-NEXT:    add a2, a0, s4
; RV32I-NEXT:    add a3, a2, s9
; RV32I-NEXT:    sltu s0, s6, s0
; RV32I-NEXT:    add a3, a3, s0
; RV32I-NEXT:    beq a3, a2, .LBB15_12
; RV32I-NEXT:  # %bb.11:
; RV32I-NEXT:    sltu s0, a3, a2
; RV32I-NEXT:  .LBB15_12:
; RV32I-NEXT:    lw a3, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a4, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sltu a3, a3, a4
; RV32I-NEXT:    sw a3, 48(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sltu a3, s4, s7
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s3, s3, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    lw s4, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw a1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add s4, a1, s4
; RV32I-NEXT:    add s6, s3, a0
; RV32I-NEXT:    lw a0, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s5, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s11, s2
; RV32I-NEXT:    add a3, a0, s6
; RV32I-NEXT:    sltu a4, s2, s8
; RV32I-NEXT:    add s0, a3, s0
; RV32I-NEXT:    lw a5, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sltu a5, s10, a5
; RV32I-NEXT:    add s9, s11, s0
; RV32I-NEXT:    lw a6, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add a5, a6, a5
; RV32I-NEXT:    add a2, a4, a2
; RV32I-NEXT:    sltu a4, s6, s3
; RV32I-NEXT:    sltu a0, a3, a0
; RV32I-NEXT:    add a1, a1, a4
; RV32I-NEXT:    sltu a3, s0, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s7, a5, a2
; RV32I-NEXT:    add a0, a0, a3
; RV32I-NEXT:    sltu s6, s9, s11
; RV32I-NEXT:    add a0, s7, a0
; RV32I-NEXT:    add s8, a0, s6
; RV32I-NEXT:    lw s11, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a0, s11
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw s1, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s0, a0
; RV32I-NEXT:    mv s3, a1
; RV32I-NEXT:    lw a0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s1
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    mv s2, a0
; RV32I-NEXT:    mv s1, a1
; RV32I-NEXT:    add s10, a0, s3
; RV32I-NEXT:    mv a0, s11
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    mv a2, s5
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    add s3, s0, s9
; RV32I-NEXT:    add a2, a0, s10
; RV32I-NEXT:    sltu s9, s3, s0
; RV32I-NEXT:    add s0, a2, s9
; RV32I-NEXT:    add s0, s0, s8
; RV32I-NEXT:    beq s0, a2, .LBB15_14
; RV32I-NEXT:  # %bb.13:
; RV32I-NEXT:    sltu s9, s0, a2
; RV32I-NEXT:  .LBB15_14:
; RV32I-NEXT:    lw a3, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT:    add s4, s4, a3
; RV32I-NEXT:    beq s8, s7, .LBB15_16
; RV32I-NEXT:  # %bb.15:
; RV32I-NEXT:    sltu s6, s8, s7
; RV32I-NEXT:  .LBB15_16:
; RV32I-NEXT:    sltu a3, s10, s2
; RV32I-NEXT:    sltu a0, a2, a0
; RV32I-NEXT:    add s1, s1, a3
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    add s2, s1, a0
; RV32I-NEXT:    lw a0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a1, 0
; RV32I-NEXT:    lw a2, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT:    li a3, 0
; RV32I-NEXT:    call __muldi3
; RV32I-NEXT:    sltu a2, s2, s1
; RV32I-NEXT:    add s2, a0, s2
; RV32I-NEXT:    add a1, a1, a2
; RV32I-NEXT:    add s6, s2, s6
; RV32I-NEXT:    sltu a0, s2, a0
; RV32I-NEXT:    add s9, s6, s9
; RV32I-NEXT:    sltu a2, s6, s2
; RV32I-NEXT:    add a0, a1, a0
; RV32I-NEXT:    sltu a1, s9, s6
; RV32I-NEXT:    add a0, a0, a2
; RV32I-NEXT:    add a0, a0, a1
; RV32I-NEXT:    lw a1, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sw s3, 16(a1)
; RV32I-NEXT:    sw s0, 20(a1)
; RV32I-NEXT:    sw s9, 24(a1)
; RV32I-NEXT:    sw a0, 28(a1)
; RV32I-NEXT:    lw a0, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sw a0, 0(a1)
; RV32I-NEXT:    lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sw a0, 4(a1)
; RV32I-NEXT:    lw a0, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT:    sw a0, 8(a1)
; RV32I-NEXT:    sw s4, 12(a1)
; RV32I-NEXT:    lw ra, 124(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s0, 120(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s1, 116(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s2, 112(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s3, 108(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s4, 104(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s5, 100(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s6, 96(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s7, 92(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s8, 88(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s9, 84(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s10, 80(sp) # 4-byte Folded Reload
; RV32I-NEXT:    lw s11, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 128
; RV32I-NEXT:    ret
;
; RV64I-LABEL: umulh_v2i128:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -96
; RV64I-NEXT:    sd ra, 88(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s0, 80(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s1, 72(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s2, 64(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s3, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s4, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s5, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s6, 32(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s7, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s8, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sd s9, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    ld s5, 0(a2)
; RV64I-NEXT:    ld s6, 8(a2)
; RV64I-NEXT:    ld s4, 16(a2)
; RV64I-NEXT:    ld s1, 24(a2)
; RV64I-NEXT:    ld s7, 0(a1)
; RV64I-NEXT:    ld s8, 8(a1)
; RV64I-NEXT:    ld s3, 16(a1)
; RV64I-NEXT:    ld s2, 24(a1)
; RV64I-NEXT:    mv s0, a0
; RV64I-NEXT:    mv a0, s7
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s5
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv s9, a1
; RV64I-NEXT:    mv a0, s8
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s5
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s9, a0, s9
; RV64I-NEXT:    sltu a0, s9, a0
; RV64I-NEXT:    add s5, a1, a0
; RV64I-NEXT:    mv a0, s7
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s6
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s9, a0, s9
; RV64I-NEXT:    sltu a0, s9, a0
; RV64I-NEXT:    add a0, a1, a0
; RV64I-NEXT:    add s7, s5, a0
; RV64I-NEXT:    mv a0, s8
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s6
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s6, a0, s7
; RV64I-NEXT:    sltu a2, s7, s5
; RV64I-NEXT:    sltu a0, s6, a0
; RV64I-NEXT:    add a1, a1, a2
; RV64I-NEXT:    add s7, a1, a0
; RV64I-NEXT:    mv a0, s3
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s4
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    mv s5, a1
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s4
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s5, a0, s5
; RV64I-NEXT:    sltu a0, s5, a0
; RV64I-NEXT:    add s4, a1, a0
; RV64I-NEXT:    mv a0, s3
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s1
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    add s5, a0, s5
; RV64I-NEXT:    sltu a0, s5, a0
; RV64I-NEXT:    add a0, a1, a0
; RV64I-NEXT:    add s3, s4, a0
; RV64I-NEXT:    mv a0, s2
; RV64I-NEXT:    li a1, 0
; RV64I-NEXT:    mv a2, s1
; RV64I-NEXT:    li a3, 0
; RV64I-NEXT:    call __multi3
; RV64I-NEXT:    sltu a2, s3, s4
; RV64I-NEXT:    add s3, a0, s3
; RV64I-NEXT:    add a1, a1, a2
; RV64I-NEXT:    sltu a0, s3, a0
; RV64I-NEXT:    add a0, a1, a0
; RV64I-NEXT:    sd s6, 0(s0)
; RV64I-NEXT:    sd s7, 8(s0)
; RV64I-NEXT:    sd s3, 16(s0)
; RV64I-NEXT:    sd a0, 24(s0)
; RV64I-NEXT:    ld ra, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s0, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s1, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s2, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s3, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s4, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s5, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s6, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s7, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s8, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT:    ld s9, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 96
; RV64I-NEXT:    ret
;
; RV32M-LABEL: umulh_v2i128:
; RV32M:       # %bb.0:
; RV32M-NEXT:    addi sp, sp, -64
; RV32M-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s1, 52(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s2, 48(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s3, 44(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s4, 40(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s5, 36(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s6, 32(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s7, 28(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s8, 24(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s9, 20(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s10, 16(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sw s11, 12(sp) # 4-byte Folded Spill
; RV32M-NEXT:    lw a5, 0(a1)
; RV32M-NEXT:    lw a3, 4(a1)
; RV32M-NEXT:    lw t2, 0(a2)
; RV32M-NEXT:    lw a4, 4(a2)
; RV32M-NEXT:    lw t1, 8(a2)
; RV32M-NEXT:    lw a6, 12(a2)
; RV32M-NEXT:    lw t0, 8(a1)
; RV32M-NEXT:    lw a7, 12(a1)
; RV32M-NEXT:    mulhu t5, a5, t2
; RV32M-NEXT:    mul t6, a3, t2
; RV32M-NEXT:    mul s0, a5, a4
; RV32M-NEXT:    mulhu s1, a3, t2
; RV32M-NEXT:    mulhu s2, a5, a4
; RV32M-NEXT:    mul s3, a3, a4
; RV32M-NEXT:    mulhu s4, a3, a4
; RV32M-NEXT:    mulhu s5, t0, t2
; RV32M-NEXT:    mul t3, a7, t2
; RV32M-NEXT:    mul t4, t0, a4
; RV32M-NEXT:    add t5, t6, t5
; RV32M-NEXT:    sltu t6, t5, t6
; RV32M-NEXT:    add t5, s0, t5
; RV32M-NEXT:    sltu t5, t5, s0
; RV32M-NEXT:    mul s0, t0, t2
; RV32M-NEXT:    add t6, s1, t6
; RV32M-NEXT:    add t5, s2, t5
; RV32M-NEXT:    add t5, t6, t5
; RV32M-NEXT:    sltu t6, t5, t6
; RV32M-NEXT:    add t5, s3, t5
; RV32M-NEXT:    add t6, s4, t6
; RV32M-NEXT:    sltu s1, t5, s3
; RV32M-NEXT:    add s2, t3, s5
; RV32M-NEXT:    add s1, t6, s1
; RV32M-NEXT:    add s3, t4, s2
; RV32M-NEXT:    add t6, s0, t5
; RV32M-NEXT:    add s1, s3, s1
; RV32M-NEXT:    sltu t5, t6, s0
; RV32M-NEXT:    add s1, s1, t5
; RV32M-NEXT:    beq s1, s3, .LBB15_2
; RV32M-NEXT:  # %bb.1:
; RV32M-NEXT:    sltu t5, s1, s3
; RV32M-NEXT:  .LBB15_2:
; RV32M-NEXT:    mulhu t2, a7, t2
; RV32M-NEXT:    mulhu s6, t0, a4
; RV32M-NEXT:    mulhu s7, a5, t1
; RV32M-NEXT:    mul s4, a3, t1
; RV32M-NEXT:    mul s5, a5, a6
; RV32M-NEXT:    mul s8, a5, t1
; RV32M-NEXT:    mul s0, a7, a4
; RV32M-NEXT:    sltu t3, s2, t3
; RV32M-NEXT:    sltu s2, s3, t4
; RV32M-NEXT:    add t4, t2, t3
; RV32M-NEXT:    add s2, s6, s2
; RV32M-NEXT:    add s3, s4, s7
; RV32M-NEXT:    add s2, t4, s2
; RV32M-NEXT:    add s6, s5, s3
; RV32M-NEXT:    add t6, s8, t6
; RV32M-NEXT:    add s1, s6, s1
; RV32M-NEXT:    sltu t3, t6, s8
; RV32M-NEXT:    add t6, s0, s2
; RV32M-NEXT:    add s1, s1, t3
; RV32M-NEXT:    add t2, t6, t5
; RV32M-NEXT:    beq s1, s6, .LBB15_4
; RV32M-NEXT:  # %bb.3:
; RV32M-NEXT:    sltu t3, s1, s6
; RV32M-NEXT:  .LBB15_4:
; RV32M-NEXT:    mulhu t5, a3, t1
; RV32M-NEXT:    mulhu a5, a5, a6
; RV32M-NEXT:    sltu s1, s3, s4
; RV32M-NEXT:    sltu s3, s6, s5
; RV32M-NEXT:    mul s4, a3, a6
; RV32M-NEXT:    sltu s5, t2, t6
; RV32M-NEXT:    sltu t6, t6, s0
; RV32M-NEXT:    sltu t4, s2, t4
; RV32M-NEXT:    mulhu a4, a7, a4
; RV32M-NEXT:    mulhu a3, a3, a6
; RV32M-NEXT:    mulhu s0, t0, t1
; RV32M-NEXT:    add t5, t5, s1
; RV32M-NEXT:    add a5, a5, s3
; RV32M-NEXT:    add t4, t4, t6
; RV32M-NEXT:    add a5, t5, a5
; RV32M-NEXT:    add t4, t4, s5
; RV32M-NEXT:    add t6, s4, a5
; RV32M-NEXT:    sltu a5, a5, t5
; RV32M-NEXT:    mul s1, a7, t1
; RV32M-NEXT:    add t3, t6, t3
; RV32M-NEXT:    mul t5, t0, t1
; RV32M-NEXT:    add s6, t2, t3
; RV32M-NEXT:    mul s2, t0, a6
; RV32M-NEXT:    sltu s3, t6, s4
; RV32M-NEXT:    add a3, a3, a5
; RV32M-NEXT:    sltu a5, t3, t6
; RV32M-NEXT:    add a3, a3, s3
; RV32M-NEXT:    add s5, a4, t4
; RV32M-NEXT:    add a3, a3, a5
; RV32M-NEXT:    sltu t6, s6, t2
; RV32M-NEXT:    add a4, s5, a3
; RV32M-NEXT:    add s3, s1, s0
; RV32M-NEXT:    add s6, t5, s6
; RV32M-NEXT:    add s4, s2, s3
; RV32M-NEXT:    sw s6, 8(sp) # 4-byte Folded Spill
; RV32M-NEXT:    sltu t5, s6, t5
; RV32M-NEXT:    add s6, a4, t6
; RV32M-NEXT:    add a4, s4, t5
; RV32M-NEXT:    add a4, a4, s6
; RV32M-NEXT:    beq a4, s4, .LBB15_6
; RV32M-NEXT:  # %bb.5:
; RV32M-NEXT:    sltu t5, a4, s4
; RV32M-NEXT:  .LBB15_6:
; RV32M-NEXT:    lw t4, 16(a1)
; RV32M-NEXT:    lw t2, 20(a1)
; RV32M-NEXT:    lw a5, 24(a1)
; RV32M-NEXT:    lw a1, 28(a1)
; RV32M-NEXT:    lw s0, 16(a2)
; RV32M-NEXT:    lw t3, 20(a2)
; RV32M-NEXT:    beq s6, s5, .LBB15_8
; RV32M-NEXT:  # %bb.7:
; RV32M-NEXT:    sltu t6, s6, s5
; RV32M-NEXT:  .LBB15_8:
; RV32M-NEXT:    mulhu t1, a7, t1
; RV32M-NEXT:    mulhu t0, t0, a6
; RV32M-NEXT:    mulhu s5, t4, s0
; RV32M-NEXT:    mul s6, t2, s0
; RV32M-NEXT:    mul s7, t4, t3
; RV32M-NEXT:    sltu s1, s3, s1
; RV32M-NEXT:    sltu s2, s4, s2
; RV32M-NEXT:    mul s9, a7, a6
; RV32M-NEXT:    mulhu a6, a7, a6
; RV32M-NEXT:    mulhu a7, t2, s0
; RV32M-NEXT:    mulhu s3, t4, t3
; RV32M-NEXT:    add t1, t1, s1
; RV32M-NEXT:    add t0, t0, s2
; RV32M-NEXT:    add s5, s6, s5
; RV32M-NEXT:    add t0, t1, t0
; RV32M-NEXT:    sltu s1, s5, s6
; RV32M-NEXT:    add s5, s7, s5
; RV32M-NEXT:    sltu s2, t0, t1
; RV32M-NEXT:    mul s4, t2, t3
; RV32M-NEXT:    sltu t1, s5, s7
; RV32M-NEXT:    mulhu s5, t2, t3
; RV32M-NEXT:    add s6, a7, s1
; RV32M-NEXT:    add s3, s3, t1
; RV32M-NEXT:    mulhu s7, a5, s0
; RV32M-NEXT:    mul a7, a1, s0
; RV32M-NEXT:    mul t1, a5, t3
; RV32M-NEXT:    mul s8, a5, s0
; RV32M-NEXT:    add s1, a6, s2
; RV32M-NEXT:    add s3, s6, s3
; RV32M-NEXT:    sltu a6, s3, s6
; RV32M-NEXT:    add s3, s4, s3
; RV32M-NEXT:    add s5, s5, a6
; RV32M-NEXT:    lw a6, 24(a2)
; RV32M-NEXT:    lw a2, 28(a2)
; RV32M-NEXT:    sltu s2, s3, s4
; RV32M-NEXT:    add s2, s5, s2
; RV32M-NEXT:    add s5, a7, s7
; RV32M-NEXT:    add s6, t1, s5
; RV32M-NEXT:    add s3, s8, s3
; RV32M-NEXT:    add s4, s6, s2
; RV32M-NEXT:    sltu s2, s3, s8
; RV32M-NEXT:    add s8, s9, t0
; RV32M-NEXT:    add s4, s4, s2
; RV32M-NEXT:    add t0, s8, t6
; RV32M-NEXT:    sltu t6, s8, s9
; RV32M-NEXT:    beq s4, s6, .LBB15_10
; RV32M-NEXT:  # %bb.9:
; RV32M-NEXT:    sltu s2, s4, s6
; RV32M-NEXT:  .LBB15_10:
; RV32M-NEXT:    mulhu s0, a1, s0
; RV32M-NEXT:    mulhu s10, a5, t3
; RV32M-NEXT:    mulhu s11, t4, a6
; RV32M-NEXT:    mul s7, t2, a6
; RV32M-NEXT:    mul s9, t4, a2
; RV32M-NEXT:    mul ra, t4, a6
; RV32M-NEXT:    sltu s5, s5, a7
; RV32M-NEXT:    sltu a3, s6, t1
; RV32M-NEXT:    mul s6, a1, t3
; RV32M-NEXT:    add s5, s0, s5
; RV32M-NEXT:    add a7, t0, t5
; RV32M-NEXT:    sltu t1, t0, s8
; RV32M-NEXT:    add a3, s10, a3
; RV32M-NEXT:    add s10, s7, s11
; RV32M-NEXT:    add s8, s5, a3
; RV32M-NEXT:    add s11, s9, s10
; RV32M-NEXT:    add s3, ra, s3
; RV32M-NEXT:    add s4, s11, s4
; RV32M-NEXT:    sltu s0, s3, ra
; RV32M-NEXT:    add s3, s6, s8
; RV32M-NEXT:    add s4, s4, s0
; RV32M-NEXT:    add t5, s1, t6
; RV32M-NEXT:    add t6, s3, s2
; RV32M-NEXT:    beq s4, s11, .LBB15_12
; RV32M-NEXT:  # %bb.11:
; RV32M-NEXT:    sltu s0, s4, s11
; RV32M-NEXT:  .LBB15_12:
; RV32M-NEXT:    mulhu a3, t2, a6
; RV32M-NEXT:    mulhu t4, t4, a2
; RV32M-NEXT:    sltu s1, s10, s7
; RV32M-NEXT:    sltu s2, s11, s9
; RV32M-NEXT:    mul s4, t2, a2
; RV32M-NEXT:    sltu s6, s3, s6
; RV32M-NEXT:    sltu s3, t6, s3
; RV32M-NEXT:    sltu s5, s8, s5
; RV32M-NEXT:    mulhu t3, a1, t3
; RV32M-NEXT:    mulhu s7, t2, a2
; RV32M-NEXT:    mulhu s8, a5, a6
; RV32M-NEXT:    add a3, a3, s1
; RV32M-NEXT:    add t4, t4, s2
; RV32M-NEXT:    add s5, s5, s6
; RV32M-NEXT:    add t4, a3, t4
; RV32M-NEXT:    add s3, s5, s3
; RV32M-NEXT:    add s1, s4, t4
; RV32M-NEXT:    sltu a3, t4, a3
; RV32M-NEXT:    mul t2, a1, a6
; RV32M-NEXT:    add t4, s1, s0
; RV32M-NEXT:    mul s5, a5, a6
; RV32M-NEXT:    add s6, t6, t4
; RV32M-NEXT:    mul s0, a5, a2
; RV32M-NEXT:    sltu s2, s1, s4
; RV32M-NEXT:    add a3, s7, a3
; RV32M-NEXT:    sltu t4, t4, s1
; RV32M-NEXT:    add a3, a3, s2
; RV32M-NEXT:    add s4, t3, s3
; RV32M-NEXT:    add a3, a3, t4
; RV32M-NEXT:    sltu t6, s6, t6
; RV32M-NEXT:    add a3, s4, a3
; RV32M-NEXT:    add s2, t2, s8
; RV32M-NEXT:    add t3, s5, s6
; RV32M-NEXT:    add s3, s0, s2
; RV32M-NEXT:    sltu s1, t3, s5
; RV32M-NEXT:    add s5, a3, t6
; RV32M-NEXT:    add t4, s3, s1
; RV32M-NEXT:    add t4, t4, s5
; RV32M-NEXT:    sltu t0, a7, t0
; RV32M-NEXT:    add t1, t5, t1
; RV32M-NEXT:    beq t4, s3, .LBB15_14
; RV32M-NEXT:  # %bb.13:
; RV32M-NEXT:    sltu s1, t4, s3
; RV32M-NEXT:  .LBB15_14:
; RV32M-NEXT:    add t0, t1, t0
; RV32M-NEXT:    beq s5, s4, .LBB15_16
; RV32M-NEXT:  # %bb.15:
; RV32M-NEXT:    sltu t6, s5, s4
; RV32M-NEXT:  .LBB15_16:
; RV32M-NEXT:    mulhu a3, a1, a6
; RV32M-NEXT:    mulhu a5, a5, a2
; RV32M-NEXT:    mul a6, a1, a2
; RV32M-NEXT:    mulhu a1, a1, a2
; RV32M-NEXT:    sltu a2, s2, t2
; RV32M-NEXT:    sltu t1, s3, s0
; RV32M-NEXT:    add a2, a3, a2
; RV32M-NEXT:    add a5, a5, t1
; RV32M-NEXT:    add a5, a2, a5
; RV32M-NEXT:    add a3, a6, a5
; RV32M-NEXT:    sltu a2, a5, a2
; RV32M-NEXT:    add t6, a3, t6
; RV32M-NEXT:    sltu a5, a3, a6
; RV32M-NEXT:    add a1, a1, a2
; RV32M-NEXT:    add s1, t6, s1
; RV32M-NEXT:    sltu a2, t6, a3
; RV32M-NEXT:    add a1, a1, a5
; RV32M-NEXT:    sltu a3, s1, t6
; RV32M-NEXT:    add a1, a1, a2
; RV32M-NEXT:    add a1, a1, a3
; RV32M-NEXT:    sw t3, 16(a0)
; RV32M-NEXT:    sw t4, 20(a0)
; RV32M-NEXT:    sw s1, 24(a0)
; RV32M-NEXT:    sw a1, 28(a0)
; RV32M-NEXT:    lw a1, 8(sp) # 4-byte Folded Reload
; RV32M-NEXT:    sw a1, 0(a0)
; RV32M-NEXT:    sw a4, 4(a0)
; RV32M-NEXT:    sw a7, 8(a0)
; RV32M-NEXT:    sw t0, 12(a0)
; RV32M-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s1, 52(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s2, 48(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s3, 44(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s4, 40(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s5, 36(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s6, 32(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s7, 28(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s8, 24(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s9, 20(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s10, 16(sp) # 4-byte Folded Reload
; RV32M-NEXT:    lw s11, 12(sp) # 4-byte Folded Reload
; RV32M-NEXT:    addi sp, sp, 64
; RV32M-NEXT:    ret
;
; RV64M-LABEL: umulh_v2i128:
; RV64M:       # %bb.0:
; RV64M-NEXT:    ld a3, 0(a1)
; RV64M-NEXT:    ld a4, 8(a1)
; RV64M-NEXT:    ld a5, 0(a2)
; RV64M-NEXT:    ld a6, 8(a2)
; RV64M-NEXT:    ld a7, 16(a2)
; RV64M-NEXT:    ld a2, 24(a2)
; RV64M-NEXT:    ld t0, 16(a1)
; RV64M-NEXT:    ld a1, 24(a1)
; RV64M-NEXT:    mulhu t1, a3, a5
; RV64M-NEXT:    mul t2, a4, a5
; RV64M-NEXT:    mulhu a5, a4, a5
; RV64M-NEXT:    mul t3, a3, a6
; RV64M-NEXT:    mulhu a3, a3, a6
; RV64M-NEXT:    mul t4, a4, a6
; RV64M-NEXT:    mulhu a4, a4, a6
; RV64M-NEXT:    add t1, t2, t1
; RV64M-NEXT:    mulhu a6, t0, a7
; RV64M-NEXT:    sltu t2, t1, t2
; RV64M-NEXT:    mul t5, a1, a7
; RV64M-NEXT:    add a5, a5, t2
; RV64M-NEXT:    mul t2, t0, a2
; RV64M-NEXT:    add t1, t3, t1
; RV64M-NEXT:    sltu t1, t1, t3
; RV64M-NEXT:    mulhu a7, a1, a7
; RV64M-NEXT:    mulhu t0, t0, a2
; RV64M-NEXT:    add a3, a3, t1
; RV64M-NEXT:    mul t1, a1, a2
; RV64M-NEXT:    add a3, a5, a3
; RV64M-NEXT:    mulhu a1, a1, a2
; RV64M-NEXT:    sltu a2, a3, a5
; RV64M-NEXT:    add a3, t4, a3
; RV64M-NEXT:    add a6, t5, a6
; RV64M-NEXT:    sltu a5, a6, t5
; RV64M-NEXT:    add a6, t2, a6
; RV64M-NEXT:    sltu a6, a6, t2
; RV64M-NEXT:    sltu t2, a3, t4
; RV64M-NEXT:    add a5, a7, a5
; RV64M-NEXT:    add a6, t0, a6
; RV64M-NEXT:    add a2, a4, a2
; RV64M-NEXT:    add a6, a5, a6
; RV64M-NEXT:    add a4, t1, a6
; RV64M-NEXT:    sltu a5, a6, a5
; RV64M-NEXT:    sltu a6, a4, t1
; RV64M-NEXT:    add a1, a1, a5
; RV64M-NEXT:    add a2, a2, t2
; RV64M-NEXT:    add a1, a1, a6
; RV64M-NEXT:    sd a3, 0(a0)
; RV64M-NEXT:    sd a2, 8(a0)
; RV64M-NEXT:    sd a4, 16(a0)
; RV64M-NEXT:    sd a1, 24(a0)
; RV64M-NEXT:    ret
  %r = call <2 x i128> @llvm.umulh(<2 x i128> %x, <2 x i128> %y)
  ret <2 x i128> %r
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK: {{.*}}
; CHECK-I: {{.*}}