test/CodeGen/RISCV/GlobalISel/atomicrmw-add-sub.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -mtriple=riscv32 -mattr=+a,+zabha < %s | FileCheck %s --check-prefixes=RV32IA-ZABHA
; RUN: llc -global-isel -mtriple=riscv32 -mattr=+a < %s | FileCheck %s --check-prefixes=RV32IA
; RUN: llc -global-isel -mtriple=riscv32 < %s | FileCheck %s --check-prefixes=RV32I
; RUN: llc -global-isel -mtriple=riscv64 -mattr=+a,+zabha < %s | FileCheck %s --check-prefixes=RV64IA-ZABHA
; RUN: llc -global-isel -mtriple=riscv64 -mattr=+a < %s | FileCheck %s --check-prefixes=RV64IA
; RUN: llc -global-isel -mtriple=riscv64 < %s | FileCheck %s --check-prefixes=RV64I

define i8 @atomicrmw_add_i8(ptr %ptr, i8 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_add_i8:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_add_i8:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    li a2, 255
; RV32IA-NEXT:    andi a3, a0, -4
; RV32IA-NEXT:    andi a0, a0, 3
; RV32IA-NEXT:    zext.b a1, a1
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    sll a2, a2, a0
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a3)
; RV32IA-NEXT:    add a5, a4, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a2
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV32IA-NEXT:    bnez a5, .LBB0_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_add_i8:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_add_1
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_add_i8:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_add_i8:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    li a2, 255
; RV64IA-NEXT:    andi a3, a0, -4
; RV64IA-NEXT:    andi a0, a0, 3
; RV64IA-NEXT:    zext.b a1, a1
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    sllw a2, a2, a0
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a3)
; RV64IA-NEXT:    add a5, a4, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a2
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV64IA-NEXT:    bnez a5, .LBB0_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i8:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_add_1
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw add ptr %ptr, i8 %rhs seq_cst
  ret i8 %res
}

define i16 @atomicrmw_add_i16(ptr %ptr, i16 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_add_i16:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_add_i16:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    lui a2, 16
; RV32IA-NEXT:    andi a3, a0, -4
; RV32IA-NEXT:    andi a0, a0, 3
; RV32IA-NEXT:    addi a2, a2, -1
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    sll a4, a2, a0
; RV32IA-NEXT:    and a1, a1, a2
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
; RV32IA-NEXT:    add a5, a2, a1
; RV32IA-NEXT:    xor a5, a2, a5
; RV32IA-NEXT:    and a5, a5, a4
; RV32IA-NEXT:    xor a5, a2, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV32IA-NEXT:    bnez a5, .LBB1_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a2, a0
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_add_i16:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_add_2
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_add_i16:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_add_i16:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    lui a2, 16
; RV64IA-NEXT:    andi a3, a0, -4
; RV64IA-NEXT:    andi a0, a0, 3
; RV64IA-NEXT:    addi a2, a2, -1
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    sllw a4, a2, a0
; RV64IA-NEXT:    and a1, a1, a2
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB1_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
; RV64IA-NEXT:    add a5, a2, a1
; RV64IA-NEXT:    xor a5, a2, a5
; RV64IA-NEXT:    and a5, a5, a4
; RV64IA-NEXT:    xor a5, a2, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV64IA-NEXT:    bnez a5, .LBB1_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a2, a0
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i16:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_add_2
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw add ptr %ptr, i16 %rhs seq_cst
  ret i16 %res
}

define i32 @atomicrmw_add_i32(ptr %ptr, i32 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_add_i32:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_add_i32:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_add_i32:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_add_4
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_add_i32:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_add_i32:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i32:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_add_4
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw add ptr %ptr, i32 %rhs seq_cst
  ret i32 %res
}

define i64 @atomicrmw_add_i64(ptr %ptr, i64 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_add_i64:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    addi sp, sp, -16
; RV32IA-ZABHA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-ZABHA-NEXT:    li a3, 5
; RV32IA-ZABHA-NEXT:    call __atomic_fetch_add_8
; RV32IA-ZABHA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-ZABHA-NEXT:    addi sp, sp, 16
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_add_i64:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    addi sp, sp, -16
; RV32IA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-NEXT:    li a3, 5
; RV32IA-NEXT:    call __atomic_fetch_add_8
; RV32IA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-NEXT:    addi sp, sp, 16
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_add_i64:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a3, 5
; RV32I-NEXT:    call __atomic_fetch_add_8
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_add_i64:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_add_i64:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_add_i64:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_add_8
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw add ptr %ptr, i64 %rhs seq_cst
  ret i64 %res
}

define i8 @atomicrmw_sub_i8(ptr %ptr, i8 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i8:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    neg a1, a1
; RV32IA-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i8:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    li a2, 255
; RV32IA-NEXT:    andi a3, a0, -4
; RV32IA-NEXT:    andi a0, a0, 3
; RV32IA-NEXT:    zext.b a1, a1
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    sll a2, a2, a0
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a3)
; RV32IA-NEXT:    sub a5, a4, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a2
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV32IA-NEXT:    bnez a5, .LBB4_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i8:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_1
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i8:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i8:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    li a2, 255
; RV64IA-NEXT:    andi a3, a0, -4
; RV64IA-NEXT:    andi a0, a0, 3
; RV64IA-NEXT:    zext.b a1, a1
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    sllw a2, a2, a0
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB4_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a3)
; RV64IA-NEXT:    sub a5, a4, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a2
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV64IA-NEXT:    bnez a5, .LBB4_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i8:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_1
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw sub ptr %ptr, i8 %rhs seq_cst
  ret i8 %res
}

define i16 @atomicrmw_sub_i16(ptr %ptr, i16 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i16:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    neg a1, a1
; RV32IA-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i16:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    lui a2, 16
; RV32IA-NEXT:    andi a3, a0, -4
; RV32IA-NEXT:    andi a0, a0, 3
; RV32IA-NEXT:    addi a2, a2, -1
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    sll a4, a2, a0
; RV32IA-NEXT:    and a1, a1, a2
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a2, (a3)
; RV32IA-NEXT:    sub a5, a2, a1
; RV32IA-NEXT:    xor a5, a2, a5
; RV32IA-NEXT:    and a5, a5, a4
; RV32IA-NEXT:    xor a5, a2, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV32IA-NEXT:    bnez a5, .LBB5_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a2, a0
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i16:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_2
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i16:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i16:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    lui a2, 16
; RV64IA-NEXT:    andi a3, a0, -4
; RV64IA-NEXT:    andi a0, a0, 3
; RV64IA-NEXT:    addi a2, a2, -1
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    sllw a4, a2, a0
; RV64IA-NEXT:    and a1, a1, a2
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:  .LBB5_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a2, (a3)
; RV64IA-NEXT:    sub a5, a2, a1
; RV64IA-NEXT:    xor a5, a2, a5
; RV64IA-NEXT:    and a5, a5, a4
; RV64IA-NEXT:    xor a5, a2, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV64IA-NEXT:    bnez a5, .LBB5_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a2, a0
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i16:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_2
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw sub ptr %ptr, i16 %rhs seq_cst
  ret i16 %res
}

define i32 @atomicrmw_sub_i32(ptr %ptr, i32 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i32:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    neg a1, a1
; RV32IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i32:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    neg a1, a1
; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i32:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_4
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i32:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i32:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    neg a1, a1
; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i32:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_4
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw sub ptr %ptr, i32 %rhs seq_cst
  ret i32 %res
}

define i64 @atomicrmw_sub_i64(ptr %ptr, i64 %rhs) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i64:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    addi sp, sp, -16
; RV32IA-ZABHA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-ZABHA-NEXT:    li a3, 5
; RV32IA-ZABHA-NEXT:    call __atomic_fetch_sub_8
; RV32IA-ZABHA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-ZABHA-NEXT:    addi sp, sp, 16
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i64:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    addi sp, sp, -16
; RV32IA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-NEXT:    li a3, 5
; RV32IA-NEXT:    call __atomic_fetch_sub_8
; RV32IA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-NEXT:    addi sp, sp, 16
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i64:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a3, 5
; RV32I-NEXT:    call __atomic_fetch_sub_8
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i64:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i64:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    neg a1, a1
; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i64:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_8
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %res = atomicrmw sub ptr %ptr, i64 %rhs seq_cst
  ret i64 %res
}

define i16 @atomicrmw_sub_i16_constant(ptr %a) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i16_constant:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    li a1, -1
; RV32IA-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i16_constant:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    lui a1, 16
; RV32IA-NEXT:    li a2, 1
; RV32IA-NEXT:    andi a3, a0, -4
; RV32IA-NEXT:    andi a0, a0, 3
; RV32IA-NEXT:    addi a1, a1, -1
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:    sll a2, a2, a0
; RV32IA-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a3)
; RV32IA-NEXT:    sub a5, a4, a2
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV32IA-NEXT:    bnez a5, .LBB8_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i16_constant:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 1
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_2
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i16_constant:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    li a1, 1
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.h.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i16_constant:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    lui a1, 16
; RV64IA-NEXT:    li a2, 1
; RV64IA-NEXT:    andi a3, a0, -4
; RV64IA-NEXT:    andi a0, a0, 3
; RV64IA-NEXT:    addi a1, a1, -1
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:    sllw a2, a2, a0
; RV64IA-NEXT:  .LBB8_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a3)
; RV64IA-NEXT:    sub a5, a4, a2
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV64IA-NEXT:    bnez a5, .LBB8_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i16_constant:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 1
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_2
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i16 1 seq_cst
  ret i16 %1
}

define i8 @atomicrmw_sub_i8_constant(ptr %a) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i8_constant:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    li a1, -1
; RV32IA-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i8_constant:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    li a1, 255
; RV32IA-NEXT:    li a2, 1
; RV32IA-NEXT:    andi a3, a0, -4
; RV32IA-NEXT:    andi a0, a0, 3
; RV32IA-NEXT:    slli a0, a0, 3
; RV32IA-NEXT:    sll a1, a1, a0
; RV32IA-NEXT:    sll a2, a2, a0
; RV32IA-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
; RV32IA-NEXT:    lr.w.aqrl a4, (a3)
; RV32IA-NEXT:    sub a5, a4, a2
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    and a5, a5, a1
; RV32IA-NEXT:    xor a5, a4, a5
; RV32IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV32IA-NEXT:    bnez a5, .LBB9_1
; RV32IA-NEXT:  # %bb.2:
; RV32IA-NEXT:    srl a0, a4, a0
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i8_constant:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 1
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_1
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i8_constant:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    li a1, 1
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.b.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i8_constant:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    li a1, 255
; RV64IA-NEXT:    li a2, 1
; RV64IA-NEXT:    andi a3, a0, -4
; RV64IA-NEXT:    andi a0, a0, 3
; RV64IA-NEXT:    slli a0, a0, 3
; RV64IA-NEXT:    sllw a1, a1, a0
; RV64IA-NEXT:    sllw a2, a2, a0
; RV64IA-NEXT:  .LBB9_1: # =>This Inner Loop Header: Depth=1
; RV64IA-NEXT:    lr.w.aqrl a4, (a3)
; RV64IA-NEXT:    sub a5, a4, a2
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    and a5, a5, a1
; RV64IA-NEXT:    xor a5, a4, a5
; RV64IA-NEXT:    sc.w.rl a5, a5, (a3)
; RV64IA-NEXT:    bnez a5, .LBB9_1
; RV64IA-NEXT:  # %bb.2:
; RV64IA-NEXT:    srlw a0, a4, a0
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i8_constant:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 1
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_1
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i8 1 seq_cst
  ret i8 %1
}

define i32 @atomicrmw_sub_i32_constant(ptr %a) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i32_constant:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    li a1, -1
; RV32IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i32_constant:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    li a1, -1
; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i32_constant:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 1
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_4
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i32_constant:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    li a1, 1
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i32_constant:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    li a1, 1
; RV64IA-NEXT:    neg a1, a1
; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i32_constant:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 1
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_4
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i32 1 seq_cst
  ret i32 %1
}

define i64 @atomicrmw_sub_i64_constant(ptr %a) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i64_constant:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    addi sp, sp, -16
; RV32IA-ZABHA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-ZABHA-NEXT:    li a1, 1
; RV32IA-ZABHA-NEXT:    li a3, 5
; RV32IA-ZABHA-NEXT:    li a2, 0
; RV32IA-ZABHA-NEXT:    call __atomic_fetch_sub_8
; RV32IA-ZABHA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-ZABHA-NEXT:    addi sp, sp, 16
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i64_constant:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    addi sp, sp, -16
; RV32IA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-NEXT:    li a1, 1
; RV32IA-NEXT:    li a3, 5
; RV32IA-NEXT:    li a2, 0
; RV32IA-NEXT:    call __atomic_fetch_sub_8
; RV32IA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-NEXT:    addi sp, sp, 16
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i64_constant:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    li a1, 1
; RV32I-NEXT:    li a3, 5
; RV32I-NEXT:    li a2, 0
; RV32I-NEXT:    call __atomic_fetch_sub_8
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i64_constant:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    li a1, -1
; RV64IA-ZABHA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i64_constant:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    li a1, -1
; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i64_constant:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    li a1, 1
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_8
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %1 = atomicrmw sub ptr %a, i64 1 seq_cst
  ret i64 %1
}

define i32 @atomicrmw_sub_i32_neg(ptr %a, i32 %x, i32 %y) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i32_neg:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    sub a1, a1, a2
; RV32IA-ZABHA-NEXT:    neg a1, a1
; RV32IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i32_neg:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    sub a1, a1, a2
; RV32IA-NEXT:    neg a1, a1
; RV32IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i32_neg:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sub a1, a1, a2
; RV32I-NEXT:    li a2, 5
; RV32I-NEXT:    call __atomic_fetch_sub_4
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i32_neg:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    subw a1, a1, a2
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i32_neg:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    subw a1, a1, a2
; RV64IA-NEXT:    neg a1, a1
; RV64IA-NEXT:    amoadd.w.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i32_neg:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    subw a1, a1, a2
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_4
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %b = sub i32 %x, %y
  %1 = atomicrmw sub ptr %a, i32 %b seq_cst
  ret i32 %1
}

define i64 @atomicrmw_sub_i64_neg(ptr %a, i64 %x, i64 %y) nounwind {
; RV32IA-ZABHA-LABEL: atomicrmw_sub_i64_neg:
; RV32IA-ZABHA:       # %bb.0:
; RV32IA-ZABHA-NEXT:    addi sp, sp, -16
; RV32IA-ZABHA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-ZABHA-NEXT:    sub a5, a1, a3
; RV32IA-ZABHA-NEXT:    sltu a1, a1, a3
; RV32IA-ZABHA-NEXT:    sub a2, a2, a4
; RV32IA-ZABHA-NEXT:    sub a2, a2, a1
; RV32IA-ZABHA-NEXT:    li a3, 5
; RV32IA-ZABHA-NEXT:    mv a1, a5
; RV32IA-ZABHA-NEXT:    call __atomic_fetch_sub_8
; RV32IA-ZABHA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-ZABHA-NEXT:    addi sp, sp, 16
; RV32IA-ZABHA-NEXT:    ret
;
; RV32IA-LABEL: atomicrmw_sub_i64_neg:
; RV32IA:       # %bb.0:
; RV32IA-NEXT:    addi sp, sp, -16
; RV32IA-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32IA-NEXT:    sub a5, a1, a3
; RV32IA-NEXT:    sltu a1, a1, a3
; RV32IA-NEXT:    sub a2, a2, a4
; RV32IA-NEXT:    sub a2, a2, a1
; RV32IA-NEXT:    li a3, 5
; RV32IA-NEXT:    mv a1, a5
; RV32IA-NEXT:    call __atomic_fetch_sub_8
; RV32IA-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32IA-NEXT:    addi sp, sp, 16
; RV32IA-NEXT:    ret
;
; RV32I-LABEL: atomicrmw_sub_i64_neg:
; RV32I:       # %bb.0:
; RV32I-NEXT:    addi sp, sp, -16
; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT:    sub a5, a1, a3
; RV32I-NEXT:    sltu a1, a1, a3
; RV32I-NEXT:    sub a2, a2, a4
; RV32I-NEXT:    sub a2, a2, a1
; RV32I-NEXT:    li a3, 5
; RV32I-NEXT:    mv a1, a5
; RV32I-NEXT:    call __atomic_fetch_sub_8
; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT:    addi sp, sp, 16
; RV32I-NEXT:    ret
;
; RV64IA-ZABHA-LABEL: atomicrmw_sub_i64_neg:
; RV64IA-ZABHA:       # %bb.0:
; RV64IA-ZABHA-NEXT:    sub a1, a1, a2
; RV64IA-ZABHA-NEXT:    neg a1, a1
; RV64IA-ZABHA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-ZABHA-NEXT:    ret
;
; RV64IA-LABEL: atomicrmw_sub_i64_neg:
; RV64IA:       # %bb.0:
; RV64IA-NEXT:    sub a1, a1, a2
; RV64IA-NEXT:    neg a1, a1
; RV64IA-NEXT:    amoadd.d.aqrl a0, a1, (a0)
; RV64IA-NEXT:    ret
;
; RV64I-LABEL: atomicrmw_sub_i64_neg:
; RV64I:       # %bb.0:
; RV64I-NEXT:    addi sp, sp, -16
; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT:    sub a1, a1, a2
; RV64I-NEXT:    li a2, 5
; RV64I-NEXT:    call __atomic_fetch_sub_8
; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT:    addi sp, sp, 16
; RV64I-NEXT:    ret
  %b = sub i64 %x, %y
  %1 = atomicrmw sub ptr %a, i64 %b seq_cst
  ret i64 %1
}