test/CodeGen/NVPTX/applypriority.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_80 -mattr=+ptx74| FileCheck --check-prefixes=CHECK-PTX64 %s
; RUN: %if ptxas-sm_80 && ptxas-isa-7.4 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_80 -mattr=+ptx74| %ptxas-verify -arch=sm_80 %}

target triple = "nvptx64-nvidia-cuda"

declare void  @llvm.nvvm.applypriority.global.L2.evict.normal(ptr addrspace(1) %global_ptr, i64 %size)
declare void  @llvm.nvvm.applypriority.L2.evict.normal(ptr %ptr, i64 %size)

define void @applypriority_global_L2(ptr addrspace(1) %global_ptr, i64 %size) {
; CHECK-PTX64-LABEL: applypriority_global_L2(
; CHECK-PTX64:       {
; CHECK-PTX64-NEXT:    .reg .b64 %rd<2>;
; CHECK-PTX64-EMPTY:
; CHECK-PTX64-NEXT:  // %bb.0:
; CHECK-PTX64-NEXT:    ld.param.b64 %rd1, [applypriority_global_L2_param_0];
; CHECK-PTX64-NEXT:    applypriority.global.L2::evict_normal [%rd1], 128;
; CHECK-PTX64-NEXT:    ret;
  tail call void @llvm.nvvm.applypriority.global.L2.evict.normal(ptr addrspace(1) %global_ptr, i64 128)
  ret void
}

define void @applypriority_L2(ptr %ptr, i64 %size) {
; CHECK-PTX64-LABEL: applypriority_L2(
; CHECK-PTX64:       {
; CHECK-PTX64-NEXT:    .reg .b64 %rd<2>;
; CHECK-PTX64-EMPTY:
; CHECK-PTX64-NEXT:  // %bb.0:
; CHECK-PTX64-NEXT:    ld.param.b64 %rd1, [applypriority_L2_param_0];
; CHECK-PTX64-NEXT:    applypriority.L2::evict_normal [%rd1], 128;
; CHECK-PTX64-NEXT:    ret;
  tail call void @llvm.nvvm.applypriority.L2.evict.normal(ptr %ptr, i64 128)
  ret void
}