test/CodeGen/Mips/vararg.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips3 -target-abi o32 < %s | FileCheck %s -check-prefixes=MIPS3-O32
; RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips3 -target-abi n32 < %s | FileCheck %s -check-prefixes=MIPS3-N32
; RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips3 -target-abi n64 < %s | FileCheck %s -check-prefixes=MIPS3-N64

define void @func(ptr nocapture %x, ...) nounwind {
; MIPS3-O32-LABEL: func:
; MIPS32-O32:       # %bb.0: # %entry
; MIPS32-O32-NEXT:    addiu $sp, $sp, -48
; MIPS32-O32-NEXT:    sd $11, 56($sp)
; MIPS32-O32-NEXT:    sd $10, 48($sp)
; MIPS32-O32-NEXT:    sd $9, 40($sp)
; MIPS32-O32-NEXT:    sd $8, 32($sp)
; MIPS32-O32-NEXT:    sd $7, 24($sp)
; MIPS32-O32-NEXT:    sd $6, 16($sp)
; MIPS32-O32-NEXT:    sd $5, 8($sp)
; MIPS32-O32-NEXT:    sw $4, 4($sp)
; MIPS32-O32-NEXT:    jr $ra
; MIPS32-O32-NEXT:    addiu $sp, $sp, 48
;
; MIPS3-N32-LABEL: func:
; MIPS32-N32:       # %bb.0: # %entry
; MIPS32-N32-NEXT:    addiu $sp, $sp, -64
; MIPS32-N32-NEXT:    sd $11, 56($sp)
; MIPS32-N32-NEXT:    sd $10, 48($sp)
; MIPS32-N32-NEXT:    sd $9, 40($sp)
; MIPS32-N32-NEXT:    sd $8, 32($sp)
; MIPS32-N32-NEXT:    sd $7, 24($sp)
; MIPS32-N32-NEXT:    sd $6, 16($sp)
; MIPS32-N32-NEXT:    sd $5, 8($sp)
; MIPS32-N32-NEXT:    sw $4, 4($sp)
; MIPS32-N32-NEXT:    jr $ra
; MIPS32-N32-NEXT:    addiu $sp, $sp, 64
;
; MIPS3-N64-LABEL: func:
; MIPS32-N64:       # %bb.0: # %entry
; MIPS32-N64-NEXT:    addiu $sp, $sp, -64
; MIPS32-N64-NEXT:    sdl $4, 7($sp)
; MIPS32-N64-NEXT:    sd $11, 56($sp)
; MIPS32-N64-NEXT:    sd $10, 48($sp)
; MIPS32-N64-NEXT:    sd $9, 40($sp)
; MIPS32-N64-NEXT:    sd $8, 32($sp)
; MIPS32-N64-NEXT:    sd $7, 24($sp)
; MIPS32-N64-NEXT:    sd $6, 16($sp)
; MIPS32-N64-NEXT:    sd $5, 8($sp)
; MIPS32-N64-NEXT:    sw $4, 4($sp)
; MIPS32-N64-NEXT:    jr $ra
; MIPS32-N64-NEXT:    addiu $sp, $sp, 64

entry:
  %x.addr = alloca ptr, align 4
  store ptr %x, ptr %x.addr, align 4
  ret void
}