test/CodeGen/AMDGPU/wqm-demote-split-debug.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgpu11.00 -passes=si-wqm -o - %s | FileCheck %s

# The block is split after the lowered demote. Check that this works when the
# new block starts with a debug instruction, which has no slot index, both when
# the debug instruction is the only instruction in the new block and when it is
# followed by an instruction that does have a slot index.

--- |
  define amdgpu_ps void @demote_then_debug_value(float %x, float %y) !dbg !5 {
    ret void
  }

  define amdgpu_ps void @demote_then_debug_value_then_nop(float %x, float %y) !dbg !11 {
    ret void
  }

  !llvm.dbg.cu = !{!0}
  !llvm.module.flags = !{!3, !4}

  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
  !1 = !DIFile(filename: "t.c", directory: "/tmp")
  !3 = !{i32 2, !"Debug Info Version", i32 3}
  !4 = !{i32 7, !"Dwarf Version", i32 5}
  !5 = distinct !DISubprogram(name: "demote_then_debug_value", scope: !1, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
  !6 = !DISubroutineType(types: !7)
  !7 = !{null}
  !8 = !DILocalVariable(name: "y", scope: !5, file: !1, line: 1, type: !10)
  !9 = !DILocation(line: 2, column: 1, scope: !5)
  !10 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
  !11 = distinct !DISubprogram(name: "demote_then_debug_value_then_nop", scope: !1, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
  !12 = !DILocalVariable(name: "y", scope: !11, file: !1, line: 1, type: !10)
  !13 = !DILocation(line: 2, column: 1, scope: !11)
...
---
name:            demote_then_debug_value
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: demote_then_debug_value
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_32 = COPY $exec_lo
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  ; CHECK-NEXT:   [[V_CMP_GT_F32_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, 0, 0, [[COPY2]], 0, implicit $mode, implicit $exec
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $exec_lo, implicit-def $exec_lo
  ; CHECK-NEXT:   [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY3]], [[V_CMP_GT_F32_e64_]], implicit-def dead $scc
  ; CHECK-NEXT:   [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_AND_B32_]], [[COPY3]], implicit-def dead $scc
  ; CHECK-NEXT:   $exec_lo = S_MOV_B32_term [[S_AND_B32_]]
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT:   S_BRANCH %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   dead [[COPY:%[0-9]+]]:sreg_32 = S_ANDN2_B32 [[COPY]], $exec_lo, implicit-def $scc
  ; CHECK-NEXT:   SI_EARLY_TERMINATE_SCC0 implicit $exec, implicit $scc
  ; CHECK-NEXT:   $exec_lo = S_MOV_B32_term 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   DBG_VALUE [[COPY1]], $noreg, !8, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !4)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   $exec_lo = S_OR_B32 $exec_lo, [[S_XOR_B32_]], implicit-def dead $scc
  ; CHECK-NEXT:   [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY2]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec, debug-location !DILocation(line: 2, column: 1, scope: !4)
  ; CHECK-NEXT:   EXP_DONE 0, [[V_ADD_F32_e64_]], [[V_ADD_F32_e64_]], [[V_ADD_F32_e64_]], [[V_ADD_F32_e64_]], -1, 0, 15, implicit $exec
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $vgpr0, $vgpr1

    %2:vgpr_32 = COPY $vgpr1
    %1:vgpr_32 = COPY $vgpr0
    %4:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, 0, 0, %1, 0, implicit $mode, implicit $exec
    %7:sreg_32 = COPY $exec_lo, implicit-def $exec_lo
    %8:sreg_32 = S_AND_B32 %7, %4, implicit-def dead $scc
    %0:sreg_32 = S_XOR_B32 %8, %7, implicit-def dead $scc
    $exec_lo = S_MOV_B32_term %8
    S_CBRANCH_EXECZ %bb.2, implicit $exec
    S_BRANCH %bb.1

  bb.1:
    successors: %bb.2(0x80000000)

    SI_DEMOTE_I1 0, 0, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    DBG_VALUE %2, $noreg, !8, !DIExpression(), debug-location !9

  bb.2:
    $exec_lo = S_OR_B32 $exec_lo, %0, implicit-def dead $scc
    %6:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec, debug-location !9
    EXP_DONE 0, %6, %6, %6, %6, -1, 0, 15, implicit $exec
    S_ENDPGM 0
...
---
name:            demote_then_debug_value_then_nop
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: demote_then_debug_value_then_nop
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT:   liveins: $vgpr0, $vgpr1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_32 = COPY $exec_lo
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  ; CHECK-NEXT:   [[V_CMP_GT_F32_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, 0, 0, [[COPY2]], 0, implicit $mode, implicit $exec
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:sreg_32 = COPY $exec_lo, implicit-def $exec_lo
  ; CHECK-NEXT:   [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY3]], [[V_CMP_GT_F32_e64_]], implicit-def dead $scc
  ; CHECK-NEXT:   [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_AND_B32_]], [[COPY3]], implicit-def dead $scc
  ; CHECK-NEXT:   $exec_lo = S_MOV_B32_term [[S_AND_B32_]]
  ; CHECK-NEXT:   S_CBRANCH_EXECZ %bb.2, implicit $exec
  ; CHECK-NEXT:   S_BRANCH %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   dead [[COPY:%[0-9]+]]:sreg_32 = S_ANDN2_B32 [[COPY]], $exec_lo, implicit-def $scc
  ; CHECK-NEXT:   SI_EARLY_TERMINATE_SCC0 implicit $exec, implicit $scc
  ; CHECK-NEXT:   $exec_lo = S_MOV_B32_term 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   DBG_VALUE [[COPY1]], $noreg, !8, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !7)
  ; CHECK-NEXT:   S_NOP 0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   $exec_lo = S_OR_B32 $exec_lo, [[S_XOR_B32_]], implicit-def dead $scc
  ; CHECK-NEXT:   [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY2]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec, debug-location !DILocation(line: 2, column: 1, scope: !7)
  ; CHECK-NEXT:   EXP_DONE 0, [[V_ADD_F32_e64_]], [[V_ADD_F32_e64_]], [[V_ADD_F32_e64_]], [[V_ADD_F32_e64_]], -1, 0, 15, implicit $exec
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $vgpr0, $vgpr1

    %2:vgpr_32 = COPY $vgpr1
    %1:vgpr_32 = COPY $vgpr0
    %4:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, 0, 0, %1, 0, implicit $mode, implicit $exec
    %7:sreg_32 = COPY $exec_lo, implicit-def $exec_lo
    %8:sreg_32 = S_AND_B32 %7, %4, implicit-def dead $scc
    %0:sreg_32 = S_XOR_B32 %8, %7, implicit-def dead $scc
    $exec_lo = S_MOV_B32_term %8
    S_CBRANCH_EXECZ %bb.2, implicit $exec
    S_BRANCH %bb.1

  bb.1:
    successors: %bb.2(0x80000000)

    SI_DEMOTE_I1 0, 0, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    DBG_VALUE %2, $noreg, !12, !DIExpression(), debug-location !13
    S_NOP 0

  bb.2:
    $exec_lo = S_OR_B32 $exec_lo, %0, implicit-def dead $scc
    %6:vgpr_32 = nofpexcept V_ADD_F32_e64 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec, debug-location !13
    EXP_DONE 0, %6, %6, %6, %6, -1, 0, 15, implicit $exec
    S_ENDPGM 0
...