| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 |
| ; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -stop-after=amdgpu-isel < %s | FileCheck -check-prefixes=GCN-ISEL %s |
| ; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck %s |
| ; Ensure that S_UADDO_PSEUDO is selected when carryout user is S_ADD_CO_PSEUDO |
| |
| ; GCN-ISEL-LABEL: name: s_uaddo_pseudo |
| ; GCN-ISEL-LABEL: body: |
| ; GCN-ISEL: S_UADDO_PSEUDO |
| ; GCN-ISEL: S_ADD_CO_PSEUDO |
| |
| define amdgpu_ps i32 @s_uaddo_pseudo(i32 inreg %val0) { |
| ; CHECK-LABEL: s_uaddo_pseudo: |
| ; CHECK: ; %bb.0: |
| ; CHECK-NEXT: s_add_u32 s0, s0, 1 |
| ; CHECK-NEXT: s_cselect_b64 s[0:1], -1, 0 |
| ; CHECK-NEXT: s_cmp_lg_u64 s[0:1], 0 |
| ; CHECK-NEXT: s_addc_u32 s0, 1, 0 |
| ; CHECK-NEXT: ; return to shader part epilog |
| %pair = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %val0, i32 1) |
| %carryout = extractvalue { i32, i1 } %pair, 1 |
| %zext_carryout = zext i1 %carryout to i32 |
| %result = add i32 %zext_carryout, 1 |
| ret i32 %result |
| } |
| |
| ; GCN-ISEL-LABEL: name: s_usubo_pseudo |
| ; GCN-ISEL-LABEL: body: |
| ; GCN-ISEL: S_USUBO_PSEUDO |
| ; GCN-ISEL: S_SUB_CO_PSEUDO |
| |
| define amdgpu_ps i32 @s_usubo_pseudo(i32 inreg %val0, i32 inreg %val1) { |
| ; CHECK-LABEL: s_usubo_pseudo: |
| ; CHECK: ; %bb.0: |
| ; CHECK-NEXT: s_sub_u32 s0, s0, 1 |
| ; CHECK-NEXT: s_cselect_b64 s[2:3], -1, 0 |
| ; CHECK-NEXT: s_cmp_lg_u64 s[2:3], 0 |
| ; CHECK-NEXT: s_subb_u32 s0, s1, 0 |
| ; CHECK-NEXT: ; return to shader part epilog |
| %pair = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %val0, i32 1) |
| %carryout = extractvalue { i32, i1 } %pair, 1 |
| %zext_carryout = zext i1 %carryout to i32 |
| %result = sub i32 %val1, %zext_carryout |
| ret i32 %result |
| } |
| ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: |
| ; GCN-ISEL: {{.*}} |