test/CodeGen/AMDGPU/process-implicit-defs-set-dead.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgpu9.00 -passes=process-implicit-defs -o - %s | FileCheck %s

# Successor live-ins given as a super-register with a lane mask.

---
name:            livein_super_lanemask_covers
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: livein_super_lanemask_covers
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $sgpr0 = IMPLICIT_DEF
  ; CHECK-NEXT:   $sgpr2 = COPY undef $sgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   liveins: $sgpr2, $sgpr0_sgpr1:0x0000000000000003
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_ENDPGM 0, implicit $sgpr2, implicit $sgpr0
  bb.0:
    successors: %bb.1

    $sgpr0 = IMPLICIT_DEF
    $sgpr2 = COPY $sgpr0

  bb.1:
    liveins: $sgpr2, $sgpr0_sgpr1:0x0000000000000003

    S_ENDPGM 0, implicit $sgpr2, implicit $sgpr0
...
---
name:            livein_super_lanemask_disjoint
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: livein_super_lanemask_disjoint
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $sgpr2 = COPY undef $sgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   liveins: $sgpr2, $sgpr0_sgpr1:0x000000000000000C
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_ENDPGM 0, implicit $sgpr2, implicit $sgpr1
  bb.0:
    successors: %bb.1

    $sgpr0 = IMPLICIT_DEF
    $sgpr2 = COPY $sgpr0

  bb.1:
    liveins: $sgpr2, $sgpr0_sgpr1:0x000000000000000C

    S_ENDPGM 0, implicit $sgpr2, implicit $sgpr1
...

---
name:            reserved_reg
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: reserved_reg
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $flat_scr = IMPLICIT_DEF
  ; CHECK-NEXT:   $sgpr20_sgpr21 = COPY undef $flat_scr
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   liveins: $sgpr20_sgpr21
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_ENDPGM 0, implicit $sgpr20_sgpr21
  bb.0:
    $flat_scr = IMPLICIT_DEF
    $sgpr20_sgpr21 = COPY $flat_scr

  bb.1:
    liveins: $sgpr20_sgpr21

    S_ENDPGM 0, implicit $sgpr20_sgpr21
...


---
name:            no_tracksRegLiveness
tracksRegLiveness: false
body:             |
  ; CHECK-LABEL: name: no_tracksRegLiveness
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $sgpr0 = IMPLICIT_DEF
  ; CHECK-NEXT:   $sgpr2 = COPY undef $sgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   S_ENDPGM 0, implicit $sgpr2
  bb.0:
    successors: %bb.1

    $sgpr0 = IMPLICIT_DEF
    $sgpr2 = COPY $sgpr0

  bb.1:
    S_ENDPGM 0, implicit $sgpr2
...