Google GitGoogle Git
Sign in
llvm/llvm-project/llvm/refs/heads/master/./test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
blob: a14c7ec2644608e2fc108d0c22c687d9dc380f52 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=amdgpu9.00-amd-amdhsa < %s | FileCheck -check-prefix=GFX9 %s
; RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s
; RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s
define half @test_bitextract_half_full(b16 %src) {
; GFX9-LABEL: test_bitextract_half_full:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_half_full:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract half, b16 %src, i32 0
ret half %result
}
define float @test_bitextract_float_full(b32 %src) {
; GFX9-LABEL: test_bitextract_float_full:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_float_full:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract float, b32 %src, i32 0
ret float %result
}
define float @test_bitextract_float_const(b64 %src) {
; GFX9-LABEL: test_bitextract_float_const:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_float_const:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract float, b64 %src, i32 32
ret float %result
}
define float @test_bitextract_float_var(b64 %src, i32 %off) {
; GFX9-LABEL: test_bitextract_float_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_lshrrev_b64 v[0:1], v2, v[0:1]
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_float_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_lshrrev_b64 v[0:1], v2, v[0:1]
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract float, b64 %src, i32 %off
ret float %result
}
define float @test_bitextract_float_b87_var(b87 %src, i32 %off) {
; GFX9-LABEL: test_bitextract_float_b87_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_and_b32_e32 v4, 0x7fffff, v2
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_sub_u32_e32 v2, 64, v3
; GFX9-NEXT: v_lshlrev_b64 v[6:7], v2, v[4:5]
; GFX9-NEXT: v_lshrrev_b64 v[1:2], v3, v[0:1]
; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v3
; GFX9-NEXT: v_or_b32_e32 v6, v1, v6
; GFX9-NEXT: v_subrev_u32_e32 v1, 64, v3
; GFX9-NEXT: v_lshrrev_b64 v[1:2], v1, v[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_float_b87_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v4, 0x7fffff, v2
; GFX12-NEXT: v_sub_nc_u32_e32 v6, 64, v3
; GFX12-NEXT: v_lshrrev_b64 v[1:2], v3, v[0:1]
; GFX12-NEXT: v_subrev_nc_u32_e32 v2, 64, v3
; GFX12-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v3
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-NEXT: v_lshlrev_b64_e32 v[6:7], v6, v[4:5]
; GFX12-NEXT: v_lshrrev_b64 v[4:5], v2, v[4:5]
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX12-NEXT: v_or_b32_e32 v1, v1, v6
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc_lo
; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v3
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc_lo
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract float, b87 %src, i32 %off
ret float %result
}
define float @test_bitextract_float_b87_crossword(b87 %src) {
; GFX9-LABEL: test_bitextract_float_b87_crossword:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_alignbit_b32 v0, v2, v1, 23
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_float_b87_crossword:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_alignbit_b32 v0, v2, v1, 23
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract float, b87 %src, i32 55
ret float %result
}
define double @test_bitextract_double_full(b64 %src) {
; GFX9-LABEL: test_bitextract_double_full:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_double_full:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract double, b64 %src, i32 0
ret double %result
}
define double @test_bitextract_double_const(b128 %src) {
; GFX9-LABEL: test_bitextract_double_const:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v3
; GFX9-NEXT: v_mov_b32_e32 v0, v2
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_double_const:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract double, b128 %src, i32 64
ret double %result
}
define double @test_bitextract_double_var(b128 %src, i32 %off) {
; GFX9-LABEL: test_bitextract_double_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_sub_u32_e32 v5, 64, v4
; GFX9-NEXT: v_lshlrev_b64 v[5:6], v5, v[2:3]
; GFX9-NEXT: v_lshrrev_b64 v[7:8], v4, v[0:1]
; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v4
; GFX9-NEXT: v_or_b32_e32 v5, v7, v5
; GFX9-NEXT: v_subrev_u32_e32 v7, 64, v4
; GFX9-NEXT: v_lshrrev_b64 v[2:3], v7, v[2:3]
; GFX9-NEXT: v_or_b32_e32 v6, v8, v6
; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v1, v2, v1, s[4:5]
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_double_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_sub_nc_u32_e32 v7, 64, v4
; GFX12-NEXT: v_lshrrev_b64 v[5:6], v4, v[0:1]
; GFX12-NEXT: v_subrev_nc_u32_e32 v9, 64, v4
; GFX12-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v4
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-NEXT: v_lshlrev_b64_e32 v[7:8], v7, v[2:3]
; GFX12-NEXT: v_lshrrev_b64 v[2:3], v9, v[2:3]
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-NEXT: v_or_b32_e32 v6, v6, v8
; GFX12-NEXT: v_or_b32_e32 v5, v5, v7
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
; GFX12-NEXT: v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v2, v2, v5
; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v4
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_dual_cndmask_b32 v0, v2, v0 :: v_dual_cndmask_b32 v1, v3, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract double, b128 %src, i32 %off
ret double %result
}
define double @test_bitextract_double_b231_var(b231 %src, i32 %off) {
; GFX9-LABEL: test_bitextract_double_b231_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v9, 0
; GFX9-NEXT: v_and_b32_e32 v7, 0x7f, v7
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:56
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:48
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:40
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:32
; GFX9-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:24
; GFX9-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:16
; GFX9-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:60
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:52
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:44
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:36
; GFX9-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:20
; GFX9-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:12
; GFX9-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:28
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 3, v8
; GFX9-NEXT: v_and_b32_e32 v0, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e64 v1, 6, s32
; GFX9-NEXT: v_add_u32_e32 v4, v0, v1
; GFX9-NEXT: buffer_load_dword v0, v4, s[0:3], 0 offen
; GFX9-NEXT: buffer_load_dword v2, v4, s[0:3], 0 offen offset:8
; GFX9-NEXT: buffer_load_dword v3, v4, s[0:3], 0 offen offset:12
; GFX9-NEXT: buffer_load_dword v1, v4, s[0:3], 0 offen offset:4
; GFX9-NEXT: v_and_b32_e32 v4, 63, v8
; GFX9-NEXT: v_xor_b32_e32 v4, 63, v4
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b64 v[0:1], v8, v[0:1]
; GFX9-NEXT: v_lshlrev_b64 v[2:3], v4, v[2:3]
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_or_b32_e32 v0, v0, v2
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitextract_double_b231_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: v_lshrrev_b32_e32 v11, 3, v8
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_mov_b32 s1, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_dual_mov_b32 v10, s1 :: v_dual_and_b32 v7, 0x7f, v7
; GFX12-NEXT: v_mov_b32_e32 v9, s0
; GFX12-NEXT: s_clause 0x3
; GFX12-NEXT: scratch_store_b64 off, v[4:5], s32 offset:16
; GFX12-NEXT: scratch_store_b64 off, v[2:3], s32 offset:8
; GFX12-NEXT: scratch_store_b64 off, v[0:1], s32
; GFX12-NEXT: scratch_store_b64 off, v[6:7], s32 offset:24
; GFX12-NEXT: v_and_b32_e32 v4, 63, v8
; GFX12-NEXT: s_clause 0x3
; GFX12-NEXT: scratch_store_b64 off, v[9:10], s32 offset:56
; GFX12-NEXT: scratch_store_b64 off, v[9:10], s32 offset:48
; GFX12-NEXT: scratch_store_b64 off, v[9:10], s32 offset:40
; GFX12-NEXT: scratch_store_b64 off, v[9:10], s32 offset:32
; GFX12-NEXT: v_and_b32_e32 v9, 24, v11
; GFX12-NEXT: v_xor_b32_e32 v4, 63, v4
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: scratch_load_b64 v[0:1], v9, s32 offset:8
; GFX12-NEXT: scratch_load_b64 v[2:3], v9, s32
; GFX12-NEXT: s_wait_loadcnt 0x1
; GFX12-NEXT: v_lshlrev_b64_e32 v[0:1], 1, v[0:1]
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_lshrrev_b64 v[2:3], v8, v[2:3]
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-NEXT: v_lshlrev_b64_e32 v[0:1], v4, v[0:1]
; GFX12-NEXT: v_or_b32_e32 v0, v2, v0
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-NEXT: v_or_b32_e32 v1, v3, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitextract double, b231 %src, i32 %off
ret double %result
}
define b16 @test_bitinsert_half_full(b16 %base, half %val) {
; GFX9-LABEL: test_bitinsert_half_full:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_half_full:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b16 %base, half %val, i32 0
ret b16 %result
}
define b32 @test_bitinsert_half_var(b32 %base, half %val, i32 %off) {
; GFX9-LABEL: test_bitinsert_half_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_mov_b32 s4, 0xffff
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s4
; GFX9-NEXT: v_not_b32_e32 v2, v2
; GFX9-NEXT: v_and_or_b32 v0, v0, v2, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-TRUE16-LABEL: test_bitinsert_half_var:
; GFX12-TRUE16: ; %bb.0:
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
; GFX12-TRUE16-NEXT: v_cvt_u32_u16_e32 v1, v1.l
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e64 v3, v2, 0xffff
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, v2, v1
; GFX12-TRUE16-NEXT: v_not_b32_e32 v2, v3
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-TRUE16-NEXT: v_and_or_b32 v0, v0, v2, v1
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-FAKE16-LABEL: test_bitinsert_half_var:
; GFX12-FAKE16: ; %bb.0:
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e64 v3, v2, 0xffff
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v1, v2, v1
; GFX12-FAKE16-NEXT: v_not_b32_e32 v2, v3
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_and_or_b32 v0, v0, v2, v1
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b32 %base, half %val, i32 %off
ret b32 %result
}
define b32 @test_bitinsert_float_full(b32 %base, float %val) {
; GFX9-LABEL: test_bitinsert_float_full:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_float_full:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b32 %base, float %val, i32 0
ret b32 %result
}
define b64 @test_bitinsert_float_const(b64 %base, float %val) {
; GFX9-LABEL: test_bitinsert_float_const:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v2
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_float_const:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v1, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b64 %base, float %val, i32 32
ret b64 %result
}
define b64 @test_bitinsert_float_var(b64 %base, float %val, i32 %off) {
; GFX9-LABEL: test_bitinsert_float_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v4, v3
; GFX9-NEXT: s_mov_b64 s[4:5], 0xffffffff
; GFX9-NEXT: v_lshlrev_b64 v[5:6], v4, s[4:5]
; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: v_lshlrev_b64 v[2:3], v4, v[2:3]
; GFX9-NEXT: v_bfi_b32 v1, v6, 0, v1
; GFX9-NEXT: v_bfi_b32 v0, v5, 0, v0
; GFX9-NEXT: v_or_b32_e32 v1, v1, v3
; GFX9-NEXT: v_or_b32_e32 v0, v0, v2
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_float_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v4, v3 :: v_dual_mov_b32 v3, 0
; GFX12-NEXT: s_mov_b64 s[0:1], 0xffffffff
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-NEXT: v_lshlrev_b64_e64 v[5:6], v4, s[0:1]
; GFX12-NEXT: v_lshlrev_b64_e32 v[2:3], v4, v[2:3]
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-NEXT: v_bfi_b32 v0, v5, 0, v0
; GFX12-NEXT: v_bfi_b32 v1, v6, 0, v1
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-NEXT: v_or_b32_e32 v0, v0, v2
; GFX12-NEXT: v_or_b32_e32 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b64 %base, float %val, i32 %off
ret b64 %result
}
define b87 @test_bitinsert_float_b87_var(b87 %base, float %val, i32 %off) {
; GFX9-LABEL: test_bitinsert_float_b87_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v4
; GFX9-NEXT: s_mov_b64 s[4:5], 0xffffffff
; GFX9-NEXT: v_lshlrev_b64 v[6:7], v5, s[4:5]
; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v5
; GFX9-NEXT: v_cndmask_b32_e32 v4, 0, v7, vcc
; GFX9-NEXT: v_bfi_b32 v1, v4, 0, v1
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_cndmask_b32_e32 v8, 0, v6, vcc
; GFX9-NEXT: v_lshlrev_b64 v[6:7], v5, v[3:4]
; GFX9-NEXT: v_sub_u32_e32 v9, 64, v5
; GFX9-NEXT: v_cndmask_b32_e32 v7, 0, v7, vcc
; GFX9-NEXT: v_bfi_b32 v0, v8, 0, v0
; GFX9-NEXT: v_cndmask_b32_e32 v8, 0, v6, vcc
; GFX9-NEXT: v_or_b32_e32 v1, v1, v7
; GFX9-NEXT: v_lshrrev_b64 v[6:7], v9, v[3:4]
; GFX9-NEXT: v_subrev_u32_e32 v7, 64, v5
; GFX9-NEXT: v_lshlrev_b64 v[3:4], v7, v[3:4]
; GFX9-NEXT: v_or_b32_e32 v0, v0, v8
; GFX9-NEXT: v_cndmask_b32_e32 v8, v3, v6, vcc
; GFX9-NEXT: v_lshrrev_b64 v[3:4], v9, s[4:5]
; GFX9-NEXT: v_lshlrev_b64 v[6:7], v7, s[4:5]
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v5
; GFX9-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, 0, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v4, v8, 0, s[4:5]
; GFX9-NEXT: v_not_b32_e32 v3, v3
; GFX9-NEXT: v_and_or_b32 v2, v2, v3, v4
; GFX9-NEXT: v_and_b32_e32 v2, 0x7fffff, v2
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_float_b87_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v5, v4 :: v_dual_mov_b32 v4, 0
; GFX12-NEXT: s_mov_b64 s[0:1], 0xffffffff
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_sub_nc_u32_e32 v11, 64, v5
; GFX12-NEXT: v_subrev_nc_u32_e32 v12, 64, v5
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_lshlrev_b64_e64 v[6:7], v5, s[0:1]
; GFX12-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v5
; GFX12-NEXT: v_lshrrev_b64 v[8:9], v11, v[3:4]
; GFX12-NEXT: v_lshlrev_b64_e32 v[9:10], v12, v[3:4]
; GFX12-NEXT: v_lshrrev_b64 v[10:11], v11, s[0:1]
; GFX12-NEXT: v_lshlrev_b64_e64 v[11:12], v12, s[0:1]
; GFX12-NEXT: v_lshlrev_b64_e32 v[3:4], v5, v[3:4]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: v_cndmask_b32_e32 v7, 0, v7, vcc_lo
; GFX12-NEXT: v_cmp_eq_u32_e64 s0, 0, v5
; GFX12-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc_lo
; GFX12-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc_lo
; GFX12-NEXT: v_dual_cndmask_b32 v9, v11, v10 :: v_dual_cndmask_b32 v4, 0, v4
; GFX12-NEXT: v_bfi_b32 v1, v7, 0, v1
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-NEXT: v_cndmask_b32_e64 v8, v8, 0, s0
; GFX12-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc_lo
; GFX12-NEXT: v_cndmask_b32_e64 v9, v9, 0, s0
; GFX12-NEXT: v_bfi_b32 v0, v6, 0, v0
; GFX12-NEXT: v_or_b32_e32 v1, v1, v4
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-NEXT: v_not_b32_e32 v5, v9
; GFX12-NEXT: v_or_b32_e32 v0, v0, v3
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX12-NEXT: v_and_or_b32 v2, v2, v5, v8
; GFX12-NEXT: v_and_b32_e32 v2, 0x7fffff, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b87 %base, float %val, i32 %off
ret b87 %result
}
define b64 @test_bitinsert_double_full(b64 %base, double %val) {
; GFX9-LABEL: test_bitinsert_double_full:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v3
; GFX9-NEXT: v_mov_b32_e32 v0, v2
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_double_full:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v0, v2
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b64 %base, double %val, i32 0
ret b64 %result
}
define b128 @test_bitinsert_double_const(b128 %base, double %val) {
; GFX9-LABEL: test_bitinsert_double_const:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v3, v5
; GFX9-NEXT: v_mov_b32_e32 v2, v4
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_double_const:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_mov_b32 v3, v5 :: v_dual_mov_b32 v2, v4
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b128 %base, double %val, i32 64
ret b128 %result
}
define b128 @test_bitinsert_double_var(b128 %base, double %val, i32 %off) {
; GFX9-LABEL: test_bitinsert_double_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_sub_u32_e32 v11, 64, v6
; GFX9-NEXT: v_subrev_u32_e32 v12, 64, v6
; GFX9-NEXT: v_lshrrev_b64 v[7:8], v11, -1
; GFX9-NEXT: v_lshlrev_b64 v[9:10], v12, -1
; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v6
; GFX9-NEXT: v_cndmask_b32_e32 v8, v10, v8, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v6
; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, 0, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v7, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v13, v7, 0, s[4:5]
; GFX9-NEXT: v_bfi_b32 v3, v8, 0, v3
; GFX9-NEXT: v_lshrrev_b64 v[7:8], v11, v[4:5]
; GFX9-NEXT: v_lshlrev_b64 v[9:10], v12, v[4:5]
; GFX9-NEXT: v_lshlrev_b64 v[4:5], v6, v[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v10, v8, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, 0, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v7, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v9, v7, 0, s[4:5]
; GFX9-NEXT: v_or_b32_e32 v3, v3, v8
; GFX9-NEXT: v_lshlrev_b64 v[7:8], v6, -1
; GFX9-NEXT: v_bfi_b32 v2, v13, 0, v2
; GFX9-NEXT: v_cndmask_b32_e32 v8, 0, v8, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, 0, v7, vcc
; GFX9-NEXT: v_bfi_b32 v1, v8, 0, v1
; GFX9-NEXT: v_bfi_b32 v0, v7, 0, v0
; GFX9-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc
; GFX9-NEXT: v_or_b32_e32 v2, v2, v9
; GFX9-NEXT: v_or_b32_e32 v1, v1, v5
; GFX9-NEXT: v_or_b32_e32 v0, v0, v4
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_double_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_sub_nc_u32_e32 v13, 64, v6
; GFX12-NEXT: v_subrev_nc_u32_e32 v15, 64, v6
; GFX12-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v6
; GFX12-NEXT: v_lshlrev_b64_e64 v[11:12], v6, -1
; GFX12-NEXT: v_cmp_eq_u32_e64 s0, 0, v6
; GFX12-NEXT: v_lshrrev_b64 v[7:8], v13, -1
; GFX12-NEXT: v_lshlrev_b64_e64 v[9:10], v15, -1
; GFX12-NEXT: v_lshrrev_b64 v[13:14], v13, v[4:5]
; GFX12-NEXT: v_lshlrev_b64_e32 v[15:16], v15, v[4:5]
; GFX12-NEXT: v_lshlrev_b64_e32 v[4:5], v6, v[4:5]
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX12-NEXT: v_dual_cndmask_b32 v8, v10, v8 :: v_dual_cndmask_b32 v7, v9, v7
; GFX12-NEXT: v_dual_cndmask_b32 v6, v16, v14 :: v_dual_cndmask_b32 v9, 0, v12
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX12-NEXT: v_dual_cndmask_b32 v10, 0, v11 :: v_dual_cndmask_b32 v11, v15, v13
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-NEXT: v_cndmask_b32_e64 v8, v8, 0, s0
; GFX12-NEXT: v_cndmask_b32_e64 v7, v7, 0, s0
; GFX12-NEXT: v_bfi_b32 v1, v9, 0, v1
; GFX12-NEXT: v_bfi_b32 v0, v10, 0, v0
; GFX12-NEXT: v_dual_cndmask_b32 v4, 0, v4 :: v_dual_cndmask_b32 v5, 0, v5
; GFX12-NEXT: v_bfi_b32 v3, v8, 0, v3
; GFX12-NEXT: v_bfi_b32 v2, v7, 0, v2
; GFX12-NEXT: v_cndmask_b32_e64 v7, v11, 0, s0
; GFX12-NEXT: v_cndmask_b32_e64 v6, v6, 0, s0
; GFX12-NEXT: v_or_b32_e32 v0, v0, v4
; GFX12-NEXT: v_or_b32_e32 v1, v1, v5
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX12-NEXT: v_or_b32_e32 v2, v2, v7
; GFX12-NEXT: v_or_b32_e32 v3, v3, v6
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b128 %base, double %val, i32 %off
ret b128 %result
}
define b231 @test_bitinsert_double_b231_var(b231 %base, double %val, i32 %off) {
; GFX9-LABEL: test_bitinsert_double_b231_var:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v11, 0
; GFX9-NEXT: v_mov_b32_e32 v12, -1
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:60
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:52
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:44
; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:36
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:28
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:20
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:12
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:4
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:56
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:48
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:40
; GFX9-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:32
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:24
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:16
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:8
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:124
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:116
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:108
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:92
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:84
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:76
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:68
; GFX9-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:120
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:104
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:88
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:80
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:72
; GFX9-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:64
; GFX9-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96
; GFX9-NEXT: s_lshr_b32 s5, s32, 6
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 3, v10
; GFX9-NEXT: s_add_i32 s4, s5, 32
; GFX9-NEXT: v_and_b32_e32 v17, 24, v8
; GFX9-NEXT: v_sub_u32_e32 v11, s4, v17
; GFX9-NEXT: buffer_load_dword v13, v11, s[0:3], 0 offen offset:28
; GFX9-NEXT: buffer_load_dword v9, v11, s[0:3], 0 offen offset:20
; GFX9-NEXT: buffer_load_dword v8, v11, s[0:3], 0 offen offset:16
; GFX9-NEXT: buffer_load_dword v12, v11, s[0:3], 0 offen offset:24
; GFX9-NEXT: v_and_b32_e32 v14, 63, v10
; GFX9-NEXT: s_lshr_b32 s5, s32, 6
; GFX9-NEXT: v_xor_b32_e32 v23, 63, v14
; GFX9-NEXT: s_add_i32 s4, s5, 0x60
; GFX9-NEXT: v_sub_u32_e32 v24, s4, v17
; GFX9-NEXT: buffer_load_dword v14, v11, s[0:3], 0 offen offset:12
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_lshrrev_b64 v[15:16], 1, v[8:9]
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_lshlrev_b64 v[12:13], v10, v[12:13]
; GFX9-NEXT: v_lshrrev_b64 v[15:16], v23, v[15:16]
; GFX9-NEXT: v_lshlrev_b64 v[8:9], v10, v[8:9]
; GFX9-NEXT: v_or_b32_e32 v17, v13, v16
; GFX9-NEXT: v_or_b32_e32 v19, v12, v15
; GFX9-NEXT: buffer_load_dword v13, v24, s[0:3], 0 offen offset:28
; GFX9-NEXT: buffer_load_dword v16, v24, s[0:3], 0 offen offset:20
; GFX9-NEXT: buffer_load_dword v15, v24, s[0:3], 0 offen offset:16
; GFX9-NEXT: buffer_load_dword v12, v24, s[0:3], 0 offen offset:24
; GFX9-NEXT: buffer_load_dword v18, v24, s[0:3], 0 offen offset:12
; GFX9-NEXT: v_xor_b32_e32 v17, 0x7f, v17
; GFX9-NEXT: v_not_b32_e32 v19, v19
; GFX9-NEXT: v_and_b32_e32 v17, v7, v17
; GFX9-NEXT: v_and_b32_e32 v19, v6, v19
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_lshrrev_b64 v[6:7], 1, v[15:16]
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_lshlrev_b64 v[12:13], v10, v[12:13]
; GFX9-NEXT: v_lshrrev_b64 v[6:7], v23, v[6:7]
; GFX9-NEXT: v_or3_b32 v7, v13, v7, v17
; GFX9-NEXT: v_or3_b32 v6, v12, v6, v19
; GFX9-NEXT: buffer_load_dword v20, v11, s[0:3], 0 offen offset:4
; GFX9-NEXT: buffer_load_dword v13, v11, s[0:3], 0 offen offset:8
; GFX9-NEXT: buffer_load_dword v19, v11, s[0:3], 0 offen
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_lshlrev_b64 v[21:22], v10, v[13:14]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b64 v[11:12], 1, v[19:20]
; GFX9-NEXT: v_lshrrev_b64 v[13:14], 1, v[13:14]
; GFX9-NEXT: v_lshrrev_b64 v[11:12], v23, v[11:12]
; GFX9-NEXT: v_lshrrev_b64 v[13:14], v23, v[13:14]
; GFX9-NEXT: v_or_b32_e32 v22, v22, v12
; GFX9-NEXT: v_or_b32_e32 v21, v21, v11
; GFX9-NEXT: buffer_load_dword v17, v24, s[0:3], 0 offen offset:8
; GFX9-NEXT: buffer_load_dword v12, v24, s[0:3], 0 offen offset:4
; GFX9-NEXT: buffer_load_dword v11, v24, s[0:3], 0 offen
; GFX9-NEXT: v_bfi_b32 v24, v22, 0, v3
; GFX9-NEXT: v_bfi_b32 v25, v21, 0, v2
; GFX9-NEXT: v_or_b32_e32 v14, v9, v14
; GFX9-NEXT: v_bfi_b32 v5, v14, 0, v5
; GFX9-NEXT: s_waitcnt vmcnt(2)
; GFX9-NEXT: v_lshlrev_b64 v[21:22], v10, v[17:18]
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b64 v[2:3], 1, v[11:12]
; GFX9-NEXT: v_lshrrev_b64 v[2:3], v23, v[2:3]
; GFX9-NEXT: v_or3_b32 v2, v21, v2, v25
; GFX9-NEXT: v_or_b32_e32 v21, v8, v13
; GFX9-NEXT: v_lshrrev_b64 v[8:9], 1, v[17:18]
; GFX9-NEXT: v_lshlrev_b64 v[13:14], v10, v[15:16]
; GFX9-NEXT: v_lshrrev_b64 v[8:9], v23, v[8:9]
; GFX9-NEXT: v_bfi_b32 v4, v21, 0, v4
; GFX9-NEXT: v_or3_b32 v5, v14, v9, v5
; GFX9-NEXT: v_lshlrev_b64 v[14:15], v10, v[19:20]
; GFX9-NEXT: v_or3_b32 v4, v13, v8, v4
; GFX9-NEXT: v_lshlrev_b64 v[8:9], v10, v[11:12]
; GFX9-NEXT: v_bfi_b32 v1, v15, 0, v1
; GFX9-NEXT: v_bfi_b32 v0, v14, 0, v0
; GFX9-NEXT: v_or3_b32 v3, v22, v3, v24
; GFX9-NEXT: v_or_b32_e32 v1, v1, v9
; GFX9-NEXT: v_or_b32_e32 v0, v0, v8
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_bitinsert_double_b231_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: s_mov_b32 s0, 0
; GFX12-NEXT: v_and_b32_e32 v25, 63, v10
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_mov_b32 s1, s0
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: v_dual_mov_b32 v11, -1 :: v_dual_mov_b32 v14, s1
; GFX12-NEXT: v_mov_b32_e32 v13, s0
; GFX12-NEXT: s_add_co_i32 s0, s32, 32
; GFX12-NEXT: s_add_co_i32 s1, s32, 0x60
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-NEXT: v_mov_b32_e32 v12, v11
; GFX12-NEXT: s_clause 0x3
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:56
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:48
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:40
; GFX12-NEXT: scratch_store_b64 off, v[11:12], s32 offset:32
; GFX12-NEXT: v_lshrrev_b32_e32 v11, 3, v10
; GFX12-NEXT: s_clause 0xb
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:24
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:16
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:8
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:120
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:112
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:104
; GFX12-NEXT: scratch_store_b64 off, v[8:9], s32 offset:96
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:88
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:80
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:72
; GFX12-NEXT: scratch_store_b64 off, v[13:14], s32 offset:64
; GFX12-NEXT: v_xor_b32_e32 v37, 63, v25
; GFX12-NEXT: v_and_b32_e32 v11, 24, v11
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_sub_nc_u32_e32 v19, s0, v11
; GFX12-NEXT: v_sub_nc_u32_e32 v23, s1, v11
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: scratch_load_b64 v[8:9], v19, off offset:24
; GFX12-NEXT: scratch_load_b64 v[11:12], v19, off offset:16
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: scratch_load_b64 v[13:14], v23, off offset:24
; GFX12-NEXT: scratch_load_b64 v[15:16], v23, off offset:16
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: scratch_load_b64 v[17:18], v19, off offset:8
; GFX12-NEXT: scratch_load_b64 v[19:20], v19, off
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: scratch_load_b64 v[21:22], v23, off offset:8
; GFX12-NEXT: scratch_load_b64 v[23:24], v23, off
; GFX12-NEXT: s_wait_loadcnt 0x7
; GFX12-NEXT: v_lshlrev_b64_e32 v[8:9], v10, v[8:9]
; GFX12-NEXT: s_wait_loadcnt 0x6
; GFX12-NEXT: v_lshrrev_b64 v[25:26], 1, v[11:12]
; GFX12-NEXT: v_lshlrev_b64_e32 v[11:12], v10, v[11:12]
; GFX12-NEXT: s_wait_loadcnt 0x4
; GFX12-NEXT: v_lshrrev_b64 v[27:28], 1, v[15:16]
; GFX12-NEXT: s_wait_loadcnt 0x3
; GFX12-NEXT: v_lshlrev_b64_e32 v[29:30], v10, v[17:18]
; GFX12-NEXT: s_wait_loadcnt 0x2
; GFX12-NEXT: v_lshrrev_b64 v[31:32], 1, v[19:20]
; GFX12-NEXT: v_lshrrev_b64 v[17:18], 1, v[17:18]
; GFX12-NEXT: v_lshlrev_b64_e32 v[19:20], v10, v[19:20]
; GFX12-NEXT: v_lshrrev_b64 v[25:26], v37, v[25:26]
; GFX12-NEXT: s_wait_loadcnt 0x0
; GFX12-NEXT: v_lshrrev_b64 v[35:36], 1, v[23:24]
; GFX12-NEXT: v_lshlrev_b64_e32 v[23:24], v10, v[23:24]
; GFX12-NEXT: v_lshrrev_b64 v[31:32], v37, v[31:32]
; GFX12-NEXT: v_lshrrev_b64 v[17:18], v37, v[17:18]
; GFX12-NEXT: v_bfi_b32 v0, v19, 0, v0
; GFX12-NEXT: v_or_b32_e32 v9, v9, v26
; GFX12-NEXT: v_or_b32_e32 v8, v8, v25
; GFX12-NEXT: v_lshlrev_b64_e32 v[33:34], v10, v[21:22]
; GFX12-NEXT: v_lshrrev_b64 v[21:22], 1, v[21:22]
; GFX12-NEXT: v_lshlrev_b64_e32 v[13:14], v10, v[13:14]
; GFX12-NEXT: v_lshlrev_b64_e32 v[15:16], v10, v[15:16]
; GFX12-NEXT: v_or_b32_e32 v0, v0, v23
; GFX12-NEXT: v_or_b32_e32 v10, v30, v32
; GFX12-NEXT: v_or_b32_e32 v23, v29, v31
; GFX12-NEXT: v_or_b32_e32 v12, v12, v18
; GFX12-NEXT: v_or_b32_e32 v11, v11, v17
; GFX12-NEXT: v_xor_b32_e32 v9, 0x7f, v9
; GFX12-NEXT: v_not_b32_e32 v8, v8
; GFX12-NEXT: v_lshrrev_b64 v[27:28], v37, v[27:28]
; GFX12-NEXT: v_bfi_b32 v1, v20, 0, v1
; GFX12-NEXT: v_lshrrev_b64 v[19:20], v37, v[35:36]
; GFX12-NEXT: v_lshrrev_b64 v[21:22], v37, v[21:22]
; GFX12-NEXT: v_bfi_b32 v3, v10, 0, v3
; GFX12-NEXT: v_bfi_b32 v2, v23, 0, v2
; GFX12-NEXT: v_bfi_b32 v5, v12, 0, v5
; GFX12-NEXT: v_bfi_b32 v4, v11, 0, v4
; GFX12-NEXT: v_and_b32_e32 v7, v7, v9
; GFX12-NEXT: v_and_b32_e32 v6, v6, v8
; GFX12-NEXT: v_or_b32_e32 v1, v1, v24
; GFX12-NEXT: v_or3_b32 v3, v34, v20, v3
; GFX12-NEXT: v_or3_b32 v2, v33, v19, v2
; GFX12-NEXT: v_or3_b32 v5, v16, v22, v5
; GFX12-NEXT: v_or3_b32 v4, v15, v21, v4
; GFX12-NEXT: v_or3_b32 v7, v14, v28, v7
; GFX12-NEXT: v_or3_b32 v6, v13, v27, v6
; GFX12-NEXT: s_setpc_b64 s[30:31]
%result = bitinsert b231 %base, double %val, i32 %off
ret b231 %result
}