test/CodeGen/AMDGPU/GlobalISel/fma.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=GFX6 %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -check-prefix=GFX90A %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefix=GFX12 %s

define float @v_fma_f32(float %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f32:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f32:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f32:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f32:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call float @llvm.fma.f32(float %x, float %y, float %z)
  ret float %fma
}

define <2 x float> @v_fma_v2f32(<2 x float> %x, <2 x float> %y, <2 x float> %z) {
; GFX6-LABEL: v_fma_v2f32:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX6-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v2f32:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX8-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v2f32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX9-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v2f32:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v2f32:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX10-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v2f32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX11-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v2f32:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX12-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call <2 x float> @llvm.fma.v2f32(<2 x float> %x, <2 x float> %y, <2 x float> %z)
  ret <2 x float> %fma
}

define half @v_fma_f16(half %x, half %y, half %z) {
; GFX6-LABEL: v_fma_f16:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f16:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f16:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: v_fma_f16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_fmac_f16_e32 v2.l, v0.l, v1.l
; GFX11-TRUE16-NEXT:    v_mov_b32_e32 v0, v2
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_fma_f16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call half @llvm.fma.f16(half %x, half %y, half %z)
  ret half %fma
}

define half @v_fma_f16_fneg_lhs(half %x, half %y, half %z) {
; GFX6-LABEL: v_fma_f16_fneg_lhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e64 v0, -v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f16_fneg_lhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f16 v0, -v0, v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f16_fneg_lhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f16 v0, -v0, v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f16_fneg_lhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f16 v0, -v0, v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f16_fneg_lhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f16 v0, -v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: v_fma_f16_fneg_lhs:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_fma_f16 v0.l, -v0.l, v1.l, v2.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_fma_f16_fneg_lhs:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_fma_f16 v0, -v0, v1, v2
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f16_fneg_lhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f16 v0, -v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %neg.x = fneg half %x
  %fma = call half @llvm.fma.f16(half %neg.x, half %y, half %z)
  ret half %fma
}

define half @v_fma_f16_fneg_rhs(half %x, half %y, half %z) {
; GFX6-LABEL: v_fma_f16_fneg_rhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e64 v1, -v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f16_fneg_rhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f16 v0, v0, -v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f16_fneg_rhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f16 v0, v0, -v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f16_fneg_rhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f16 v0, v0, -v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f16_fneg_rhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f16 v0, v0, -v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: v_fma_f16_fneg_rhs:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_fma_f16 v0.l, v0.l, -v1.l, v2.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_fma_f16_fneg_rhs:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_fma_f16 v0, v0, -v1, v2
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f16_fneg_rhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f16 v0, v0, -v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %neg.y = fneg half %y
  %fma = call half @llvm.fma.f16(half %x, half %neg.y, half %z)
  ret half %fma
}

define half @v_fma_f16_fneg_add(half %x, half %y, half %z) {
; GFX6-LABEL: v_fma_f16_fneg_add:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e64 v2, -v2
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f16_fneg_add:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f16 v0, v0, v1, -v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f16_fneg_add:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f16 v0, v0, v1, -v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f16_fneg_add:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f16 v0, v0, v1, -v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f16_fneg_add:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f16 v0, v0, v1, -v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: v_fma_f16_fneg_add:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_fma_f16 v0.l, v0.l, v1.l, -v2.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: v_fma_f16_fneg_add:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_fma_f16 v0, v0, v1, -v2
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f16_fneg_add:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f16 v0, v0, v1, -v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %neg.z = fneg half %z
  %fma = call half @llvm.fma.f16(half %x, half %y, half %neg.z)
  ret half %fma
}

define <2 x half> @v_fma_v2f16(<2 x half> %x, <2 x half> %y, <2 x half> %z) {
; GFX6-LABEL: v_fma_v2f16:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX6-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX6-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v2f16:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v1
; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v2
; GFX8-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX8-NEXT:    v_fma_f16 v1, v3, v4, v5
; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v2f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v2f16:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v2f16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v2f16:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v2f16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call <2 x half> @llvm.fma.v2f16(<2 x half> %x, <2 x half> %y, <2 x half> %z)
  ret <2 x half> %fma
}

define <2 x half> @v_fma_v2f16_fneg_lhs(<2 x half> %x, <2 x half> %y, <2 x half> %z) {
; GFX6-LABEL: v_fma_v2f16_fneg_lhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GFX6-NEXT:    v_or_b32_e32 v0, v1, v0
; GFX6-NEXT:    v_xor_b32_e32 v0, 0x80008000, v0
; GFX6-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX6-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX6-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v2f16_fneg_lhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_xor_b32_e32 v0, 0x80008000, v0
; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v1
; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v2
; GFX8-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX8-NEXT:    v_fma_f16 v1, v3, v4, v5
; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v2f16_fneg_lhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[1,0,0] neg_hi:[1,0,0]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v2f16_fneg_lhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[1,0,0] neg_hi:[1,0,0]
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v2f16_fneg_lhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[1,0,0] neg_hi:[1,0,0]
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v2f16_fneg_lhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[1,0,0] neg_hi:[1,0,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v2f16_fneg_lhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[1,0,0] neg_hi:[1,0,0]
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %x.fneg = fneg <2 x half> %x
  %fma = call <2 x half> @llvm.fma.v2f16(<2 x half> %x.fneg, <2 x half> %y, <2 x half> %z)
  ret <2 x half> %fma
}

define <2 x half> @v_fma_v2f16_fneg_rhs(<2 x half> %x, <2 x half> %y, <2 x half> %z) {
; GFX6-LABEL: v_fma_v2f16_fneg_rhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GFX6-NEXT:    v_or_b32_e32 v2, v3, v2
; GFX6-NEXT:    v_xor_b32_e32 v2, 0x80008000, v2
; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX6-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX6-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v2f16_fneg_rhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_xor_b32_e32 v1, 0x80008000, v1
; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v1
; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v2
; GFX8-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX8-NEXT:    v_fma_f16 v1, v3, v4, v5
; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v2f16_fneg_rhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v2f16_fneg_rhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0]
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v2f16_fneg_rhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0]
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v2f16_fneg_rhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v2f16_fneg_rhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_fma_f16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0]
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %y.fneg = fneg <2 x half> %y
  %fma = call <2 x half> @llvm.fma.v2f16(<2 x half> %x, <2 x half> %y.fneg, <2 x half> %z)
  ret <2 x half> %fma
}

define <2 x half> @v_fma_v2f16_fneg_lhs_rhs(<2 x half> %x, <2 x half> %y, <2 x half> %z) {
; GFX6-LABEL: v_fma_v2f16_fneg_lhs_rhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX6-NEXT:    v_fma_f32 v0, v0, v2, v4
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    v_fma_f32 v1, v1, v3, v5
; GFX6-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v2f16_fneg_lhs_rhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v1
; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v2
; GFX8-NEXT:    v_fma_f16 v0, v0, v1, v2
; GFX8-NEXT:    v_fma_f16 v1, v3, v4, v5
; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v2f16_fneg_lhs_rhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v2f16_fneg_lhs_rhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v2f16_fneg_lhs_rhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v2f16_fneg_lhs_rhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v2f16_fneg_lhs_rhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_fma_f16 v0, v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %x.fneg = fneg <2 x half> %x
  %y.fneg = fneg <2 x half> %y
  %fma = call <2 x half> @llvm.fma.v2f16(<2 x half> %x.fneg, <2 x half> %y.fneg, <2 x half> %z)
  ret <2 x half> %fma
}

define <3 x half> @v_fma_v3f16(<3 x half> %x, <3 x half> %y, <3 x half> %z) {
; GFX6-LABEL: v_fma_v3f16:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX6-NEXT:    v_cvt_f32_f16_e32 v6, v6
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX6-NEXT:    v_fma_f32 v0, v0, v3, v6
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v4
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, v7
; GFX6-NEXT:    v_cvt_f32_f16_e32 v6, v8
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    v_fma_f32 v1, v1, v3, v4
; GFX6-NEXT:    v_fma_f32 v2, v2, v5, v6
; GFX6-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v3f16:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_lshrrev_b32_e32 v6, 16, v0
; GFX8-NEXT:    v_lshrrev_b32_e32 v7, 16, v2
; GFX8-NEXT:    v_lshrrev_b32_e32 v8, 16, v4
; GFX8-NEXT:    v_fma_f16 v0, v0, v2, v4
; GFX8-NEXT:    v_fma_f16 v2, v6, v7, v8
; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; GFX8-NEXT:    v_fma_f16 v1, v1, v3, v5
; GFX8-NEXT:    v_or_b32_e32 v0, v0, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v3f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX9-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v3f16:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX90A-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v3f16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX10-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v3f16:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX11-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v3f16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX12-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call <3 x half> @llvm.fma.v3f16(<3 x half> %x, <3 x half> %y, <3 x half> %z)
  ret <3 x half> %fma
}

define <4 x half> @v_fma_v4f16(<4 x half> %x, <4 x half> %y, <4 x half> %z) {
; GFX6-LABEL: v_fma_v4f16:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, v0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, v4
; GFX6-NEXT:    v_cvt_f32_f16_e32 v8, v8
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, v1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, v5
; GFX6-NEXT:    v_cvt_f32_f16_e32 v9, v9
; GFX6-NEXT:    v_fma_f32 v0, v0, v4, v8
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, v2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, v6
; GFX6-NEXT:    v_fma_f32 v1, v1, v5, v9
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, v10
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, v3
; GFX6-NEXT:    v_cvt_f32_f16_e32 v6, v7
; GFX6-NEXT:    v_cvt_f32_f16_e32 v7, v11
; GFX6-NEXT:    v_fma_f32 v2, v2, v4, v5
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX6-NEXT:    v_fma_f32 v3, v3, v6, v7
; GFX6-NEXT:    v_cvt_f16_f32_e32 v2, v2
; GFX6-NEXT:    v_cvt_f16_f32_e32 v3, v3
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v4f16:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_lshrrev_b32_e32 v6, 16, v0
; GFX8-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
; GFX8-NEXT:    v_lshrrev_b32_e32 v10, 16, v4
; GFX8-NEXT:    v_lshrrev_b32_e32 v7, 16, v1
; GFX8-NEXT:    v_lshrrev_b32_e32 v9, 16, v3
; GFX8-NEXT:    v_lshrrev_b32_e32 v11, 16, v5
; GFX8-NEXT:    v_fma_f16 v0, v0, v2, v4
; GFX8-NEXT:    v_fma_f16 v2, v6, v8, v10
; GFX8-NEXT:    v_fma_f16 v1, v1, v3, v5
; GFX8-NEXT:    v_fma_f16 v3, v7, v9, v11
; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; GFX8-NEXT:    v_or_b32_e32 v0, v0, v2
; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 16, v3
; GFX8-NEXT:    v_or_b32_e32 v1, v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v4f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX9-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v4f16:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX90A-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v4f16:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX10-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v4f16:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX11-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v4f16:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_pk_fma_f16 v0, v0, v2, v4
; GFX12-NEXT:    v_pk_fma_f16 v1, v1, v3, v5
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call <4 x half> @llvm.fma.v4f16(<4 x half> %x, <4 x half> %y, <4 x half> %z)
  ret <4 x half> %fma
}

define double @v_fma_f64(double %x, double %y, double %z) {
; GFX6-LABEL: v_fma_f64:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f64:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f64:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fmac_f64_e32 v[4:5], v[0:1], v[2:3]
; GFX90A-NEXT:    v_mov_b32_e32 v0, v4
; GFX90A-NEXT:    v_mov_b32_e32 v1, v5
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f64:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f64:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call double @llvm.fma.f64(double %x, double %y, double %z)
  ret double %fma
}

define double @v_fma_f64_fneg_all(double %x, double %y, double %z) {
; GFX6-LABEL: v_fma_f64_fneg_all:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], -v[4:5]
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f64_fneg_all:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], -v[4:5]
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f64_fneg_all:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], -v[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f64_fneg_all:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], -v[4:5]
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f64_fneg_all:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], -v[4:5]
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f64_fneg_all:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], -v[4:5]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f64_fneg_all:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f64 v[0:1], v[0:1], v[2:3], -v[4:5]
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %neg.x = fneg double %x
  %neg.y = fneg double %y
  %neg.z = fneg double %z
  %fma = call double @llvm.fma.f64(double %neg.x, double %neg.y, double %neg.z)
  ret double %fma
}

define <2 x double> @v_fma_v2f64(<2 x double> %x, <2 x double> %y, <2 x double> %z) {
; GFX6-LABEL: v_fma_v2f64:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f64 v[0:1], v[0:1], v[4:5], v[8:9]
; GFX6-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[10:11]
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_v2f64:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f64 v[0:1], v[0:1], v[4:5], v[8:9]
; GFX8-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[10:11]
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_v2f64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f64 v[0:1], v[0:1], v[4:5], v[8:9]
; GFX9-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[10:11]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_v2f64:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fmac_f64_e32 v[8:9], v[0:1], v[4:5]
; GFX90A-NEXT:    v_fmac_f64_e32 v[10:11], v[2:3], v[6:7]
; GFX90A-NEXT:    v_mov_b32_e32 v0, v8
; GFX90A-NEXT:    v_mov_b32_e32 v1, v9
; GFX90A-NEXT:    v_mov_b32_e32 v2, v10
; GFX90A-NEXT:    v_mov_b32_e32 v3, v11
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_v2f64:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f64 v[0:1], v[0:1], v[4:5], v[8:9]
; GFX10-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[10:11]
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_v2f64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f64 v[0:1], v[0:1], v[4:5], v[8:9]
; GFX11-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[10:11]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_v2f64:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f64 v[0:1], v[0:1], v[4:5], v[8:9]
; GFX12-NEXT:    v_fma_f64 v[2:3], v[2:3], v[6:7], v[10:11]
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fma = call <2 x double> @llvm.fma.v2f64(<2 x double> %x, <2 x double> %y, <2 x double> %z)
  ret <2 x double> %fma
}

define float @v_fma_f32_fabs_lhs(float %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32_fabs_lhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, |v0|, v1, v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f32_fabs_lhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, |v0|, v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f32_fabs_lhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, |v0|, v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f32_fabs_lhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f32 v0, |v0|, v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f32_fabs_lhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, |v0|, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f32_fabs_lhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, |v0|, v1, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f32_fabs_lhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, |v0|, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fabs.x = call float @llvm.fabs.f32(float %x)
  %fma = call float @llvm.fma.f32(float %fabs.x, float %y, float %z)
  ret float %fma
}

define float @v_fma_f32_fabs_rhs(float %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32_fabs_rhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, v0, |v1|, v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f32_fabs_rhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, v0, |v1|, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f32_fabs_rhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, v0, |v1|, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f32_fabs_rhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f32 v0, v0, |v1|, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f32_fabs_rhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, v0, |v1|, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f32_fabs_rhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, v0, |v1|, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f32_fabs_rhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, v0, |v1|, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fabs.y = call float @llvm.fabs.f32(float %y)
  %fma = call float @llvm.fma.f32(float %x, float %fabs.y, float %z)
  ret float %fma
}

define float @v_fma_f32_fabs_lhs_rhs(float %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32_fabs_lhs_rhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, |v0|, |v1|, v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f32_fabs_lhs_rhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, |v0|, |v1|, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f32_fabs_lhs_rhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, |v0|, |v1|, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f32_fabs_lhs_rhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f32 v0, |v0|, |v1|, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f32_fabs_lhs_rhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, |v0|, |v1|, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f32_fabs_lhs_rhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, |v0|, |v1|, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f32_fabs_lhs_rhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, |v0|, |v1|, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %fabs.x = call float @llvm.fabs.f32(float %x)
  %fabs.y = call float @llvm.fabs.f32(float %y)
  %fma = call float @llvm.fma.f32(float %fabs.x, float %fabs.y, float %z)
  ret float %fma
}

define amdgpu_ps float @v_fma_f32_sgpr_vgpr_vgpr(float inreg %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32_sgpr_vgpr_vgpr:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: v_fma_f32_sgpr_vgpr_vgpr:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: v_fma_f32_sgpr_vgpr_vgpr:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: v_fma_f32_sgpr_vgpr_vgpr:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: v_fma_f32_sgpr_vgpr_vgpr:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-LABEL: v_fma_f32_sgpr_vgpr_vgpr:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX11-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: v_fma_f32_sgpr_vgpr_vgpr:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX12-NEXT:    ; return to shader part epilog
  %fma = call float @llvm.fma.f32(float %x, float %y, float %z)
  ret float %fma
}

define amdgpu_ps float @v_fma_f32_vgpr_sgpr_vgpr(float %x, float inreg %y, float %z) {
; GFX6-LABEL: v_fma_f32_vgpr_sgpr_vgpr:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_fma_f32 v0, v0, s0, v1
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: v_fma_f32_vgpr_sgpr_vgpr:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_fma_f32 v0, v0, s0, v1
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: v_fma_f32_vgpr_sgpr_vgpr:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_fma_f32 v0, v0, s0, v1
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: v_fma_f32_vgpr_sgpr_vgpr:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: v_fma_f32_vgpr_sgpr_vgpr:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-LABEL: v_fma_f32_vgpr_sgpr_vgpr:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX11-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: v_fma_f32_vgpr_sgpr_vgpr:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX12-NEXT:    ; return to shader part epilog
  %fma = call float @llvm.fma.f32(float %x, float %y, float %z)
  ret float %fma
}

define amdgpu_ps float @v_fma_f32_sgpr_sgpr_sgpr(float inreg %x, float inreg %y, float inreg %z) {
; GFX6-LABEL: v_fma_f32_sgpr_sgpr_sgpr:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_mov_b32_e32 v0, s1
; GFX6-NEXT:    v_mov_b32_e32 v1, s2
; GFX6-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: v_fma_f32_sgpr_sgpr_sgpr:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_mov_b32_e32 v0, s1
; GFX8-NEXT:    v_mov_b32_e32 v1, s2
; GFX8-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: v_fma_f32_sgpr_sgpr_sgpr:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_mov_b32_e32 v0, s1
; GFX9-NEXT:    v_mov_b32_e32 v1, s2
; GFX9-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: v_fma_f32_sgpr_sgpr_sgpr:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_mov_b32_e32 v0, s1
; GFX90A-NEXT:    v_mov_b32_e32 v1, s2
; GFX90A-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: v_fma_f32_sgpr_sgpr_sgpr:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_mov_b32_e32 v0, s2
; GFX10-NEXT:    v_fma_f32 v0, s1, s0, v0
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-LABEL: v_fma_f32_sgpr_sgpr_sgpr:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    v_mov_b32_e32 v0, s2
; GFX11-NEXT:    v_fma_f32 v0, s1, s0, v0
; GFX11-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: v_fma_f32_sgpr_sgpr_sgpr:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_fmac_f32 s2, s0, s1
; GFX12-NEXT:    v_mov_b32_e32 v0, s2
; GFX12-NEXT:    ; return to shader part epilog
  %fma = call float @llvm.fma.f32(float %x, float %y, float %z)
  ret float %fma
}

define float @v_fma_f32_fneg_lhs(float %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32_fneg_lhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, -v0, v1, v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f32_fneg_lhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, -v0, v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f32_fneg_lhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, -v0, v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f32_fneg_lhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f32 v0, -v0, v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f32_fneg_lhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, -v0, v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f32_fneg_lhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, -v0, v1, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f32_fneg_lhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, -v0, v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %neg.x = fneg float %x
  %fma = call float @llvm.fma.f32(float %neg.x, float %y, float %z)
  ret float %fma
}

define float @v_fma_f32_fneg_rhs(float %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32_fneg_rhs:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, v0, -v1, v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f32_fneg_rhs:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, v0, -v1, v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f32_fneg_rhs:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, v0, -v1, v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f32_fneg_rhs:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f32 v0, v0, -v1, v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f32_fneg_rhs:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, v0, -v1, v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f32_fneg_rhs:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, v0, -v1, v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f32_fneg_rhs:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, v0, -v1, v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %neg.y = fneg float %y
  %fma = call float @llvm.fma.f32(float %x, float %neg.y, float %z)
  ret float %fma
}

define float @v_fma_f32_fneg_z(float %x, float %y, float %z) {
; GFX6-LABEL: v_fma_f32_fneg_z:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, -v2
; GFX6-NEXT:    s_setpc_b64 s[30:31]
;
; GFX8-LABEL: v_fma_f32_fneg_z:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT:    v_fma_f32 v0, v0, v1, -v2
; GFX8-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: v_fma_f32_fneg_z:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_fma_f32 v0, v0, v1, -v2
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX90A-LABEL: v_fma_f32_fneg_z:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT:    v_fma_f32 v0, v0, v1, -v2
; GFX90A-NEXT:    s_setpc_b64 s[30:31]
;
; GFX10-LABEL: v_fma_f32_fneg_z:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT:    v_fma_f32 v0, v0, v1, -v2
; GFX10-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: v_fma_f32_fneg_z:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_fma_f32 v0, v0, v1, -v2
; GFX11-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: v_fma_f32_fneg_z:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_fma_f32 v0, v0, v1, -v2
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %neg.z = fneg float %z
  %fma = call float @llvm.fma.f32(float %x, float %y, float %neg.z)
  ret float %fma
}

define amdgpu_ps float @dont_crash_after_fma_mix_select_attempt(float inreg %x, float %y, float %z) {
; GFX6-LABEL: dont_crash_after_fma_mix_select_attempt:
; GFX6:       ; %bb.0: ; %.entry
; GFX6-NEXT:    v_fma_f32 v0, |s0|, v0, v1
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: dont_crash_after_fma_mix_select_attempt:
; GFX8:       ; %bb.0: ; %.entry
; GFX8-NEXT:    v_fma_f32 v0, |s0|, v0, v1
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: dont_crash_after_fma_mix_select_attempt:
; GFX9:       ; %bb.0: ; %.entry
; GFX9-NEXT:    v_fma_f32 v0, |s0|, v0, v1
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: dont_crash_after_fma_mix_select_attempt:
; GFX90A:       ; %bb.0: ; %.entry
; GFX90A-NEXT:    v_fma_f32 v0, |s0|, v0, v1
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: dont_crash_after_fma_mix_select_attempt:
; GFX10:       ; %bb.0: ; %.entry
; GFX10-NEXT:    v_fma_f32 v0, |s0|, v0, v1
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-LABEL: dont_crash_after_fma_mix_select_attempt:
; GFX11:       ; %bb.0: ; %.entry
; GFX11-NEXT:    v_fma_f32 v0, |s0|, v0, v1
; GFX11-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: dont_crash_after_fma_mix_select_attempt:
; GFX12:       ; %bb.0: ; %.entry
; GFX12-NEXT:    v_fma_f32 v0, |s0|, v0, v1
; GFX12-NEXT:    ; return to shader part epilog
.entry:
  %fabs.x = call contract float @llvm.fabs.f32(float %x)
  %fma = call float @llvm.fma.f32(float %fabs.x, float %y, float %z)
  ret float %fma
}

define amdgpu_ps half @fma_s16_uniform(half inreg %a, half inreg %b, half inreg %c) {
; GFX6-LABEL: fma_s16_uniform:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, s0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, s1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, s2
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: fma_s16_uniform:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_mov_b32_e32 v0, s1
; GFX8-NEXT:    v_mov_b32_e32 v1, s2
; GFX8-NEXT:    v_fma_f16 v0, s0, v0, v1
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: fma_s16_uniform:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_mov_b32_e32 v0, s1
; GFX9-NEXT:    v_mov_b32_e32 v1, s2
; GFX9-NEXT:    v_fma_f16 v0, s0, v0, v1
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: fma_s16_uniform:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_mov_b32_e32 v0, s1
; GFX90A-NEXT:    v_mov_b32_e32 v1, s2
; GFX90A-NEXT:    v_fma_f16 v0, s0, v0, v1
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: fma_s16_uniform:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_mov_b32_e32 v0, s2
; GFX10-NEXT:    v_fma_f16 v0, s1, s0, v0
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-TRUE16-LABEL: fma_s16_uniform:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.l, s2
; GFX11-TRUE16-NEXT:    v_fmac_f16_e64 v0.l, s0, s1
; GFX11-TRUE16-NEXT:    ; return to shader part epilog
;
; GFX11-FAKE16-LABEL: fma_s16_uniform:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    v_mov_b32_e32 v0, s2
; GFX11-FAKE16-NEXT:    v_fma_f16 v0, s1, s0, v0
; GFX11-FAKE16-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: fma_s16_uniform:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_fmac_f16 s2, s0, s1
; GFX12-NEXT:    v_mov_b32_e32 v0, s2
; GFX12-NEXT:    ; return to shader part epilog
  %fma = call half @llvm.fma.f16(half %a, half %b, half %c)
  ret half %fma
}

define amdgpu_ps float @fma_s32_uniform(float inreg %a, float inreg %b, float inreg %c) {
; GFX6-LABEL: fma_s32_uniform:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_mov_b32_e32 v0, s1
; GFX6-NEXT:    v_mov_b32_e32 v1, s2
; GFX6-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: fma_s32_uniform:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_mov_b32_e32 v0, s1
; GFX8-NEXT:    v_mov_b32_e32 v1, s2
; GFX8-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: fma_s32_uniform:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_mov_b32_e32 v0, s1
; GFX9-NEXT:    v_mov_b32_e32 v1, s2
; GFX9-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: fma_s32_uniform:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_mov_b32_e32 v0, s1
; GFX90A-NEXT:    v_mov_b32_e32 v1, s2
; GFX90A-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: fma_s32_uniform:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_mov_b32_e32 v0, s2
; GFX10-NEXT:    v_fma_f32 v0, s1, s0, v0
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-LABEL: fma_s32_uniform:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    v_mov_b32_e32 v0, s2
; GFX11-NEXT:    v_fma_f32 v0, s1, s0, v0
; GFX11-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: fma_s32_uniform:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_fmac_f32 s2, s0, s1
; GFX12-NEXT:    v_mov_b32_e32 v0, s2
; GFX12-NEXT:    ; return to shader part epilog
  %fma = call float @llvm.fma.f32(float %a, float %b, float %c)
  ret float %fma
}

define amdgpu_ps void @fma_s64_uniform(double inreg %a, double inreg %b, double inreg %c, ptr addrspace(1) %ptr) {
; GFX6-LABEL: fma_s64_uniform:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_mov_b32_e32 v2, s2
; GFX6-NEXT:    v_mov_b32_e32 v4, s4
; GFX6-NEXT:    v_mov_b32_e32 v3, s3
; GFX6-NEXT:    v_mov_b32_e32 v5, s5
; GFX6-NEXT:    v_fma_f64 v[2:3], s[0:1], v[2:3], v[4:5]
; GFX6-NEXT:    s_mov_b32 s2, 0
; GFX6-NEXT:    s_mov_b32 s3, 0xf000
; GFX6-NEXT:    s_mov_b64 s[0:1], 0
; GFX6-NEXT:    buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64
; GFX6-NEXT:    s_endpgm
;
; GFX8-LABEL: fma_s64_uniform:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_mov_b32_e32 v2, s2
; GFX8-NEXT:    v_mov_b32_e32 v4, s4
; GFX8-NEXT:    v_mov_b32_e32 v3, s3
; GFX8-NEXT:    v_mov_b32_e32 v5, s5
; GFX8-NEXT:    v_fma_f64 v[2:3], s[0:1], v[2:3], v[4:5]
; GFX8-NEXT:    flat_store_dwordx2 v[0:1], v[2:3]
; GFX8-NEXT:    s_endpgm
;
; GFX9-LABEL: fma_s64_uniform:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_mov_b32_e32 v2, s2
; GFX9-NEXT:    v_mov_b32_e32 v4, s4
; GFX9-NEXT:    v_mov_b32_e32 v3, s3
; GFX9-NEXT:    v_mov_b32_e32 v5, s5
; GFX9-NEXT:    v_fma_f64 v[2:3], s[0:1], v[2:3], v[4:5]
; GFX9-NEXT:    global_store_dwordx2 v[0:1], v[2:3], off
; GFX9-NEXT:    s_endpgm
;
; GFX90A-LABEL: fma_s64_uniform:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
; GFX90A-NEXT:    v_pk_mov_b32 v[4:5], s[4:5], s[4:5] op_sel:[0,1]
; GFX90A-NEXT:    v_fmac_f64_e32 v[4:5], s[0:1], v[2:3]
; GFX90A-NEXT:    global_store_dwordx2 v[0:1], v[4:5], off
; GFX90A-NEXT:    s_endpgm
;
; GFX10-LABEL: fma_s64_uniform:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_mov_b32_e32 v2, s4
; GFX10-NEXT:    v_mov_b32_e32 v3, s5
; GFX10-NEXT:    v_fma_f64 v[2:3], s[0:1], s[2:3], v[2:3]
; GFX10-NEXT:    global_store_dwordx2 v[0:1], v[2:3], off
; GFX10-NEXT:    s_endpgm
;
; GFX11-LABEL: fma_s64_uniform:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
; GFX11-NEXT:    v_fma_f64 v[2:3], s[0:1], s[2:3], v[2:3]
; GFX11-NEXT:    global_store_b64 v[0:1], v[2:3], off
; GFX11-NEXT:    s_endpgm
;
; GFX12-LABEL: fma_s64_uniform:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
; GFX12-NEXT:    v_fma_f64 v[2:3], s[0:1], s[2:3], v[2:3]
; GFX12-NEXT:    global_store_b64 v[0:1], v[2:3], off
; GFX12-NEXT:    s_endpgm
  %fma = call double @llvm.fma.f64(double %a, double %b, double %c)
  store double %fma, ptr addrspace(1) %ptr
  ret void
}

define amdgpu_ps <2 x half> @fma_v2s16_uniform(<2 x half> inreg %a, <2 x half> inreg %b, <2 x half> inreg %c) {
; GFX6-LABEL: fma_v2s16_uniform:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_cvt_f32_f16_e32 v0, s0
; GFX6-NEXT:    v_cvt_f32_f16_e32 v1, s2
; GFX6-NEXT:    v_cvt_f32_f16_e32 v2, s4
; GFX6-NEXT:    v_cvt_f32_f16_e32 v3, s1
; GFX6-NEXT:    v_cvt_f32_f16_e32 v4, s3
; GFX6-NEXT:    v_cvt_f32_f16_e32 v5, s5
; GFX6-NEXT:    v_fma_f32 v0, v0, v1, v2
; GFX6-NEXT:    v_cvt_f16_f32_e32 v0, v0
; GFX6-NEXT:    v_fma_f32 v1, v3, v4, v5
; GFX6-NEXT:    v_cvt_f16_f32_e32 v1, v1
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: fma_v2s16_uniform:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_mov_b32_e32 v0, s1
; GFX8-NEXT:    v_mov_b32_e32 v1, s2
; GFX8-NEXT:    s_lshr_b32 s4, s1, 16
; GFX8-NEXT:    s_lshr_b32 s5, s2, 16
; GFX8-NEXT:    v_fma_f16 v0, s0, v0, v1
; GFX8-NEXT:    s_lshr_b32 s3, s0, 16
; GFX8-NEXT:    v_readfirstlane_b32 s0, v0
; GFX8-NEXT:    v_mov_b32_e32 v0, s4
; GFX8-NEXT:    v_mov_b32_e32 v1, s5
; GFX8-NEXT:    v_fma_f16 v0, s3, v0, v1
; GFX8-NEXT:    v_readfirstlane_b32 s1, v0
; GFX8-NEXT:    s_and_b32 s1, 0xffff, s1
; GFX8-NEXT:    s_and_b32 s0, 0xffff, s0
; GFX8-NEXT:    s_lshl_b32 s1, s1, 16
; GFX8-NEXT:    s_or_b32 s0, s0, s1
; GFX8-NEXT:    v_mov_b32_e32 v0, s0
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: fma_v2s16_uniform:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_mov_b32_e32 v0, s1
; GFX9-NEXT:    v_mov_b32_e32 v1, s2
; GFX9-NEXT:    v_pk_fma_f16 v0, s0, v0, v1
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: fma_v2s16_uniform:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_mov_b32_e32 v0, s1
; GFX90A-NEXT:    v_mov_b32_e32 v1, s2
; GFX90A-NEXT:    v_pk_fma_f16 v0, s0, v0, v1
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: fma_v2s16_uniform:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_mov_b32_e32 v0, s2
; GFX10-NEXT:    v_pk_fma_f16 v0, s0, s1, v0
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-LABEL: fma_v2s16_uniform:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    v_mov_b32_e32 v0, s2
; GFX11-NEXT:    v_pk_fma_f16 v0, s0, s1, v0
; GFX11-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: fma_v2s16_uniform:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_lshr_b32 s3, s0, 16
; GFX12-NEXT:    s_lshr_b32 s4, s1, 16
; GFX12-NEXT:    s_lshr_b32 s5, s2, 16
; GFX12-NEXT:    s_fmac_f16 s2, s0, s1
; GFX12-NEXT:    s_fmac_f16 s5, s3, s4
; GFX12-NEXT:    s_pack_ll_b32_b16 s0, s2, s5
; GFX12-NEXT:    v_mov_b32_e32 v0, s0
; GFX12-NEXT:    ; return to shader part epilog
  %fma = call <2 x half> @llvm.fma.v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c)
  ret <2 x half> %fma
}

define amdgpu_ps <2 x float> @fma_v2s32_uniform(<2 x float> inreg %a, <2 x float> inreg %b, <2 x float> inreg %c) {
; GFX6-LABEL: fma_v2s32_uniform:
; GFX6:       ; %bb.0:
; GFX6-NEXT:    v_mov_b32_e32 v0, s2
; GFX6-NEXT:    v_mov_b32_e32 v1, s4
; GFX6-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX6-NEXT:    v_mov_b32_e32 v1, s3
; GFX6-NEXT:    v_mov_b32_e32 v2, s5
; GFX6-NEXT:    v_fma_f32 v1, s1, v1, v2
; GFX6-NEXT:    ; return to shader part epilog
;
; GFX8-LABEL: fma_v2s32_uniform:
; GFX8:       ; %bb.0:
; GFX8-NEXT:    v_mov_b32_e32 v0, s2
; GFX8-NEXT:    v_mov_b32_e32 v1, s4
; GFX8-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX8-NEXT:    v_mov_b32_e32 v1, s3
; GFX8-NEXT:    v_mov_b32_e32 v2, s5
; GFX8-NEXT:    v_fma_f32 v1, s1, v1, v2
; GFX8-NEXT:    ; return to shader part epilog
;
; GFX9-LABEL: fma_v2s32_uniform:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    v_mov_b32_e32 v0, s2
; GFX9-NEXT:    v_mov_b32_e32 v1, s4
; GFX9-NEXT:    v_fma_f32 v0, s0, v0, v1
; GFX9-NEXT:    v_mov_b32_e32 v1, s3
; GFX9-NEXT:    v_mov_b32_e32 v2, s5
; GFX9-NEXT:    v_fma_f32 v1, s1, v1, v2
; GFX9-NEXT:    ; return to shader part epilog
;
; GFX90A-LABEL: fma_v2s32_uniform:
; GFX90A:       ; %bb.0:
; GFX90A-NEXT:    v_pk_mov_b32 v[0:1], s[2:3], s[2:3] op_sel:[0,1]
; GFX90A-NEXT:    v_pk_mov_b32 v[2:3], s[4:5], s[4:5] op_sel:[0,1]
; GFX90A-NEXT:    v_pk_fma_f32 v[0:1], s[0:1], v[0:1], v[2:3]
; GFX90A-NEXT:    ; return to shader part epilog
;
; GFX10-LABEL: fma_v2s32_uniform:
; GFX10:       ; %bb.0:
; GFX10-NEXT:    v_mov_b32_e32 v0, s4
; GFX10-NEXT:    v_mov_b32_e32 v1, s5
; GFX10-NEXT:    v_fma_f32 v0, s2, s0, v0
; GFX10-NEXT:    v_fma_f32 v1, s3, s1, v1
; GFX10-NEXT:    ; return to shader part epilog
;
; GFX11-LABEL: fma_v2s32_uniform:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
; GFX11-NEXT:    v_fma_f32 v0, s2, s0, v0
; GFX11-NEXT:    v_fma_f32 v1, s3, s1, v1
; GFX11-NEXT:    ; return to shader part epilog
;
; GFX12-LABEL: fma_v2s32_uniform:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_fmac_f32 s4, s0, s2
; GFX12-NEXT:    s_fmac_f32 s5, s1, s3
; GFX12-NEXT:    v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
; GFX12-NEXT:    ; return to shader part epilog
  %fma = call <2 x float> @llvm.fma.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c)
  ret <2 x float> %fma
}

declare half @llvm.fma.f16(half, half, half) #0
declare float @llvm.fma.f32(float, float, float) #0
declare double @llvm.fma.f64(double, double, double) #0

declare half @llvm.fabs.f16(half) #0
declare float @llvm.fabs.f32(float) #0

declare <2 x half> @llvm.fma.v2f16(<2 x half>, <2 x half>, <2 x half>) #0
declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) #0
declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) #0

declare <3 x half> @llvm.fma.v3f16(<3 x half>, <3 x half>, <3 x half>) #0
declare <4 x half> @llvm.fma.v4f16(<4 x half>, <4 x half>, <4 x half>) #0

attributes #0 = { nounwind readnone speculatable willreturn }