test/CodeGen/AArch64/mulhu-srl-promoted-ops.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s

define <8 x i16> @mulhu_v8i16_by_256(<8 x i16> %x) {
; CHECK-LABEL: mulhu_v8i16_by_256:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ushr v0.8h, v0.8h, #8
; CHECK-NEXT:    ret
  %x32 = zext <8 x i16> %x to <8 x i32>
  %mul = mul <8 x i32> %x32, splat (i32 256)
  %result = lshr <8 x i32> %mul, splat (i32 16)
  %trunc = trunc <8 x i32> %result to <8 x i16>
  ret <8 x i16> %trunc
}

define <16 x i16> @mulhu_v16i16_by_256(<16 x i16> %x) {
; CHECK-LABEL: mulhu_v16i16_by_256:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ushr v0.8h, v0.8h, #8
; CHECK-NEXT:    ushr v1.8h, v1.8h, #8
; CHECK-NEXT:    ret
  %x32 = zext <16 x i16> %x to <16 x i32>
  %mul = mul <16 x i32> %x32, splat (i32 256)
  %result = lshr <16 x i32> %mul, splat (i32 16)
  %trunc = trunc <16 x i32> %result to <16 x i16>
  ret <16 x i16> %trunc
}