test/CodeGen/AArch64/is_fpclass.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
; RUN: llc -mtriple=aarch64 -global-isel=0 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI

define i1 @isfinite_h(half %x) {
; CHECK-LABEL: isfinite_h:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $h0 killed $h0 def $s0
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #31744 // =0x7c00
; CHECK-NEXT:    and w9, w9, #0x7fff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, lt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f16(half %x, i32 504)  ; 0x1f8 = "finite"
  ret i1 %0
}

define i1 @not_isfinite_h(half %x) {
; CHECK-LABEL: not_isfinite_h:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $h0 killed $h0 def $s0
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #31743 // =0x7bff
; CHECK-NEXT:    and w9, w9, #0x7fff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, gt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f16(half %x, i32 519)  ; ~0x1f8 = "~finite"
  ret i1 %0
}

define i1 @isfinite_f(float %x) {
; CHECK-LABEL: isfinite_f:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #2139095040 // =0x7f800000
; CHECK-NEXT:    and w9, w9, #0x7fffffff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, lt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504)  ; 0x1f8 = "finite"
  ret i1 %0
}

define i1 @not_isfinite_f(float %x) {
; CHECK-LABEL: not_isfinite_f:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #2139095039 // =0x7f7fffff
; CHECK-NEXT:    and w9, w9, #0x7fffffff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, gt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519)  ; ~0x1f8 = "~finite"
  ret i1 %0
}


define i1 @isfinite_f_strictfp(float %x) strictfp {
; CHECK-LABEL: isfinite_f_strictfp:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #2139095040 // =0x7f800000
; CHECK-NEXT:    and w9, w9, #0x7fffffff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, lt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) strictfp ; 0x1f8 = "finite"
  ret i1 %0
}

define i1 @not_isfinite_f_strictfp(float %x) strictfp {
; CHECK-LABEL: not_isfinite_f_strictfp:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #2139095039 // =0x7f7fffff
; CHECK-NEXT:    and w9, w9, #0x7fffffff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, gt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519) strictfp ; ~0x1f8 = ~"finite"
  ret i1 %0
}


define i1 @isfinite_d(double %x) {
; CHECK-LABEL: isfinite_d:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov x9, d0
; CHECK-NEXT:    mov x8, #9218868437227405312 // =0x7ff0000000000000
; CHECK-NEXT:    and x9, x9, #0x7fffffffffffffff
; CHECK-NEXT:    cmp x9, x8
; CHECK-NEXT:    cset w0, lt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 504)  ; 0x1f8 = "finite"
  ret i1 %0
}

define i1 @not_isfinite_d(double %x) {
; CHECK-LABEL: not_isfinite_d:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov x9, d0
; CHECK-NEXT:    mov x8, #9218868437227405311 // =0x7fefffffffffffff
; CHECK-NEXT:    and x9, x9, #0x7fffffffffffffff
; CHECK-NEXT:    cmp x9, x8
; CHECK-NEXT:    cset w0, gt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 519)  ; ~0x1f8 = "~finite"
  ret i1 %0
}

define i1 @isfinite_d_strictfp(double %x) {
; CHECK-LABEL: isfinite_d_strictfp:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov x9, d0
; CHECK-NEXT:    mov x8, #9218868437227405312 // =0x7ff0000000000000
; CHECK-NEXT:    and x9, x9, #0x7fffffffffffffff
; CHECK-NEXT:    cmp x9, x8
; CHECK-NEXT:    cset w0, lt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 504) strictfp  ; 0x1f8 = "finite"
  ret i1 %0
}

define i1 @not_isfinite_d_strictfp(double %x) {
; CHECK-LABEL: not_isfinite_d_strictfp:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov x9, d0
; CHECK-NEXT:    mov x8, #9218868437227405311 // =0x7fefffffffffffff
; CHECK-NEXT:    and x9, x9, #0x7fffffffffffffff
; CHECK-NEXT:    cmp x9, x8
; CHECK-NEXT:    cset w0, gt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 519) strictfp  ; ~0x1f8 = "~finite"
  ret i1 %0
}

define i1 @isfinite_bf16(bfloat %x) {
; CHECK-LABEL: isfinite_bf16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $h0 killed $h0 def $s0
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #32640 // =0x7f80
; CHECK-NEXT:    and w9, w9, #0x7fff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, lt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.bf16(bfloat %x, i32 504)  ; 0x1f8 = "finite"
  ret i1 %0
}

define i1 @not_isfinite_bf16(bfloat %x) {
; CHECK-LABEL: not_isfinite_bf16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    // kill: def $h0 killed $h0 def $s0
; CHECK-NEXT:    fmov w9, s0
; CHECK-NEXT:    mov w8, #32639 // =0x7f7f
; CHECK-NEXT:    and w9, w9, #0x7fff
; CHECK-NEXT:    cmp w9, w8
; CHECK-NEXT:    cset w0, gt
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.bf16(bfloat %x, i32 519)  ; ~0x1f8 = "~finite"
  ret i1 %0
}

define i1 @isfinite_f128(fp128 %x) {
; CHECK-LABEL: isfinite_f128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str q0, [sp, #-16]!
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    ldr x9, [sp, #8]
; CHECK-NEXT:    mov x8, #9223090561878065152 // =0x7fff000000000000
; CHECK-NEXT:    and x9, x9, #0x7fffffffffffffff
; CHECK-NEXT:    cmp x9, x8
; CHECK-NEXT:    cset w0, lt
; CHECK-NEXT:    add sp, sp, #16
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f128(fp128 %x, i32 504)  ; 0x1f8 = "finite"
  ret i1 %0
}

define i1 @not_isfinite_f128(fp128 %x) {
; CHECK-LABEL: not_isfinite_f128:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    str q0, [sp, #-16]!
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    ldr x9, [sp, #8]
; CHECK-NEXT:    mov x8, #9223090561878065151 // =0x7ffeffffffffffff
; CHECK-NEXT:    and x9, x9, #0x7fffffffffffffff
; CHECK-NEXT:    cmp x9, x8
; CHECK-NEXT:    cset w0, gt
; CHECK-NEXT:    add sp, sp, #16
; CHECK-NEXT:    ret
entry:
  %0 = tail call i1 @llvm.is.fpclass.f128(fp128 %x, i32 519)  ; ~0x1f8 = "~finite"
  ret i1 %0
}

define <4 x i1> @isfinite_v4h(<4 x half> %x) {
; CHECK-LABEL: isfinite_v4h:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    movi v1.4h, #124, lsl #8
; CHECK-NEXT:    bic v0.4h, #128, lsl #8
; CHECK-NEXT:    cmgt v0.4h, v1.4h, v0.4h
; CHECK-NEXT:    ret
entry:
  %0 = tail call <4 x i1> @llvm.is.fpclass.v4f16(<4 x half> %x, i32 504)  ; 0x1f8 = "finite"
  ret <4 x i1> %0
}

define <4 x i1> @not_isfinite_v4h(<4 x half> %x) {
; CHECK-LABEL: not_isfinite_v4h:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    movi v1.4h, #124, lsl #8
; CHECK-NEXT:    bic v0.4h, #128, lsl #8
; CHECK-NEXT:    cmge v0.4h, v0.4h, v1.4h
; CHECK-NEXT:    ret
entry:
  %0 = tail call <4 x i1> @llvm.is.fpclass.v4f16(<4 x half> %x, i32 519)  ; ~0x1f8 = "~finite"
  ret <4 x i1> %0
}

define <4 x i1> @isfinite_v4f(<4 x float> %x) {
; CHECK-LABEL: isfinite_v4f:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    mvni v1.4s, #127, msl #16
; CHECK-NEXT:    fabs v0.4s, v0.4s
; CHECK-NEXT:    fneg v1.4s, v1.4s
; CHECK-NEXT:    fcmgt v2.4s, v0.4s, v1.4s
; CHECK-NEXT:    fcmgt v0.4s, v1.4s, v0.4s
; CHECK-NEXT:    orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %0 = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %x, i32 504)  ; 0x1f8 = "finite"
  ret <4 x i1> %0
}

define <4 x i1> @not_isfinite_v4f(<4 x float> %x) {
; CHECK-LABEL: not_isfinite_v4f:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    mvni v1.4s, #127, msl #16
; CHECK-NEXT:    bic v0.4s, #128, lsl #24
; CHECK-NEXT:    fneg v1.4s, v1.4s
; CHECK-NEXT:    cmge v0.4s, v0.4s, v1.4s
; CHECK-NEXT:    xtn v0.4h, v0.4s
; CHECK-NEXT:    ret
entry:
  %0 = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %x, i32 519)  ; ~0x1f8 = "~finite"
  ret <4 x i1> %0
}

define <2 x i1> @isfinite_v2d(<2 x double> %x) {
; CHECK-LABEL: isfinite_v2d:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    mov x8, #9218868437227405312 // =0x7ff0000000000000
; CHECK-NEXT:    fabs v0.2d, v0.2d
; CHECK-NEXT:    dup v1.2d, x8
; CHECK-NEXT:    fcmgt v2.2d, v0.2d, v1.2d
; CHECK-NEXT:    fcmgt v0.2d, v1.2d, v0.2d
; CHECK-NEXT:    orr v0.16b, v0.16b, v2.16b
; CHECK-NEXT:    xtn v0.2s, v0.2d
; CHECK-NEXT:    ret
entry:
  %0 = tail call <2 x i1> @llvm.is.fpclass.v2f64(<2 x double> %x, i32 504)  ; 0x1f8 = "finite"
  ret <2 x i1> %0
}

define <2 x i1> @not_isfinite_v2d(<2 x double> %x) {
; CHECK-LABEL: not_isfinite_v2d:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    movi v1.2d, #0xffffffffffffffff
; CHECK-NEXT:    mov x8, #9218868437227405312 // =0x7ff0000000000000
; CHECK-NEXT:    fneg v1.2d, v1.2d
; CHECK-NEXT:    and v0.16b, v0.16b, v1.16b
; CHECK-NEXT:    dup v1.2d, x8
; CHECK-NEXT:    cmge v0.2d, v0.2d, v1.2d
; CHECK-NEXT:    xtn v0.2s, v0.2d
; CHECK-NEXT:    ret
entry:
  %0 = tail call <2 x i1> @llvm.is.fpclass.v2f64(<2 x double> %x, i32 519)  ; ~0x1f8 = "~finite"
  ret <2 x i1> %0
}

define <4 x i1> @isfinite_v4bf16(<4 x bfloat> %x) {
; CHECK-LABEL: isfinite_v4bf16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    mov w8, #32640 // =0x7f80
; CHECK-NEXT:    bic v0.4h, #128, lsl #8
; CHECK-NEXT:    dup v1.4h, w8
; CHECK-NEXT:    cmgt v0.4h, v1.4h, v0.4h
; CHECK-NEXT:    ret
entry:
  %0 = tail call <4 x i1> @llvm.is.fpclass.v4bf16(<4 x bfloat> %x, i32 504)  ; 0x1f8 = "finite"
  ret <4 x i1> %0
}

define <4 x i1> @not_isfinite_v4bf16(<4 x bfloat> %x) {
; CHECK-LABEL: not_isfinite_v4bf16:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    mov w8, #32640 // =0x7f80
; CHECK-NEXT:    bic v0.4h, #128, lsl #8
; CHECK-NEXT:    dup v1.4h, w8
; CHECK-NEXT:    cmge v0.4h, v0.4h, v1.4h
; CHECK-NEXT:    ret
entry:
  %0 = tail call <4 x i1> @llvm.is.fpclass.v4bf16(<4 x bfloat> %x, i32 519)  ; ~0x1f8 = "~finite"
  ret <4 x i1> %0
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-GI: {{.*}}
; CHECK-SD: {{.*}}