test/CodeGen/AArch64/arm64-copy-phys-zero-reg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="-zcz-gpr32,-zcz-gpr64" %s \
# RUN:    | FileCheck --check-prefix=CHECK-NOZCZ-GPR32-NOZCZ-GPR64 %s
# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="+zcz-gpr32,-zcz-gpr64" %s \
# RUN:    | FileCheck --check-prefix=CHECK-ZCZ-GPR32-NOZCZ-GPR64 %s
# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="-zcz-gpr32,+zcz-gpr64" %s \
# RUN:    | FileCheck --check-prefix=CHECK-NOZCZ-GPR32-ZCZ-GPR64 %s
# RUN: llc -o - -mtriple=arm64-apple-ios -run-pass=postrapseudos -simplify-mir -verify-machineinstrs -mattr="+zcz-gpr32,+zcz-gpr64" %s \
# RUN:    | FileCheck --check-prefix=CHECK-ZCZ-GPR32-ZCZ-GPR64 %s

--- |
  define void @f0(i64 noundef %x) { ret void }
  define void @f1(i64 noundef %x) { ret void }
  define void @f2(i32 noundef) { ret void }
...
---
name:            f0
liveins:
  - { reg: '$x0' }
body:             |
  bb.0:
    liveins: $x0, $lr
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f0
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: $w0 = ORRWrr $wzr, $wzr
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    ;
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f0
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: $w0 = MOVZWi 0, 0
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    ;
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-LABEL: name: f0
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: $x0 = MOVZXi 0, 0
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    ;
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-LABEL: name: f0
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: $w0 = MOVZWi 0, 0
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    $w0 = COPY $wzr
    BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
...
---
name:            f1
liveins:
  - { reg: '$x0' }
body:             |
  bb.0:
    liveins: $x0, $lr
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f1
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: $x0 = ORRXrr $xzr, $xzr
    ; CHECK-NOZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    ;
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-LABEL: name: f1
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: $x0 = ORRXrr $xzr, $xzr
    ; CHECK-ZCZ-GPR32-NOZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    ;
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-LABEL: name: f1
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: $x0 = MOVZXi 0, 0
    ; CHECK-NOZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    ;
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-LABEL: name: f1
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64: liveins: $x0, $lr
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: {{  $}}
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: $x0 = MOVZXi 0, 0
    ; CHECK-ZCZ-GPR32-ZCZ-GPR64-NEXT: BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
    $x0 = COPY $xzr
    BL @f2, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
...