test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=znver2 < %s | FileCheck %s

define void @test(i32 %arg, i32 %arg1, i64 %arg2) {
; CHECK-LABEL: define void @test(
; CHECK-SAME: i32 [[ARG:%.*]], i32 [[ARG1:%.*]], i64 [[ARG2:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[BB:.*]]:
; CHECK-NEXT:    br label %[[BB3:.*]]
; CHECK:       [[BB3]]:
; CHECK-NEXT:    [[TMP3:%.*]] = phi i64 [ 0, %[[BB3]] ], [ 0, %[[BB]] ]
; CHECK-NEXT:    [[PHI4:%.*]] = phi i64 [ [[TMP22:%.*]], %[[BB3]] ], [ 0, %[[BB]] ]
; CHECK-NEXT:    [[ADD18:%.*]] = add i64 1, 0
; CHECK-NEXT:    [[TRUNC19:%.*]] = trunc i64 [[ADD18]] to i32
; CHECK-NEXT:    [[TRUNC28:%.*]] = trunc i64 [[ARG2]] to i32
; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i64 [[TMP3]] to i32
; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i32> <i32 poison, i32 0, i32 poison, i32 0>, i32 [[TRUNC]], i32 0
; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 3>
; CHECK-NEXT:    [[TMP5:%.*]] = or <4 x i32> zeroinitializer, [[TMP2]]
; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <4 x i32> [[TMP5]], i32 0
; CHECK-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP4]] to i64
; CHECK-NEXT:    [[TRUNC10:%.*]] = trunc i64 [[TMP10]] to i32
; CHECK-NEXT:    [[SHL:%.*]] = shl i32 0, 1
; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <4 x i32> [[TMP5]], i32 2
; CHECK-NEXT:    [[TMP7:%.*]] = zext i32 [[TMP6]] to i64
; CHECK-NEXT:    [[TRUNC27:%.*]] = trunc i64 [[TMP7]] to i32
; CHECK-NEXT:    [[OR11:%.*]] = or i32 [[TRUNC27]], 0
; CHECK-NEXT:    [[TMP8:%.*]] = or <4 x i32> zeroinitializer, [[TMP2]]
; CHECK-NEXT:    [[TMP9:%.*]] = mul <4 x i32> [[TMP5]], [[TMP8]]
; CHECK-NEXT:    [[XOR38:%.*]] = xor i32 [[ARG]], [[TRUNC28]]
; CHECK-NEXT:    [[SHL35:%.*]] = shl i32 [[ARG1]], 0
; CHECK-NEXT:    [[XOR31:%.*]] = xor i32 [[ARG1]], [[TRUNC19]]
; CHECK-NEXT:    [[XOR37:%.*]] = xor i32 [[ARG]], [[TRUNC27]]
; CHECK-NEXT:    [[SHL17:%.*]] = shl i32 [[SHL]], 0
; CHECK-NEXT:    [[XOR:%.*]] = xor i32 0, [[TRUNC10]]
; CHECK-NEXT:    [[TMP23:%.*]] = insertelement <8 x i32> poison, i32 [[SHL]], i32 0
; CHECK-NEXT:    [[TMP11:%.*]] = insertelement <8 x i32> [[TMP23]], i32 [[XOR]], i32 1
; CHECK-NEXT:    [[TMP12:%.*]] = insertelement <8 x i32> [[TMP11]], i32 [[SHL17]], i32 2
; CHECK-NEXT:    [[TMP13:%.*]] = insertelement <8 x i32> [[TMP12]], i32 [[XOR37]], i32 3
; CHECK-NEXT:    [[TMP14:%.*]] = insertelement <8 x i32> [[TMP13]], i32 [[XOR31]], i32 5
; CHECK-NEXT:    [[TMP15:%.*]] = insertelement <8 x i32> [[TMP14]], i32 [[SHL35]], i32 6
; CHECK-NEXT:    [[TMP16:%.*]] = insertelement <8 x i32> [[TMP15]], i32 [[XOR38]], i32 7
; CHECK-NEXT:    [[TMP17:%.*]] = shufflevector <8 x i32> [[TMP16]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7>
; CHECK-NEXT:    [[TMP18:%.*]] = shufflevector <8 x i32> [[TMP17]], <8 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT:    [[TMP19:%.*]] = shufflevector <4 x i32> [[TMP9]], <4 x i32> poison, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT:    [[TMP20:%.*]] = shufflevector <12 x i32> [[TMP18]], <12 x i32> [[TMP19]], <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
; CHECK-NEXT:    [[TMP21:%.*]] = sext <12 x i32> [[TMP20]] to <12 x i64>
; CHECK-NEXT:    [[TMP22]] = call i64 @llvm.vector.reduce.add.v12i64(<12 x i64> [[TMP21]])
; CHECK-NEXT:    br i1 false, label %[[BB40:.*]], label %[[BB3]]
; CHECK:       [[BB40]]:
; CHECK-NEXT:    [[PHI41:%.*]] = phi i64 [ [[TMP22]], %[[BB3]] ]
; CHECK-NEXT:    ret void
;
bb:
  br label %bb3

bb3:
  %phi = phi i64 [ 0, %bb3 ], [ 0, %bb ]
  %phi4 = phi i64 [ %add39, %bb3 ], [ 0, %bb ]
  %or = or i64 %phi, 0
  %trunc = trunc i64 %or to i32
  %or5 = or i64 %phi, 0
  %mul = mul i64 %or, %or5
  %or6 = or i64 0, 0
  %or7 = or i64 0, 0
  %mul8 = mul i64 %or6, %or7
  %shl = shl i32 0, 1
  %or9 = or i64 %phi, 0
  %trunc10 = trunc i64 %or9 to i32
  %or11 = or i32 %trunc10, 0
  %or12 = or i64 %phi, 0
  %mul13 = mul i64 %or9, %or12
  %add = add i64 %mul, %mul8
  %sext = sext i32 %shl to i64
  %add14 = add i64 %add, %sext
  %xor = xor i32 0, %trunc
  %sext15 = sext i32 %xor to i64
  %add16 = add i64 %add14, %sext15
  %shl17 = shl i32 %shl, 0
  %add18 = add i64 1, 0
  %trunc19 = trunc i64 %add18 to i32
  %mul20 = mul i64 0, 0
  %add21 = add i64 %mul13, %add16
  %sext22 = sext i32 %shl17 to i64
  %add23 = add i64 %add21, %sext22
  %xor24 = xor i32 %arg, %trunc10
  %sext25 = sext i32 %xor24 to i64
  %add26 = add i64 %add23, %sext25
  %trunc27 = trunc i64 %arg2 to i32
  %add28 = add i64 %mul20, %add26
  %sext29 = sext i32 %shl to i64
  %add30 = add i64 %add28, %sext29
  %xor31 = xor i32 %arg1, %trunc19
  %sext32 = sext i32 %xor31 to i64
  %add33 = add i64 %add30, %sext32
  %shl34 = shl i32 %arg1, 0
  %sext35 = sext i32 %shl34 to i64
  %add36 = add i64 %add33, %sext35
  %xor37 = xor i32 %arg, %trunc27
  %sext38 = sext i32 %xor37 to i64
  %add39 = add i64 %add36, %sext38
  br i1 false, label %bb40, label %bb3

bb40:
  %phi41 = phi i64 [ %add39, %bb3 ]
  ret void
}