test/Transforms/SLPVectorizer/X86/callbr-extract.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s

; Make sure SLP does not try to insert new extractelements after a callbr
; terminator when the source vector is produced by callbr.

define i32 @test(ptr %0) {
; CHECK-LABEL: define i32 @test(
; CHECK-SAME: ptr [[TMP0:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[TMP1:%.*]] = callbr <2 x i16> asm "", "=v,!i"()
; CHECK-NEXT:            to label %[[NORMAL:.*]] [label %[[INDIRECT:.*]]]
; CHECK:       [[NORMAL]]:
; CHECK-NEXT:    [[TMP2:%.*]] = extractelement <2 x i16> [[TMP1]], i64 0
; CHECK-NEXT:    [[OR1:%.*]] = or i16 [[TMP2]], 1
; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <2 x i16> [[TMP1]], i64 1
; CHECK-NEXT:    [[OR2:%.*]] = or i16 [[TMP3]], 1
; CHECK-NEXT:    [[TMP4:%.*]] = zext i16 [[TMP3]] to i64
; CHECK-NEXT:    call void @use(i64 [[TMP4]])
; CHECK-NEXT:    [[TMP5:%.*]] = zext <2 x i16> [[TMP1]] to <2 x i64>
; CHECK-NEXT:    store <2 x i64> [[TMP5]], ptr [[TMP0]], align 8
; CHECK-NEXT:    ret i32 0
; CHECK:       [[INDIRECT]]:
; CHECK-NEXT:    ret i32 0
;
entry:
  %1 = callbr <2 x i16> asm "", "=v,!i"() to label %normal [label %indirect]

normal:
  %2 = extractelement <2 x i16> %1, i64 0
  %or1 = or i16 %2, 1
  %3 = extractelement <2 x i16> %1, i64 1
  %or2 = or i16 %3, 1
  %4 = zext i16 %3 to i64
  call void @use(i64 %4)
  %5 = zext i16 %2 to i64
  store i64 %5, ptr %0, align 8
  %6 = getelementptr i8, ptr %0, i64 8
  store i64 %4, ptr %6, align 8
  ret i32 0

indirect:
  ret i32 0
}

declare void @use(i64)