| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6 |
| ; RUN: opt -p loop-vectorize -force-vector-width=2 -S %s | FileCheck %s |
| |
| define void @wide_gep_all_lanes_live_only_scalar_users(ptr noalias %dst, ptr noalias %src, i64 %n) { |
| ; CHECK-LABEL: define void @wide_gep_all_lanes_live_only_scalar_users( |
| ; CHECK-SAME: ptr noalias [[DST:%.*]], ptr noalias [[SRC:%.*]], i64 [[N:%.*]]) { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_SCEVCHECK:.*]] |
| ; CHECK: [[VECTOR_SCEVCHECK]]: |
| ; CHECK-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]]) |
| ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL]], 0 |
| ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 |
| ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[DST]], i64 [[MUL_RESULT]] |
| ; CHECK-NEXT: [[TMP2:%.*]] = icmp ult ptr [[TMP1]], [[DST]] |
| ; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP2]], [[MUL_OVERFLOW]] |
| ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 4 |
| ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 [[MUL_RESULT]] |
| ; CHECK-NEXT: [[TMP5:%.*]] = icmp ult ptr [[TMP4]], [[SCEVGEP]] |
| ; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP5]], [[MUL_OVERFLOW]] |
| ; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 8 |
| ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[SCEVGEP1]], i64 [[MUL_RESULT]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = icmp ult ptr [[TMP7]], [[SCEVGEP1]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[MUL_OVERFLOW]] |
| ; CHECK-NEXT: [[TMP10:%.*]] = or i1 [[TMP3]], [[TMP6]] |
| ; CHECK-NEXT: [[TMP11:%.*]] = or i1 [[TMP10]], [[TMP9]] |
| ; CHECK-NEXT: br i1 [[TMP11]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP0]], 1 |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[TMP12]] |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE11:.*]] ] |
| ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE11]] ] |
| ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP13]], align 4 |
| ; CHECK-NEXT: [[TMP14:%.*]] = fcmp ogt <2 x float> [[WIDE_LOAD]], zeroinitializer |
| ; CHECK-NEXT: [[WIDE_GEP:%.*]] = getelementptr { [4 x float] }, ptr [[DST]], <2 x i64> [[VEC_IND]] |
| ; CHECK-NEXT: [[TMP15:%.*]] = sitofp <2 x i64> [[VEC_IND]] to <2 x float> |
| ; CHECK-NEXT: [[TMP16:%.*]] = extractelement <2 x i1> [[TMP14]], i64 0 |
| ; CHECK-NEXT: br i1 [[TMP16]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; CHECK: [[PRED_STORE_IF]]: |
| ; CHECK-NEXT: [[TMP17:%.*]] = extractelement <2 x float> [[TMP15]], i64 0 |
| ; CHECK-NEXT: [[TMP18:%.*]] = extractelement <2 x ptr> [[WIDE_GEP]], i64 0 |
| ; CHECK-NEXT: store float [[TMP17]], ptr [[TMP18]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; CHECK: [[PRED_STORE_CONTINUE]]: |
| ; CHECK-NEXT: [[TMP19:%.*]] = extractelement <2 x i1> [[TMP14]], i64 1 |
| ; CHECK-NEXT: br i1 [[TMP19]], label %[[PRED_STORE_IF2:.*]], label %[[PRED_STORE_CONTINUE3:.*]] |
| ; CHECK: [[PRED_STORE_IF2]]: |
| ; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x float> [[TMP15]], i64 1 |
| ; CHECK-NEXT: [[TMP21:%.*]] = extractelement <2 x ptr> [[WIDE_GEP]], i64 1 |
| ; CHECK-NEXT: store float [[TMP20]], ptr [[TMP21]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE3]] |
| ; CHECK: [[PRED_STORE_CONTINUE3]]: |
| ; CHECK-NEXT: [[TMP22:%.*]] = fadd <2 x float> [[TMP15]], splat (float 1.000000e+02) |
| ; CHECK-NEXT: br i1 [[TMP16]], label %[[PRED_STORE_IF4:.*]], label %[[PRED_STORE_CONTINUE5:.*]] |
| ; CHECK: [[PRED_STORE_IF4]]: |
| ; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x ptr> [[WIDE_GEP]], i64 0 |
| ; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP23]], i64 4 |
| ; CHECK-NEXT: [[TMP25:%.*]] = extractelement <2 x float> [[TMP22]], i64 0 |
| ; CHECK-NEXT: store float [[TMP25]], ptr [[TMP24]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE5]] |
| ; CHECK: [[PRED_STORE_CONTINUE5]]: |
| ; CHECK-NEXT: br i1 [[TMP19]], label %[[PRED_STORE_IF6:.*]], label %[[PRED_STORE_CONTINUE7:.*]] |
| ; CHECK: [[PRED_STORE_IF6]]: |
| ; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x ptr> [[WIDE_GEP]], i64 1 |
| ; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP26]], i64 4 |
| ; CHECK-NEXT: [[TMP28:%.*]] = extractelement <2 x float> [[TMP22]], i64 1 |
| ; CHECK-NEXT: store float [[TMP28]], ptr [[TMP27]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE7]] |
| ; CHECK: [[PRED_STORE_CONTINUE7]]: |
| ; CHECK-NEXT: [[TMP29:%.*]] = fadd <2 x float> [[TMP15]], splat (float 2.000000e+02) |
| ; CHECK-NEXT: br i1 [[TMP16]], label %[[PRED_STORE_IF8:.*]], label %[[PRED_STORE_CONTINUE9:.*]] |
| ; CHECK: [[PRED_STORE_IF8]]: |
| ; CHECK-NEXT: [[TMP30:%.*]] = extractelement <2 x ptr> [[WIDE_GEP]], i64 0 |
| ; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i64 8 |
| ; CHECK-NEXT: [[TMP32:%.*]] = extractelement <2 x float> [[TMP29]], i64 0 |
| ; CHECK-NEXT: store float [[TMP32]], ptr [[TMP31]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE9]] |
| ; CHECK: [[PRED_STORE_CONTINUE9]]: |
| ; CHECK-NEXT: br i1 [[TMP19]], label %[[PRED_STORE_IF10:.*]], label %[[PRED_STORE_CONTINUE11]] |
| ; CHECK: [[PRED_STORE_IF10]]: |
| ; CHECK-NEXT: [[TMP33:%.*]] = extractelement <2 x ptr> [[WIDE_GEP]], i64 1 |
| ; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP33]], i64 8 |
| ; CHECK-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[TMP29]], i64 1 |
| ; CHECK-NEXT: store float [[TMP35]], ptr [[TMP34]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE11]] |
| ; CHECK: [[PRED_STORE_CONTINUE11]]: |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], splat (i64 2) |
| ; CHECK-NEXT: [[TMP36:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP36]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ], [ 0, %[[VECTOR_SCEVCHECK]] ] |
| ; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] |
| ; CHECK: [[LOOP_HEADER]]: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[IV]] |
| ; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4 |
| ; CHECK-NEXT: [[C:%.*]] = fcmp ogt float [[L]], 0.000000e+00 |
| ; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]] |
| ; CHECK: [[THEN]]: |
| ; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr { [4 x float] }, ptr [[DST]], i64 [[IV]] |
| ; CHECK-NEXT: [[FV:%.*]] = sitofp i64 [[IV]] to float |
| ; CHECK-NEXT: store float [[FV]], ptr [[GEP_DST]], align 4 |
| ; CHECK-NEXT: [[GEP_DST_1:%.*]] = getelementptr i8, ptr [[GEP_DST]], i64 4 |
| ; CHECK-NEXT: [[FV_1:%.*]] = fadd float [[FV]], 1.000000e+02 |
| ; CHECK-NEXT: store float [[FV_1]], ptr [[GEP_DST_1]], align 4 |
| ; CHECK-NEXT: [[GEP_DST_2:%.*]] = getelementptr i8, ptr [[GEP_DST]], i64 8 |
| ; CHECK-NEXT: [[FV_2:%.*]] = fadd float [[FV]], 2.000000e+02 |
| ; CHECK-NEXT: store float [[FV_2]], ptr [[GEP_DST_2]], align 4 |
| ; CHECK-NEXT: [[GEP_DST_3:%.*]] = getelementptr i8, ptr [[GEP_DST]], i64 16 |
| ; CHECK-NEXT: br label %[[LOOP_LATCH]] |
| ; CHECK: [[LOOP_LATCH]]: |
| ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] |
| ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] |
| %gep.src = getelementptr inbounds float, ptr %src, i64 %iv |
| %l = load float, ptr %gep.src, align 4 |
| %c = fcmp ogt float %l, 0.000000e+00 |
| br i1 %c, label %then, label %loop.latch |
| |
| then: |
| %gep.dst = getelementptr { [4 x float] }, ptr %dst, i64 %iv |
| %fv = sitofp i64 %iv to float |
| store float %fv, ptr %gep.dst, align 4 |
| %gep.dst.1 = getelementptr i8, ptr %gep.dst, i64 4 |
| %fv.1 = fadd float %fv, 1.000000e+02 |
| store float %fv.1, ptr %gep.dst.1, align 4 |
| %gep.dst.2 = getelementptr i8, ptr %gep.dst, i64 8 |
| %fv.2 = fadd float %fv, 2.000000e+02 |
| store float %fv.2, ptr %gep.dst.2, align 4 |
| ; %gep.dst.3 is intentionally dead: it keeps %gep.dst off the up-front scalar |
| ; list, so that %gep.dst is widened. Giving it a user makes %gep.dst scalar |
| ; again and the test stops covering the wide-GEP shape. |
| %gep.dst.3 = getelementptr i8, ptr %gep.dst, i64 16 |
| br label %loop.latch |
| |
| loop.latch: |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, %n |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| ; All lanes of the increment %j.next are live, but its only user is a |
| ; replicated store, so it can be replicated per lane instead of being computed |
| ; as a vector and taken apart again by one extractelement per lane. |
| define void @int_iv_increment_only_scalar_users(ptr noalias %dst, ptr noalias %src, i64 %n) { |
| ; |
| ; |
| ; CHECK-LABEL: define void @int_iv_increment_only_scalar_users( |
| ; CHECK-SAME: ptr noalias [[DST:%.*]], ptr noalias [[SRC:%.*]], i64 [[N:%.*]]) { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1 |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[TMP1]] |
| ; CHECK-NEXT: [[TMP2:%.*]] = add i64 100, [[N_VEC]] |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 100, i64 101>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE2]] ] |
| ; CHECK-NEXT: [[TMP3:%.*]] = add <2 x i64> [[VEC_IND]], splat (i64 1) |
| ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP4]], align 4 |
| ; CHECK-NEXT: [[TMP5:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], zeroinitializer |
| ; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i1> [[TMP5]], i64 0 |
| ; CHECK-NEXT: br i1 [[TMP6]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; CHECK: [[PRED_STORE_IF]]: |
| ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i64> [[TMP3]], i64 0 |
| ; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP7]], align 8 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; CHECK: [[PRED_STORE_CONTINUE]]: |
| ; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i1> [[TMP5]], i64 1 |
| ; CHECK-NEXT: br i1 [[TMP9]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; CHECK: [[PRED_STORE_IF1]]: |
| ; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 1 |
| ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[TMP10]] |
| ; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x i64> [[TMP3]], i64 1 |
| ; CHECK-NEXT: store i64 [[TMP12]], ptr [[TMP11]], align 8 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; CHECK: [[PRED_STORE_CONTINUE2]]: |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], splat (i64 2) |
| ; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP13]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i64 [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ 100, %[[ENTRY]] ] |
| ; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] |
| ; CHECK: [[LOOP_HEADER]]: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[J_NEXT:%.*]], %[[LOOP_LATCH]] ] |
| ; CHECK-NEXT: [[J_NEXT]] = add i64 [[J]], 1 |
| ; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 [[IV]] |
| ; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[GEP_SRC]], align 4 |
| ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[L]], 0 |
| ; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]] |
| ; CHECK: [[THEN]]: |
| ; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[IV]] |
| ; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8 |
| ; CHECK-NEXT: br label %[[LOOP_LATCH]] |
| ; CHECK: [[LOOP_LATCH]]: |
| ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] |
| ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] |
| %j = phi i64 [ 100, %entry ], [ %j.next, %loop.latch ] |
| %j.next = add i64 %j, 1 |
| %gep.src = getelementptr inbounds i32, ptr %src, i64 %iv |
| %l = load i32, ptr %gep.src, align 4 |
| %c = icmp sgt i32 %l, 0 |
| br i1 %c, label %then, label %loop.latch |
| |
| then: |
| %gep.dst = getelementptr inbounds i64, ptr %dst, i64 %iv |
| store i64 %j.next, ptr %gep.dst, align 8 |
| br label %loop.latch |
| |
| loop.latch: |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, %n |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| define void @fp_iv_increment_only_scalar_users(ptr noalias %dst, ptr noalias %src, i64 %n) { |
| ; CHECK-LABEL: define void @fp_iv_increment_only_scalar_users( |
| ; CHECK-SAME: ptr noalias [[DST:%.*]], ptr noalias [[SRC:%.*]], i64 [[N:%.*]]) { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1 |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[TMP1]] |
| ; CHECK-NEXT: [[TMP2:%.*]] = sitofp i64 [[N_VEC]] to float |
| ; CHECK-NEXT: [[TMP3:%.*]] = fmul fast float 1.000000e+00, [[TMP2]] |
| ; CHECK-NEXT: [[TMP4:%.*]] = fsub fast float 1.000000e+03, [[TMP3]] |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x float> [ <float 1.000000e+03, float 9.990000e+02>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE2]] ] |
| ; CHECK-NEXT: [[TMP5:%.*]] = fsub fast <2 x float> [[VEC_IND]], splat (float 1.000000e+00) |
| ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP6]], align 4 |
| ; CHECK-NEXT: [[TMP7:%.*]] = fcmp ogt <2 x float> [[WIDE_LOAD]], zeroinitializer |
| ; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP7]], i64 0 |
| ; CHECK-NEXT: br i1 [[TMP8]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; CHECK: [[PRED_STORE_IF]]: |
| ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[TMP5]], i64 0 |
| ; CHECK-NEXT: store float [[TMP10]], ptr [[TMP9]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; CHECK: [[PRED_STORE_CONTINUE]]: |
| ; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP7]], i64 1 |
| ; CHECK-NEXT: br i1 [[TMP11]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; CHECK: [[PRED_STORE_IF1]]: |
| ; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], 1 |
| ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[TMP12]] |
| ; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x float> [[TMP5]], i64 1 |
| ; CHECK-NEXT: store float [[TMP14]], ptr [[TMP13]], align 4 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; CHECK: [[PRED_STORE_CONTINUE2]]: |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; CHECK-NEXT: [[VEC_IND_NEXT]] = fsub fast <2 x float> [[VEC_IND]], splat (float 2.000000e+00) |
| ; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi float [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ 1.000000e+03, %[[ENTRY]] ] |
| ; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] |
| ; CHECK: [[LOOP_HEADER]]: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; CHECK-NEXT: [[FIV:%.*]] = phi float [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[FIV_NEXT:%.*]], %[[LOOP_LATCH]] ] |
| ; CHECK-NEXT: [[FIV_NEXT]] = fsub fast float [[FIV]], 1.000000e+00 |
| ; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds float, ptr [[SRC]], i64 [[IV]] |
| ; CHECK-NEXT: [[L:%.*]] = load float, ptr [[GEP_SRC]], align 4 |
| ; CHECK-NEXT: [[C:%.*]] = fcmp ogt float [[L]], 0.000000e+00 |
| ; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]] |
| ; CHECK: [[THEN]]: |
| ; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV]] |
| ; CHECK-NEXT: store float [[FIV_NEXT]], ptr [[GEP_DST]], align 4 |
| ; CHECK-NEXT: br label %[[LOOP_LATCH]] |
| ; CHECK: [[LOOP_LATCH]]: |
| ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] |
| ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] |
| %fiv = phi float [ 1.000000e+03, %entry ], [ %fiv.next, %loop.latch ] |
| %fiv.next = fsub fast float %fiv, 1.000000e+00 |
| %gep.src = getelementptr inbounds float, ptr %src, i64 %iv |
| %l = load float, ptr %gep.src, align 4 |
| %c = fcmp ogt float %l, 0.000000e+00 |
| br i1 %c, label %then, label %loop.latch |
| |
| then: |
| %gep.dst = getelementptr inbounds float, ptr %dst, i64 %iv |
| store float %fiv.next, ptr %gep.dst, align 4 |
| br label %loop.latch |
| |
| loop.latch: |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, %n |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| define void @increment_used_by_invariant_and_per_lane_store(ptr noalias %dst, ptr noalias %inv, ptr noalias %src, i64 %n) { |
| ; CHECK-LABEL: define void @increment_used_by_invariant_and_per_lane_store( |
| ; CHECK-SAME: ptr noalias [[DST:%.*]], ptr noalias [[INV:%.*]], ptr noalias [[SRC:%.*]], i64 [[N:%.*]]) { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2 |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 1 |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[TMP1]] |
| ; CHECK-NEXT: [[TMP2:%.*]] = add i64 100, [[N_VEC]] |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] |
| ; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 100, i64 101>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE2]] ] |
| ; CHECK-NEXT: [[TMP3:%.*]] = add <2 x i64> [[VEC_IND]], splat (i64 1) |
| ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i64> [[TMP3]], i64 1 |
| ; CHECK-NEXT: store i64 [[TMP4]], ptr [[INV]], align 8 |
| ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4 |
| ; CHECK-NEXT: [[TMP6:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], zeroinitializer |
| ; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x i1> [[TMP6]], i64 0 |
| ; CHECK-NEXT: br i1 [[TMP7]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] |
| ; CHECK: [[PRED_STORE_IF]]: |
| ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[INDEX]] |
| ; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i64> [[TMP3]], i64 0 |
| ; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP8]], align 8 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] |
| ; CHECK: [[PRED_STORE_CONTINUE]]: |
| ; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i1> [[TMP6]], i64 1 |
| ; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] |
| ; CHECK: [[PRED_STORE_IF1]]: |
| ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 1 |
| ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[TMP11]] |
| ; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i64> [[TMP3]], i64 1 |
| ; CHECK-NEXT: store i64 [[TMP13]], ptr [[TMP12]], align 8 |
| ; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]] |
| ; CHECK: [[PRED_STORE_CONTINUE2]]: |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 |
| ; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], splat (i64 2) |
| ; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP14]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i64 [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ 100, %[[ENTRY]] ] |
| ; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] |
| ; CHECK: [[LOOP_HEADER]]: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] |
| ; CHECK-NEXT: [[J:%.*]] = phi i64 [ [[BC_RESUME_VAL3]], %[[SCALAR_PH]] ], [ [[J_NEXT:%.*]], %[[LOOP_LATCH]] ] |
| ; CHECK-NEXT: [[J_NEXT]] = add i64 [[J]], 1 |
| ; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[INV]], align 8 |
| ; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 [[IV]] |
| ; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[GEP_SRC]], align 4 |
| ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[L]], 0 |
| ; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LOOP_LATCH]] |
| ; CHECK: [[THEN]]: |
| ; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[IV]] |
| ; CHECK-NEXT: store i64 [[J_NEXT]], ptr [[GEP_DST]], align 8 |
| ; CHECK-NEXT: br label %[[LOOP_LATCH]] |
| ; CHECK: [[LOOP_LATCH]]: |
| ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] |
| ; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] |
| %j = phi i64 [ 100, %entry ], [ %j.next, %loop.latch ] |
| %j.next = add i64 %j, 1 |
| store i64 %j.next, ptr %inv, align 8 |
| %gep.src = getelementptr inbounds i32, ptr %src, i64 %iv |
| %l = load i32, ptr %gep.src, align 4 |
| %c = icmp sgt i32 %l, 0 |
| br i1 %c, label %then, label %loop.latch |
| |
| then: |
| %gep.dst = getelementptr inbounds i64, ptr %dst, i64 %iv |
| store i64 %j.next, ptr %gep.dst, align 8 |
| br label %loop.latch |
| |
| loop.latch: |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, %n |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
