test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1,X86-AVX1
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86-AVX2
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F,X86-AVX512,X86-AVX512F
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW,X86-AVX512
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1,X64-AVX1
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64-AVX2
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F,X64-AVX512,X64-AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW,X64-AVX512

;===-----------------------------------------------------------------------------===
;    This test checks the ability to recognize a cross element pattern of
;    constants and perform the load via broadcasting a smaller constant
;    vector.
;    For example:
;    <i32 0, i32 3, i32 0, i32 3> => broadcast of the constant vector <i32 0, i32 3>
;===-----------------------------------------------------------------------------===

define <16 x i8> @f16xi8_i16(<16 x i8> %a) {
; AVX1-LABEL: f16xi8_i16:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} xmm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX1-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xi8_i16:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastw {{.*#+}} xmm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi8_i16:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastw {{.*#+}} xmm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX512-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <16 x i8> <i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3>, %a
  %res2 = and <16 x i8> <i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3>, %res1
  ret <16 x i8> %res2
}


define <16 x i8> @f16xi8_i32(<16 x i8> %a) {
; AVX1-LABEL: f16xi8_i32:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} xmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX1-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xi8_i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX2-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi8_i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>, %a
  %res2 = and <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>, %res1
  ret <16 x i8> %res2
}


define <16 x i8> @f16xi8_i64(<16 x i8> %a) {
; AVX1-LABEL: f16xi8_i64:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vmovddup {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX1-NEXT:    # xmm1 = mem[0,0]
; AVX1-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xi8_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX2-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi8_i64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX512-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %a
  %res2 = and <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %res1
  ret <16 x i8> %res2
}


define <32 x i8> @f32xi8_i16(<32 x i8> %a) {
; AVX1-LABEL: f32xi8_i16:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpaddb %xmm1, %xmm2, %xmm2
; AVX1-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f32xi8_i16:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastw {{.*#+}} ymm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f32xi8_i16:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastw {{.*#+}} ymm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX512-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <32 x i8> <i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3>, %a
  %res2 = and <32 x i8> <i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3>, %res1
  ret <32 x i8> %res2
}


define <32 x i8> @f32xi8_i32(<32 x i8> %a) {
; X86-AVX1-LABEL: f32xi8_i32:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X86-AVX1-NEXT:    vbroadcastss {{.*#+}} xmm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X86-AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; X86-AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0
; X86-AVX1-NEXT:    retl
;
; AVX2-LABEL: f32xi8_i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastd {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX2-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f32xi8_i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastd {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
;
; X64-AVX1-LABEL: f32xi8_i32:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X64-AVX1-NEXT:    vbroadcastss {{.*#+}} xmm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X64-AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; X64-AVX1-NEXT:    retq
  %res1 = add <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>, %a
  %res2 = and <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>, %res1
  ret <32 x i8> %res2
}


define <32 x i8> @f32xi8_i64(<32 x i8> %a) {
; X86-AVX1-LABEL: f32xi8_i64:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X86-AVX1-NEXT:    vmovddup {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; X86-AVX1-NEXT:    # xmm2 = mem[0,0]
; X86-AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; X86-AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0
; X86-AVX1-NEXT:    retl
;
; AVX2-LABEL: f32xi8_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX2-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f32xi8_i64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX512-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
;
; X64-AVX1-LABEL: f32xi8_i64:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X64-AVX1-NEXT:    vmovddup {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; X64-AVX1-NEXT:    # xmm2 = mem[0,0]
; X64-AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; X64-AVX1-NEXT:    retq
  %res1 = add <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %a
  %res2 = and <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %res1
  ret <32 x i8> %res2
}


define <32 x i8> @f32xi8_i128(<32 x i8> %a) {
; AVX1-LABEL: f32xi8_i128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX1-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpaddb %xmm1, %xmm2, %xmm2
; AVX1-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f32xi8_i128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX2-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX2-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f32xi8_i128:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX512-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, %a
  %res2 = and <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, %res1
  ret <32 x i8> %res2
}


define <64 x i8> @f64xi8_i16(<64 x i8> %a) {
; AVX1-LABEL: f64xi8_i16:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f64xi8_i16:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastw {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512F-LABEL: f64xi8_i16:
; X86-AVX512F:       # %bb.0:
; X86-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X86-AVX512F-NEXT:    vpbroadcastw {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X86-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X86-AVX512F-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm0, %zmm0
; X86-AVX512F-NEXT:    retl
;
; AVX512BW-LABEL: f64xi8_i16:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vpbroadcastw {{.*#+}} zmm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX512BW-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
;
; X64-AVX512F-LABEL: f64xi8_i16:
; X64-AVX512F:       # %bb.0:
; X64-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X64-AVX512F-NEXT:    vpbroadcastw {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X64-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X64-AVX512F-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0
; X64-AVX512F-NEXT:    retq
  %res1 = add <64 x i8> <i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3>, %a
  %res2 = and <64 x i8> <i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3, i8 0, i8 3>, %res1
  ret <64 x i8> %res2
}


define <64 x i8> @f64i8_i32(<64 x i8> %a) {
; AVX1-LABEL: f64i8_i32:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f64i8_i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastd {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX2-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512F-LABEL: f64i8_i32:
; X86-AVX512F:       # %bb.0:
; X86-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X86-AVX512F-NEXT:    vpbroadcastd {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X86-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X86-AVX512F-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm0, %zmm0
; X86-AVX512F-NEXT:    retl
;
; AVX512BW-LABEL: f64i8_i32:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vpbroadcastd {{.*#+}} zmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
;
; X64-AVX512F-LABEL: f64i8_i32:
; X64-AVX512F:       # %bb.0:
; X64-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X64-AVX512F-NEXT:    vpbroadcastd {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X64-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X64-AVX512F-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0
; X64-AVX512F-NEXT:    retq
  %res1 = add <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>, %a
  %res2 = and <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>, %res1
  ret <64 x i8> %res2
}


define <64 x i8> @f64xi8_i64(<64 x i8> %a) {
; AVX1-LABEL: f64xi8_i64:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastsd {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f64xi8_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX2-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512F-LABEL: f64xi8_i64:
; X86-AVX512F:       # %bb.0:
; X86-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X86-AVX512F-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X86-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X86-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm0, %zmm0
; X86-AVX512F-NEXT:    retl
;
; AVX512BW-LABEL: f64xi8_i64:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vpbroadcastq {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX512BW-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
;
; X64-AVX512F-LABEL: f64xi8_i64:
; X64-AVX512F:       # %bb.0:
; X64-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X64-AVX512F-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X64-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X64-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0
; X64-AVX512F-NEXT:    retq
  %res1 = add <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %a
  %res2 = and <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %res1
  ret <64 x i8> %res2
}


define <64 x i8> @f64xi8_i128(<64 x i8> %a) {
; AVX1-LABEL: f64xi8_i128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f64xi8_i128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX2-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512F-LABEL: f64xi8_i128:
; X86-AVX512F:       # %bb.0:
; X86-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X86-AVX512F-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; X86-AVX512F-NEXT:    # ymm2 = mem[0,1,0,1]
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X86-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X86-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X86-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm0
; X86-AVX512F-NEXT:    retl
;
; AVX512BW-LABEL: f64xi8_i128:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
;
; X64-AVX512F-LABEL: f64xi8_i128:
; X64-AVX512F:       # %bb.0:
; X64-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X64-AVX512F-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; X64-AVX512F-NEXT:    # ymm2 = mem[0,1,0,1]
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; X64-AVX512F-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; X64-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X64-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; X64-AVX512F-NEXT:    retq
  %res1 = add <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, %a
  %res2 = and <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, %res1
  ret <64 x i8> %res2
}


define <64 x i8> @f64xi8_i256(<64 x i8> %a) {
; AVX1-LABEL: f64xi8_i256:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX1-NEXT:    vpaddb %xmm3, %xmm2, %xmm2
; AVX1-NEXT:    vmovdqa {{.*#+}} ymm4 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX1-NEXT:    vpaddb %xmm4, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpaddb %xmm3, %xmm2, %xmm2
; AVX1-NEXT:    vpaddb %xmm4, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm4, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm4, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f64xi8_i256:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX2-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512F-LABEL: f64xi8_i256:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX512F-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm2
; AVX512F-NEXT:    vpaddb %ymm1, %ymm2, %ymm2
; AVX512F-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
; AVX512F-NEXT:    vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; AVX512F-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512F-NEXT:    ret{{[l|q]}}
;
; AVX512BW-LABEL: f64xi8_i256:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX512BW-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512BW-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
  %res1 = add <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, %a
  %res2 = and <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, %res1
  ret <64 x i8> %res2
}


define <8 x i16> @f8xi16_i32(<8 x i16> %a) {
; AVX1-LABEL: f8xi16_i32:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} xmm1 = [0,3,0,3,0,3,0,3]
; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f8xi16_i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f8xi16_i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [0,3,0,3,0,3,0,3]
; AVX512-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <8 x i16> <i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3>, %a
  %res2 = and <8 x i16> <i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3>, %res1
  ret <8 x i16> %res2
}


define <8 x i16> @f8xi16_i64(<8 x i16> %a) {
; AVX1-LABEL: f8xi16_i64:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vmovddup {{.*#+}} xmm1 = [0,1,2,3,0,1,2,3]
; AVX1-NEXT:    # xmm1 = mem[0,0]
; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f8xi16_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [0,1,2,3,0,1,2,3]
; AVX2-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f8xi16_i64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3>, %a
  %res2 = and <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3>, %res1
  ret <8 x i16> %res2
}


define <16 x i16> @f16xi16_i32(<16 x i16> %a) {
; X86-AVX1-LABEL: f16xi16_i32:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X86-AVX1-NEXT:    vbroadcastss {{.*#+}} xmm2 = [0,3,0,3,0,3,0,3]
; X86-AVX1-NEXT:    vpaddw %xmm2, %xmm1, %xmm1
; X86-AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0
; X86-AVX1-NEXT:    retl
;
; AVX2-LABEL: f16xi16_i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastd {{.*#+}} ymm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi16_i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastd {{.*#+}} ymm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX512-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
;
; X64-AVX1-LABEL: f16xi16_i32:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X64-AVX1-NEXT:    vbroadcastss {{.*#+}} xmm2 = [0,3,0,3,0,3,0,3]
; X64-AVX1-NEXT:    vpaddw %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; X64-AVX1-NEXT:    retq
  %res1 = add <16 x i16> <i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3>, %a
  %res2 = and <16 x i16> <i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3>, %res1
  ret <16 x i16> %res2
}


define <16 x i16> @f16xi16_i64(<16 x i16> %a) {
; X86-AVX1-LABEL: f16xi16_i64:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X86-AVX1-NEXT:    vmovddup {{.*#+}} xmm2 = [0,1,2,3,0,1,2,3]
; X86-AVX1-NEXT:    # xmm2 = mem[0,0]
; X86-AVX1-NEXT:    vpaddw %xmm2, %xmm1, %xmm1
; X86-AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0
; X86-AVX1-NEXT:    retl
;
; AVX2-LABEL: f16xi16_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX2-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi16_i64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
;
; X64-AVX1-LABEL: f16xi16_i64:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X64-AVX1-NEXT:    vmovddup {{.*#+}} xmm2 = [0,1,2,3,0,1,2,3]
; X64-AVX1-NEXT:    # xmm2 = mem[0,0]
; X64-AVX1-NEXT:    vpaddw %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; X64-AVX1-NEXT:    retq
  %res1 = add <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3>, %a
  %res2 = and <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3>, %res1
  ret <16 x i16> %res2
}


define <16 x i16> @f16xi16_i128(<16 x i16> %a) {
; AVX1-LABEL: f16xi16_i128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX1-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpaddw %xmm1, %xmm2, %xmm2
; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xi16_i128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX2-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX2-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi16_i128:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX512-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX512-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, %a
  %res2 = and <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, %res1
  ret <16 x i16> %res2
}


define <32 x i16> @f32xi16_i32(<32 x i16> %a) {
; AVX1-LABEL: f32xi16_i32:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f32xi16_i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastd {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512F-LABEL: f32xi16_i32:
; X86-AVX512F:       # %bb.0:
; X86-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X86-AVX512F-NEXT:    vpbroadcastd {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; X86-AVX512F-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; X86-AVX512F-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; X86-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X86-AVX512F-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm0, %zmm0
; X86-AVX512F-NEXT:    retl
;
; AVX512BW-LABEL: f32xi16_i32:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vpbroadcastd {{.*#+}} zmm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX512BW-NEXT:    vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
;
; X64-AVX512F-LABEL: f32xi16_i32:
; X64-AVX512F:       # %bb.0:
; X64-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X64-AVX512F-NEXT:    vpbroadcastd {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; X64-AVX512F-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; X64-AVX512F-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; X64-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X64-AVX512F-NEXT:    vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm0, %zmm0
; X64-AVX512F-NEXT:    retq
  %res1 = add <32 x i16> <i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3>, %a
  %res2 = and <32 x i16> <i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3, i16 0, i16 3>, %res1
  ret <32 x i16> %res2
}


define <32 x i16> @f32xi16_i64(<32 x i16> %a) {
; AVX1-LABEL: f32xi16_i64:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastsd {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f32xi16_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX2-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512F-LABEL: f32xi16_i64:
; X86-AVX512F:       # %bb.0:
; X86-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X86-AVX512F-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X86-AVX512F-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; X86-AVX512F-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; X86-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X86-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm0, %zmm0
; X86-AVX512F-NEXT:    retl
;
; AVX512BW-LABEL: f32xi16_i64:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vpbroadcastq {{.*#+}} zmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-NEXT:    vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
;
; X64-AVX512F-LABEL: f32xi16_i64:
; X64-AVX512F:       # %bb.0:
; X64-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X64-AVX512F-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X64-AVX512F-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; X64-AVX512F-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; X64-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X64-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm0, %zmm0
; X64-AVX512F-NEXT:    retq
  %res1 = add <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3>, %a
  %res2 = and <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3, i16 0, i16 1, i16 2, i16 3>, %res1
  ret <32 x i16> %res2
}


define <32 x i16> @f32xi16_i128(<32 x i16> %a) {
; AVX1-LABEL: f32xi16_i128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f32xi16_i128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX2-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512F-LABEL: f32xi16_i128:
; X86-AVX512F:       # %bb.0:
; X86-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X86-AVX512F-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; X86-AVX512F-NEXT:    # ymm2 = mem[0,1,0,1]
; X86-AVX512F-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; X86-AVX512F-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; X86-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X86-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}, %zmm0, %zmm0
; X86-AVX512F-NEXT:    retl
;
; AVX512BW-LABEL: f32xi16_i128:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX512BW-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-NEXT:    vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
;
; X64-AVX512F-LABEL: f32xi16_i128:
; X64-AVX512F:       # %bb.0:
; X64-AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
; X64-AVX512F-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; X64-AVX512F-NEXT:    # ymm2 = mem[0,1,0,1]
; X64-AVX512F-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; X64-AVX512F-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; X64-AVX512F-NEXT:    vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; X64-AVX512F-NEXT:    vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
; X64-AVX512F-NEXT:    retq
  %res1 = add <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, %a
  %res2 = and <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, %res1
  ret <32 x i16> %res2
}


define <32 x i16> @f32xi16_i256(<32 x i16> %a) {
; AVX1-LABEL: f32xi16_i256:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT:    vpmovsxbw {{.*#+}} xmm3 = [8,9,10,11,12,13,14,15]
; AVX1-NEXT:    vpaddw %xmm3, %xmm2, %xmm2
; AVX1-NEXT:    vmovdqa {{.*#+}} ymm4 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX1-NEXT:    vpaddw %xmm4, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpaddw %xmm3, %xmm2, %xmm2
; AVX1-NEXT:    vpaddw %xmm4, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm4, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm4, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f32xi16_i256:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovsxbw {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX2-NEXT:    vpaddw %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512F-LABEL: f32xi16_i256:
; AVX512F:       # %bb.0:
; AVX512F-NEXT:    vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512F-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm2
; AVX512F-NEXT:    vpaddw %ymm1, %ymm2, %ymm2
; AVX512F-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
; AVX512F-NEXT:    vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; AVX512F-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512F-NEXT:    ret{{[l|q]}}
;
; AVX512BW-LABEL: f32xi16_i256:
; AVX512BW:       # %bb.0:
; AVX512BW-NEXT:    vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512BW-NEXT:    vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT:    ret{{[l|q]}}
  %res1 = add <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, %a
  %res2 = and <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, %res1
  ret <32 x i16> %res2
}


define <4 x i32> @f4xi32_i64(<4 x i32> %a) {
; AVX1-LABEL: f4xi32_i64:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vmovddup {{.*#+}} xmm1 = [0,3,0,3]
; AVX1-NEXT:    # xmm1 = mem[0,0]
; AVX1-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f4xi32_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [0,3,0,3]
; AVX2-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f4xi32_i64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastq {{.*#+}} xmm1 = [0,3,0,3]
; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <4 x i32> <i32 0, i32 3, i32 0, i32 3>, %a
  %res2 = and <4 x i32> <i32 0, i32 3, i32 0, i32 3>, %res1
  ret <4 x i32> %res2
}


define <8 x i32> @f8xi32_i64(<8 x i32> %a) {
; X86-AVX1-LABEL: f8xi32_i64:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X86-AVX1-NEXT:    vmovddup {{.*#+}} xmm2 = [0,3,0,3]
; X86-AVX1-NEXT:    # xmm2 = mem[0,0]
; X86-AVX1-NEXT:    vpaddd %xmm2, %xmm1, %xmm1
; X86-AVX1-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm0
; X86-AVX1-NEXT:    retl
;
; AVX2-LABEL: f8xi32_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f8xi32_i64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastq {{.*#+}} ymm1 = [0,3,0,3,0,3,0,3]
; AVX512-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
;
; X64-AVX1-LABEL: f8xi32_i64:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
; X64-AVX1-NEXT:    vmovddup {{.*#+}} xmm2 = [0,3,0,3]
; X64-AVX1-NEXT:    # xmm2 = mem[0,0]
; X64-AVX1-NEXT:    vpaddd %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
; X64-AVX1-NEXT:    retq
  %res1 = add <8 x i32> <i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3>, %a
  %res2 = and <8 x i32> <i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3>, %res1
  ret <8 x i32> %res2
}


define <8 x i32> @f8xi32_i128(<8 x i32> %a) {
; AVX1-LABEL: f8xi32_i128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3]
; AVX1-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT:    vpaddd %xmm1, %xmm2, %xmm2
; AVX1-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f8xi32_i128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3]
; AVX2-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f8xi32_i128:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3]
; AVX512-NEXT:    # ymm1 = mem[0,1,0,1]
; AVX512-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>, %a
  %res2 = and <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>, %res1
  ret <8 x i32> %res2
}


define <16 x i32> @f16xi32_i64(<16 x i32> %a) {
; AVX1-LABEL: f16xi32_i64:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastsd {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xi32_i64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [0,3,0,3,0,3,0,3]
; AVX2-NEXT:    vpaddd %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi32_i64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastq {{.*#+}} zmm1 = [0,3,0,3,0,3,0,3,0,3,0,3,0,3,0,3]
; AVX512-NEXT:    vpaddd %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    vpandd %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <16 x i32> <i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3>, %a
  %res2 = and <16 x i32> <i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3, i32 0, i32 3>, %res1
  ret <16 x i32> %res2
}


define <16 x i32> @f16xi32_i128(<16 x i32> %a) {
; AVX1-LABEL: f16xi32_i128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3]
; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm1, %xmm1
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm3, %xmm3
; AVX1-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xi32_i128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3]
; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX2-NEXT:    vpaddd %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xi32_i128:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vpaddd %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    vpandd %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>, %a
  %res2 = and <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>, %res1
  ret <16 x i32> %res2
}


define <4 x i64> @f4xi64_i128(<4 x i64> %a) {
; X86-AVX1-LABEL: f4xi64_i128:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm1 = [0,0,3,0,0,0,3,0]
; X86-AVX1-NEXT:    # ymm1 = mem[0,1,0,1]
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; X86-AVX1-NEXT:    vpaddq %xmm1, %xmm2, %xmm2
; X86-AVX1-NEXT:    vpaddq %xmm1, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
; X86-AVX1-NEXT:    retl
;
; X86-AVX2-LABEL: f4xi64_i128:
; X86-AVX2:       # %bb.0:
; X86-AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,0,3,0,0,0,3,0]
; X86-AVX2-NEXT:    # ymm1 = mem[0,1,0,1]
; X86-AVX2-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; X86-AVX2-NEXT:    retl
;
; X86-AVX512-LABEL: f4xi64_i128:
; X86-AVX512:       # %bb.0:
; X86-AVX512-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,0,3,0,0,0,3,0]
; X86-AVX512-NEXT:    # ymm1 = mem[0,1,0,1]
; X86-AVX512-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
; X86-AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; X86-AVX512-NEXT:    retl
;
; X64-AVX1-LABEL: f4xi64_i128:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm1 = [0,3,0,3]
; X64-AVX1-NEXT:    # ymm1 = mem[0,1,0,1]
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; X64-AVX1-NEXT:    vpaddq %xmm1, %xmm2, %xmm2
; X64-AVX1-NEXT:    vpaddq %xmm1, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
; X64-AVX1-NEXT:    retq
;
; X64-AVX2-LABEL: f4xi64_i128:
; X64-AVX2:       # %bb.0:
; X64-AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,3,0,3]
; X64-AVX2-NEXT:    # ymm1 = mem[0,1,0,1]
; X64-AVX2-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
; X64-AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
; X64-AVX2-NEXT:    retq
;
; X64-AVX512-LABEL: f4xi64_i128:
; X64-AVX512:       # %bb.0:
; X64-AVX512-NEXT:    vbroadcasti128 {{.*#+}} ymm1 = [0,3,0,3]
; X64-AVX512-NEXT:    # ymm1 = mem[0,1,0,1]
; X64-AVX512-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
; X64-AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
; X64-AVX512-NEXT:    retq
  %res1 = add <4 x i64> <i64 0, i64 3, i64 0, i64 3>, %a
  %res2 = and <4 x i64> <i64 0, i64 3, i64 0, i64 3>, %res1
  ret <4 x i64> %res2
}


define <8 x i64> @f8xi64_i128(<8 x i64> %a) {
; X86-AVX1-LABEL: f8xi64_i128:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [0,0,3,0,0,0,3,0]
; X86-AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
; X86-AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; X86-AVX1-NEXT:    vpaddq %xmm2, %xmm3, %xmm3
; X86-AVX1-NEXT:    vpaddq %xmm2, %xmm1, %xmm1
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; X86-AVX1-NEXT:    vpaddq %xmm2, %xmm3, %xmm3
; X86-AVX1-NEXT:    vpaddq %xmm2, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; X86-AVX1-NEXT:    retl
;
; X86-AVX2-LABEL: f8xi64_i128:
; X86-AVX2:       # %bb.0:
; X86-AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,0,3,0,0,0,3,0]
; X86-AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
; X86-AVX2-NEXT:    vpaddq %ymm2, %ymm1, %ymm1
; X86-AVX2-NEXT:    vpaddq %ymm2, %ymm0, %ymm0
; X86-AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; X86-AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; X86-AVX2-NEXT:    retl
;
; X86-AVX512-LABEL: f8xi64_i128:
; X86-AVX512:       # %bb.0:
; X86-AVX512-NEXT:    vbroadcasti32x4 {{.*#+}} zmm1 = [0,0,3,0,0,0,3,0,0,0,3,0,0,0,3,0]
; X86-AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X86-AVX512-NEXT:    vpaddq %zmm1, %zmm0, %zmm0
; X86-AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; X86-AVX512-NEXT:    retl
;
; X64-AVX1-LABEL: f8xi64_i128:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [0,3,0,3]
; X64-AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
; X64-AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
; X64-AVX1-NEXT:    vpaddq %xmm2, %xmm3, %xmm3
; X64-AVX1-NEXT:    vpaddq %xmm2, %xmm1, %xmm1
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
; X64-AVX1-NEXT:    vpaddq %xmm2, %xmm3, %xmm3
; X64-AVX1-NEXT:    vpaddq %xmm2, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
; X64-AVX1-NEXT:    retq
;
; X64-AVX2-LABEL: f8xi64_i128:
; X64-AVX2:       # %bb.0:
; X64-AVX2-NEXT:    vbroadcasti128 {{.*#+}} ymm2 = [0,3,0,3]
; X64-AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
; X64-AVX2-NEXT:    vpaddq %ymm2, %ymm1, %ymm1
; X64-AVX2-NEXT:    vpaddq %ymm2, %ymm0, %ymm0
; X64-AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; X64-AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; X64-AVX2-NEXT:    retq
;
; X64-AVX512-LABEL: f8xi64_i128:
; X64-AVX512:       # %bb.0:
; X64-AVX512-NEXT:    vbroadcasti32x4 {{.*#+}} zmm1 = [0,3,0,3,0,3,0,3]
; X64-AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; X64-AVX512-NEXT:    vpaddq %zmm1, %zmm0, %zmm0
; X64-AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; X64-AVX512-NEXT:    retq
  %res1 = add <8 x i64> <i64 0, i64 3, i64 0, i64 3, i64 0, i64 3, i64 0, i64 3>, %a
  %res2 = and <8 x i64> <i64 0, i64 3, i64 0, i64 3, i64 0, i64 3, i64 0, i64 3>, %res1
  ret <8 x i64> %res2
}


define <8 x i64> @f8xi64_i256(<8 x i64> %a) {
; X86-AVX1-LABEL: f8xi64_i256:
; X86-AVX1:       # %bb.0:
; X86-AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; X86-AVX1-NEXT:    vpmovsxbq {{.*#+}} xmm3 = [2,3]
; X86-AVX1-NEXT:    vpaddq %xmm3, %xmm2, %xmm2
; X86-AVX1-NEXT:    vmovdqa {{.*#+}} ymm4 = [0,0,1,0,2,0,3,0]
; X86-AVX1-NEXT:    vpaddq %xmm4, %xmm1, %xmm1
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
; X86-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; X86-AVX1-NEXT:    vpaddq %xmm3, %xmm2, %xmm2
; X86-AVX1-NEXT:    vpaddq %xmm4, %xmm0, %xmm0
; X86-AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps %ymm4, %ymm0, %ymm0
; X86-AVX1-NEXT:    vandps %ymm4, %ymm1, %ymm1
; X86-AVX1-NEXT:    retl
;
; AVX2-LABEL: f8xi64_i256:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovsxbq {{.*#+}} ymm2 = [0,1,2,3]
; AVX2-NEXT:    vpaddq %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddq %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpand %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; X86-AVX512-LABEL: f8xi64_i256:
; X86-AVX512:       # %bb.0:
; X86-AVX512-NEXT:    vbroadcasti64x4 {{.*#+}} zmm1 = [0,0,1,0,2,0,3,0,0,0,1,0,2,0,3,0]
; X86-AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; X86-AVX512-NEXT:    vpaddq %zmm1, %zmm0, %zmm0
; X86-AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; X86-AVX512-NEXT:    retl
;
; X64-AVX1-LABEL: f8xi64_i256:
; X64-AVX1:       # %bb.0:
; X64-AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
; X64-AVX1-NEXT:    vpmovsxbq {{.*#+}} xmm3 = [2,3]
; X64-AVX1-NEXT:    vpaddq %xmm3, %xmm2, %xmm2
; X64-AVX1-NEXT:    vmovdqa {{.*#+}} ymm4 = [0,1,2,3]
; X64-AVX1-NEXT:    vpaddq %xmm4, %xmm1, %xmm1
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
; X64-AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
; X64-AVX1-NEXT:    vpaddq %xmm3, %xmm2, %xmm2
; X64-AVX1-NEXT:    vpaddq %xmm4, %xmm0, %xmm0
; X64-AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps %ymm4, %ymm0, %ymm0
; X64-AVX1-NEXT:    vandps %ymm4, %ymm1, %ymm1
; X64-AVX1-NEXT:    retq
;
; X64-AVX512-LABEL: f8xi64_i256:
; X64-AVX512:       # %bb.0:
; X64-AVX512-NEXT:    vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,0,1,2,3]
; X64-AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; X64-AVX512-NEXT:    vpaddq %zmm1, %zmm0, %zmm0
; X64-AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
; X64-AVX512-NEXT:    retq
  %res1 = add <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 0, i64 1, i64 2, i64 3>, %a
  %res2 = and <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 0, i64 1, i64 2, i64 3>, %res1
  ret <8 x i64> %res2
}


define <4 x float> @f4xf32_f64(<4 x float> %a) {
; CHECK-LABEL: f4xf32_f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vmovddup {{.*#+}} xmm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; CHECK-NEXT:    # xmm1 = mem[0,0]
; CHECK-NEXT:    vaddps %xmm1, %xmm0, %xmm0
; CHECK-NEXT:    vdivps %xmm0, %xmm1, %xmm0
; CHECK-NEXT:    ret{{[l|q]}}
  %res1 = fadd <4 x float> <float 2.0, float 1.0, float 2.0, float 1.0>, %a
  %res2 = fdiv <4 x float> <float 2.0, float 1.0, float 2.0, float 1.0>, %res1
  ret <4 x float> %res2
}


define <8 x float> @f8xf32_f64(<8 x float> %a) {
; CHECK-LABEL: f8xf32_f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vbroadcastsd {{.*#+}} ymm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm0
; CHECK-NEXT:    vdivps %ymm0, %ymm1, %ymm0
; CHECK-NEXT:    ret{{[l|q]}}
  %res1 = fadd <8 x float> <float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0>, %a
  %res2 = fdiv <8 x float> <float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0>, %res1
  ret <8 x float> %res2
}


define <8 x float> @f8xf32_f128(<8 x float> %a) {
; CHECK-LABEL: f8xf32_f128:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vbroadcastf128 {{.*#+}} ymm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0]
; CHECK-NEXT:    # ymm1 = mem[0,1,0,1]
; CHECK-NEXT:    vaddps %ymm1, %ymm0, %ymm0
; CHECK-NEXT:    vdivps %ymm0, %ymm1, %ymm0
; CHECK-NEXT:    ret{{[l|q]}}
  %res1 = fadd <8 x float> <float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0>, %a
  %res2 = fdiv <8 x float> <float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0>, %res1
  ret <8 x float> %res2
}


define <16 x float> @f16xf32_f64(<16 x float> %a) {
; AVX1-LABEL: f16xf32_f64:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastsd {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; AVX1-NEXT:    vaddps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vaddps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vdivps %ymm0, %ymm2, %ymm0
; AVX1-NEXT:    vdivps %ymm1, %ymm2, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xf32_f64:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcastsd {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; AVX2-NEXT:    vaddps %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vaddps %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vdivps %ymm0, %ymm2, %ymm0
; AVX2-NEXT:    vdivps %ymm1, %ymm2, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xf32_f64:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcastsd {{.*#+}} zmm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; AVX512-NEXT:    vaddps %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    vdivps %zmm0, %zmm1, %zmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = fadd <16 x float> <float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0>, %a
  %res2 = fdiv <16 x float> <float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0, float 2.0, float 1.0>, %res1
  ret <16 x float> %res2
}


define <16 x float> @f16xf32_f128(<16 x float> %a) {
; AVX1-LABEL: f16xf32_f128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0]
; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX1-NEXT:    vaddps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vaddps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vdivps %ymm0, %ymm2, %ymm0
; AVX1-NEXT:    vdivps %ymm1, %ymm2, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xf32_f128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0]
; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX2-NEXT:    vaddps %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vaddps %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vdivps %ymm0, %ymm2, %ymm0
; AVX2-NEXT:    vdivps %ymm1, %ymm2, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xf32_f128:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcastf32x4 {{.*#+}} zmm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0]
; AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vaddps %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    vdivps %zmm0, %zmm1, %zmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = fadd <16 x float> <float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0>, %a
  %res2 = fdiv <16 x float> <float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0, float 4.0, float 1.0, float 2.0, float 3.0>, %res1
  ret <16 x float> %res2
}


define <16 x float> @f16xf32_f256(<16 x float> %a) {
; AVX1-LABEL: f16xf32_f256:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vmovaps {{.*#+}} ymm2 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0]
; AVX1-NEXT:    vaddps %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vaddps %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vdivps %ymm0, %ymm2, %ymm0
; AVX1-NEXT:    vdivps %ymm1, %ymm2, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f16xf32_f256:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vmovaps {{.*#+}} ymm2 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0]
; AVX2-NEXT:    vaddps %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vaddps %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vdivps %ymm0, %ymm2, %ymm0
; AVX2-NEXT:    vdivps %ymm1, %ymm2, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f16xf32_f256:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcastf64x4 {{.*#+}} zmm1 = [8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0,8.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0]
; AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vaddps %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    vdivps %zmm0, %zmm1, %zmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = fadd <16 x float> <float 8.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>, %a
  %res2 = fdiv <16 x float> <float 8.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>, %res1
  ret <16 x float> %res2
}


define <4 x double> @f4xf64_f128(<4 x double> %a) {
; CHECK-LABEL: f4xf64_f128:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vbroadcastf128 {{.*#+}} ymm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; CHECK-NEXT:    # ymm1 = mem[0,1,0,1]
; CHECK-NEXT:    vaddpd %ymm1, %ymm0, %ymm0
; CHECK-NEXT:    vdivpd %ymm0, %ymm1, %ymm0
; CHECK-NEXT:    ret{{[l|q]}}
  %res1 = fadd <4 x double> <double 2.0, double 1.0, double 2.0, double 1.0>, %a
  %res2 = fdiv <4 x double> <double 2.0, double 1.0, double 2.0, double 1.0>, %res1
  ret <4 x double> %res2
}


define <8 x double> @f8xf64_f128(<8 x double> %a) {
; AVX1-LABEL: f8xf64_f128:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX1-NEXT:    vaddpd %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vaddpd %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vdivpd %ymm0, %ymm2, %ymm0
; AVX1-NEXT:    vdivpd %ymm1, %ymm2, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f8xf64_f128:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
; AVX2-NEXT:    vaddpd %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vaddpd %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vdivpd %ymm0, %ymm2, %ymm0
; AVX2-NEXT:    vdivpd %ymm1, %ymm2, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f8xf64_f128:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcastf32x4 {{.*#+}} zmm1 = [2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0,2.0E+0,1.0E+0]
; AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vaddpd %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    vdivpd %zmm0, %zmm1, %zmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = fadd <8 x double> <double 2.0, double 1.0, double 2.0, double 1.0, double 2.0, double 1.0, double 2.0, double 1.0>, %a
  %res2 = fdiv <8 x double> <double 2.0, double 1.0, double 2.0, double 1.0, double 2.0, double 1.0, double 2.0, double 1.0>, %res1
  ret <8 x double> %res2
}


define <8 x double> @f8xf64_f256(<8 x double> %a) {
; AVX1-LABEL: f8xf64_f256:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vmovapd {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0]
; AVX1-NEXT:    vaddpd %ymm2, %ymm1, %ymm1
; AVX1-NEXT:    vaddpd %ymm2, %ymm0, %ymm0
; AVX1-NEXT:    vdivpd %ymm0, %ymm2, %ymm0
; AVX1-NEXT:    vdivpd %ymm1, %ymm2, %ymm1
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f8xf64_f256:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vmovapd {{.*#+}} ymm2 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0]
; AVX2-NEXT:    vaddpd %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vaddpd %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vdivpd %ymm0, %ymm2, %ymm0
; AVX2-NEXT:    vdivpd %ymm1, %ymm2, %ymm1
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f8xf64_f256:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vbroadcastf64x4 {{.*#+}} zmm1 = [4.0E+0,1.0E+0,2.0E+0,3.0E+0,4.0E+0,1.0E+0,2.0E+0,3.0E+0]
; AVX512-NEXT:    # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512-NEXT:    vaddpd %zmm1, %zmm0, %zmm0
; AVX512-NEXT:    vdivpd %zmm0, %zmm1, %zmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = fadd <8 x double> <double 4.0, double 1.0, double 2.0, double 3.0, double 4.0, double 1.0, double 2.0, double 3.0>, %a
  %res2 = fdiv <8 x double> <double 4.0, double 1.0, double 2.0, double 3.0, double 4.0, double 1.0, double 2.0, double 3.0>, %res1
  ret <8 x double> %res2
}


define <8 x i16> @f8xi16_i32_NaN(<8 x i16> %a) {
; AVX1-LABEL: f8xi16_i32_NaN:
; AVX1:       # %bb.0:
; AVX1-NEXT:    vbroadcastss {{.*#+}} xmm1 = [0,65466,0,65466,0,65466,0,65466]
; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT:    ret{{[l|q]}}
;
; AVX2-LABEL: f8xi16_i32_NaN:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [0,65466,0,65466,0,65466,0,65466]
; AVX2-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    ret{{[l|q]}}
;
; AVX512-LABEL: f8xi16_i32_NaN:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [0,65466,0,65466,0,65466,0,65466]
; AVX512-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    ret{{[l|q]}}
  %res1 = add <8 x i16> <i16 0, i16 -70, i16 0, i16 -70, i16 0, i16 -70, i16 0, i16 -70>, %a
  %res2 = and <8 x i16> <i16 0, i16 -70, i16 0, i16 -70, i16 0, i16 -70, i16 0, i16 -70>, %res1
  ret <8 x i16> %res2
}