test/CodeGen/X86/atomic-nocx16-win.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-windows-gnu -verify-machineinstrs -mcpu=corei7 -mattr=-cx16 | FileCheck %s

define void @call_load(ptr %dst, ptr %src) nounwind {
; CHECK-LABEL: call_load:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pushq %rsi
; CHECK-NEXT:    subq $32, %rsp
; CHECK-NEXT:    movq %rcx, %rsi
; CHECK-NEXT:    movq %rdx, %rcx
; CHECK-NEXT:    movl $5, %edx
; CHECK-NEXT:    callq __atomic_load_16
; CHECK-NEXT:    movaps %xmm0, (%rsi)
; CHECK-NEXT:    addq $32, %rsp
; CHECK-NEXT:    popq %rsi
; CHECK-NEXT:    retq
entry:
  %0 = load atomic i128, ptr %src seq_cst, align 16
  store i128 %0, ptr %dst, align 16
  ret void
}

define void @call_store(ptr %dst, ptr %src) nounwind {
; CHECK-LABEL: call_store:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    subq $56, %rsp
; CHECK-NEXT:    movaps (%rdx), %xmm0
; CHECK-NEXT:    movaps %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    leaq {{[0-9]+}}(%rsp), %rdx
; CHECK-NEXT:    movl $5, %r8d
; CHECK-NEXT:    callq __atomic_store_16
; CHECK-NEXT:    addq $56, %rsp
; CHECK-NEXT:    retq
entry:
  %0 = load i128, ptr %src, align 16
  store atomic i128 %0, ptr %dst seq_cst, align 16
  ret void
}