blob: ea5ad0d5429cb15daaaaa7e6643a166d6fd2ee16 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs | FileCheck %s
define i32 @test_tls_stack_guard() #0 {
; CHECK-LABEL: test_tls_stack_guard:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
; CHECK-NEXT: .cfi_offset %r14, -48
; CHECK-NEXT: .cfi_offset %r15, -40
; CHECK-NEXT: aghi %r15, -1192
; CHECK-NEXT: .cfi_def_cfa_offset 1352
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: mvc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: la %r2, 160(%r15)
; CHECK-NEXT: brasl %r14, foo3@PLT
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: clc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: jlh .LBB0_2
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: lhi %r2, 0
; CHECK-NEXT: lmg %r14, %r15, 1304(%r15)
; CHECK-NEXT: br %r14
; CHECK-NEXT: .LBB0_2: # %entry
; CHECK-NEXT: brasl %r14, __stack_chk_fail@PLT
entry:
%a1 = alloca [256 x i32], align 4
call void @foo3(ptr %a1)
ret i32 0
}
define i32 @test_global_stack_guard_branch(i32 %in) #0 {
; CHECK-LABEL: test_global_stack_guard_branch:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: stmg %r13, %r15, 104(%r15)
; CHECK-NEXT: .cfi_offset %r13, -56
; CHECK-NEXT: .cfi_offset %r14, -48
; CHECK-NEXT: .cfi_offset %r15, -40
; CHECK-NEXT: aghi %r15, -1192
; CHECK-NEXT: .cfi_def_cfa_offset 1352
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: mvc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: lr %r13, %r2
; CHECK-NEXT: la %r2, 160(%r15)
; CHECK-NEXT: brasl %r14, foo3@PLT
; CHECK-NEXT: cije %r13, 1, .LBB1_4
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: cijlh %r13, 0, .LBB1_6
; CHECK-NEXT: # %bb.2: # %foo
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: clc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: jlh .LBB1_8
; CHECK-NEXT: # %bb.3: # %foo
; CHECK-NEXT: lhi %r2, 0
; CHECK-NEXT: lmg %r13, %r15, 1296(%r15)
; CHECK-NEXT: br %r14
; CHECK-NEXT: .LBB1_4: # %bar
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: clc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: jlh .LBB1_8
; CHECK-NEXT: # %bb.5: # %bar
; CHECK-NEXT: lhi %r2, 1
; CHECK-NEXT: lmg %r13, %r15, 1296(%r15)
; CHECK-NEXT: br %r14
; CHECK-NEXT: .LBB1_6: # %else
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: clc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: jlh .LBB1_8
; CHECK-NEXT: # %bb.7: # %else
; CHECK-NEXT: lhi %r2, 2
; CHECK-NEXT: lmg %r13, %r15, 1296(%r15)
; CHECK-NEXT: br %r14
; CHECK-NEXT: .LBB1_8: # %bar
; CHECK-NEXT: brasl %r14, __stack_chk_fail@PLT
entry:
%a1 = alloca [256 x i32], align 4
call void @foo3(ptr %a1)
switch i32 %in, label %else [
i32 0, label %foo
i32 1, label %bar
]
foo:
ret i32 0
bar:
ret i32 1
else:
ret i32 2
}
define i32 @test_tls_stack_guard_large() #0 {
; CHECK-LABEL: test_tls_stack_guard_large:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
; CHECK-NEXT: .cfi_offset %r14, -48
; CHECK-NEXT: .cfi_offset %r15, -40
; CHECK-NEXT: aghi %r15, -1192
; CHECK-NEXT: .cfi_def_cfa_offset 1352
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: mvc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: la %r2, 160(%r15)
; CHECK-NEXT: brasl %r14, foo3@PLT
; CHECK-NEXT: ear %r1, %a0
; CHECK-NEXT: sllg %r1, %r1, 32
; CHECK-NEXT: ear %r1, %a1
; CHECK-NEXT: clc 1184(8,%r15), 40(%r1)
; CHECK-NEXT: jlh .LBB2_2
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: lhi %r2, 0
; CHECK-NEXT: lmg %r14, %r15, 1304(%r15)
; CHECK-NEXT: br %r14
; CHECK-NEXT: .LBB2_2: # %entry
; CHECK-NEXT: brasl %r14, __stack_chk_fail@PLT
entry:
%a1 = alloca [256 x i32], align 4
call void @foo3(ptr %a1)
ret i32 0
}
declare void @foo3(ptr)
attributes #0 = { sspstrong }