| # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py |
| # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json -all-views < %s | FileCheck %s |
| # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json -all-views -o %t.json < %s |
| # RUN: cat %t.json \ |
| # RUN: | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \ |
| # RUN: | FileCheck %s |
| |
| # LLVM-MCA-BEGIN |
| add %eax, %eax |
| # LLVM-MCA-END |
| # LLVM-MCA-BEGIN |
| add %ebx, %ebx |
| add %ecx, %ecx |
| # LLVM-MCA-END |
| # LLVM-MCA-BEGIN |
| add %edx, %edx |
| # LLVM-MCA-END |
| |
| # CHECK: { |
| # CHECK-NEXT: "CodeRegions": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "DispatchStatistics": { |
| # CHECK-NEXT: "GROUP": 0, |
| # CHECK-NEXT: "LQ": 0, |
| # CHECK-NEXT: "RAT": 0, |
| # CHECK-NEXT: "RCU": 0, |
| # CHECK-NEXT: "SCHEDQ": 21, |
| # CHECK-NEXT: "SQ": 0, |
| # CHECK-NEXT: "USH": 0 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "InstructionInfoView": { |
| # CHECK-NEXT: "InstructionList": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "Instruction": 0, |
| # CHECK-NEXT: "Latency": 1, |
| # CHECK-NEXT: "NumMicroOpcodes": 1, |
| # CHECK-NEXT: "RThroughput": 0.25, |
| # CHECK-NEXT: "hasUnmodeledSideEffects": false, |
| # CHECK-NEXT: "mayLoad": false, |
| # CHECK-NEXT: "mayStore": false |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "Instructions": [ |
| # CHECK-NEXT: "addl\t%eax, %eax" |
| # CHECK-NEXT: ], |
| # CHECK-NEXT: "Name": "", |
| # CHECK-NEXT: "ResourcePressureView": { |
| # CHECK-NEXT: "ResourcePressureInfo": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 2, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 3, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 7, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 8, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 2, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 3, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 7, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 8, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "SummaryView": { |
| # CHECK-NEXT: "BlockRThroughput": 0.25, |
| # CHECK-NEXT: "DispatchWidth": 4, |
| # CHECK-NEXT: "IPC": 0.970873786407767, |
| # CHECK-NEXT: "Instructions": 100, |
| # CHECK-NEXT: "Iterations": 100, |
| # CHECK-NEXT: "TotalCycles": 103, |
| # CHECK-NEXT: "TotaluOps": 100, |
| # CHECK-NEXT: "uOpsPerCycle": 0.970873786407767 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "TimelineView": { |
| # CHECK-NEXT: "TimelineInfo": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 2, |
| # CHECK-NEXT: "CycleIssued": 1, |
| # CHECK-NEXT: "CycleReady": 0, |
| # CHECK-NEXT: "CycleRetired": 3 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 3, |
| # CHECK-NEXT: "CycleIssued": 2, |
| # CHECK-NEXT: "CycleReady": 2, |
| # CHECK-NEXT: "CycleRetired": 4 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 4, |
| # CHECK-NEXT: "CycleIssued": 3, |
| # CHECK-NEXT: "CycleReady": 3, |
| # CHECK-NEXT: "CycleRetired": 5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 5, |
| # CHECK-NEXT: "CycleIssued": 4, |
| # CHECK-NEXT: "CycleReady": 4, |
| # CHECK-NEXT: "CycleRetired": 6 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 6, |
| # CHECK-NEXT: "CycleIssued": 5, |
| # CHECK-NEXT: "CycleReady": 5, |
| # CHECK-NEXT: "CycleRetired": 7 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 7, |
| # CHECK-NEXT: "CycleIssued": 6, |
| # CHECK-NEXT: "CycleReady": 6, |
| # CHECK-NEXT: "CycleRetired": 8 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 8, |
| # CHECK-NEXT: "CycleIssued": 7, |
| # CHECK-NEXT: "CycleReady": 7, |
| # CHECK-NEXT: "CycleRetired": 9 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 9, |
| # CHECK-NEXT: "CycleIssued": 8, |
| # CHECK-NEXT: "CycleReady": 8, |
| # CHECK-NEXT: "CycleRetired": 10 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 10, |
| # CHECK-NEXT: "CycleIssued": 9, |
| # CHECK-NEXT: "CycleReady": 9, |
| # CHECK-NEXT: "CycleRetired": 11 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 11, |
| # CHECK-NEXT: "CycleIssued": 10, |
| # CHECK-NEXT: "CycleReady": 10, |
| # CHECK-NEXT: "CycleRetired": 12 |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: } |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "DispatchStatistics": { |
| # CHECK-NEXT: "GROUP": 0, |
| # CHECK-NEXT: "LQ": 0, |
| # CHECK-NEXT: "RAT": 0, |
| # CHECK-NEXT: "RCU": 0, |
| # CHECK-NEXT: "SCHEDQ": 41, |
| # CHECK-NEXT: "SQ": 0, |
| # CHECK-NEXT: "USH": 0 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "InstructionInfoView": { |
| # CHECK-NEXT: "InstructionList": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "Instruction": 0, |
| # CHECK-NEXT: "Latency": 1, |
| # CHECK-NEXT: "NumMicroOpcodes": 1, |
| # CHECK-NEXT: "RThroughput": 0.25, |
| # CHECK-NEXT: "hasUnmodeledSideEffects": false, |
| # CHECK-NEXT: "mayLoad": false, |
| # CHECK-NEXT: "mayStore": false |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "Instruction": 1, |
| # CHECK-NEXT: "Latency": 1, |
| # CHECK-NEXT: "NumMicroOpcodes": 1, |
| # CHECK-NEXT: "RThroughput": 0.25, |
| # CHECK-NEXT: "hasUnmodeledSideEffects": false, |
| # CHECK-NEXT: "mayLoad": false, |
| # CHECK-NEXT: "mayStore": false |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "Instructions": [ |
| # CHECK-NEXT: "addl\t%ebx, %ebx", |
| # CHECK-NEXT: "addl\t%ecx, %ecx" |
| # CHECK-NEXT: ], |
| # CHECK-NEXT: "Name": "", |
| # CHECK-NEXT: "ResourcePressureView": { |
| # CHECK-NEXT: "ResourcePressureInfo": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 3, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 8, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 2, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 7, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 2, |
| # CHECK-NEXT: "ResourceIndex": 2, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 2, |
| # CHECK-NEXT: "ResourceIndex": 3, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 2, |
| # CHECK-NEXT: "ResourceIndex": 7, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 2, |
| # CHECK-NEXT: "ResourceIndex": 8, |
| # CHECK-NEXT: "ResourceUsage": 0.5 |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "SummaryView": { |
| # CHECK-NEXT: "BlockRThroughput": 0.5, |
| # CHECK-NEXT: "DispatchWidth": 4, |
| # CHECK-NEXT: "IPC": 1.941747572815534, |
| # CHECK-NEXT: "Instructions": 200, |
| # CHECK-NEXT: "Iterations": 100, |
| # CHECK-NEXT: "TotalCycles": 103, |
| # CHECK-NEXT: "TotaluOps": 200, |
| # CHECK-NEXT: "uOpsPerCycle": 1.941747572815534 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "TimelineView": { |
| # CHECK-NEXT: "TimelineInfo": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 2, |
| # CHECK-NEXT: "CycleIssued": 1, |
| # CHECK-NEXT: "CycleReady": 0, |
| # CHECK-NEXT: "CycleRetired": 3 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 2, |
| # CHECK-NEXT: "CycleIssued": 1, |
| # CHECK-NEXT: "CycleReady": 0, |
| # CHECK-NEXT: "CycleRetired": 3 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 3, |
| # CHECK-NEXT: "CycleIssued": 2, |
| # CHECK-NEXT: "CycleReady": 2, |
| # CHECK-NEXT: "CycleRetired": 4 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 3, |
| # CHECK-NEXT: "CycleIssued": 2, |
| # CHECK-NEXT: "CycleReady": 2, |
| # CHECK-NEXT: "CycleRetired": 4 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 4, |
| # CHECK-NEXT: "CycleIssued": 3, |
| # CHECK-NEXT: "CycleReady": 3, |
| # CHECK-NEXT: "CycleRetired": 5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 4, |
| # CHECK-NEXT: "CycleIssued": 3, |
| # CHECK-NEXT: "CycleReady": 3, |
| # CHECK-NEXT: "CycleRetired": 5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 5, |
| # CHECK-NEXT: "CycleIssued": 4, |
| # CHECK-NEXT: "CycleReady": 4, |
| # CHECK-NEXT: "CycleRetired": 6 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 5, |
| # CHECK-NEXT: "CycleIssued": 4, |
| # CHECK-NEXT: "CycleReady": 4, |
| # CHECK-NEXT: "CycleRetired": 6 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 6, |
| # CHECK-NEXT: "CycleIssued": 5, |
| # CHECK-NEXT: "CycleReady": 5, |
| # CHECK-NEXT: "CycleRetired": 7 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 6, |
| # CHECK-NEXT: "CycleIssued": 5, |
| # CHECK-NEXT: "CycleReady": 5, |
| # CHECK-NEXT: "CycleRetired": 7 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 7, |
| # CHECK-NEXT: "CycleIssued": 6, |
| # CHECK-NEXT: "CycleReady": 6, |
| # CHECK-NEXT: "CycleRetired": 8 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 7, |
| # CHECK-NEXT: "CycleIssued": 6, |
| # CHECK-NEXT: "CycleReady": 6, |
| # CHECK-NEXT: "CycleRetired": 8 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 3, |
| # CHECK-NEXT: "CycleExecuted": 8, |
| # CHECK-NEXT: "CycleIssued": 7, |
| # CHECK-NEXT: "CycleReady": 7, |
| # CHECK-NEXT: "CycleRetired": 9 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 3, |
| # CHECK-NEXT: "CycleExecuted": 8, |
| # CHECK-NEXT: "CycleIssued": 7, |
| # CHECK-NEXT: "CycleReady": 7, |
| # CHECK-NEXT: "CycleRetired": 9 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 3, |
| # CHECK-NEXT: "CycleExecuted": 9, |
| # CHECK-NEXT: "CycleIssued": 8, |
| # CHECK-NEXT: "CycleReady": 8, |
| # CHECK-NEXT: "CycleRetired": 10 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 3, |
| # CHECK-NEXT: "CycleExecuted": 9, |
| # CHECK-NEXT: "CycleIssued": 8, |
| # CHECK-NEXT: "CycleReady": 8, |
| # CHECK-NEXT: "CycleRetired": 10 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 4, |
| # CHECK-NEXT: "CycleExecuted": 10, |
| # CHECK-NEXT: "CycleIssued": 9, |
| # CHECK-NEXT: "CycleReady": 9, |
| # CHECK-NEXT: "CycleRetired": 11 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 4, |
| # CHECK-NEXT: "CycleExecuted": 10, |
| # CHECK-NEXT: "CycleIssued": 9, |
| # CHECK-NEXT: "CycleReady": 9, |
| # CHECK-NEXT: "CycleRetired": 11 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 4, |
| # CHECK-NEXT: "CycleExecuted": 11, |
| # CHECK-NEXT: "CycleIssued": 10, |
| # CHECK-NEXT: "CycleReady": 10, |
| # CHECK-NEXT: "CycleRetired": 12 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 4, |
| # CHECK-NEXT: "CycleExecuted": 11, |
| # CHECK-NEXT: "CycleIssued": 10, |
| # CHECK-NEXT: "CycleReady": 10, |
| # CHECK-NEXT: "CycleRetired": 12 |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: } |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "DispatchStatistics": { |
| # CHECK-NEXT: "GROUP": 0, |
| # CHECK-NEXT: "LQ": 0, |
| # CHECK-NEXT: "RAT": 0, |
| # CHECK-NEXT: "RCU": 0, |
| # CHECK-NEXT: "SCHEDQ": 21, |
| # CHECK-NEXT: "SQ": 0, |
| # CHECK-NEXT: "USH": 0 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "InstructionInfoView": { |
| # CHECK-NEXT: "InstructionList": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "Instruction": 0, |
| # CHECK-NEXT: "Latency": 1, |
| # CHECK-NEXT: "NumMicroOpcodes": 1, |
| # CHECK-NEXT: "RThroughput": 0.25, |
| # CHECK-NEXT: "hasUnmodeledSideEffects": false, |
| # CHECK-NEXT: "mayLoad": false, |
| # CHECK-NEXT: "mayStore": false |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "Instructions": [ |
| # CHECK-NEXT: "addl\t%edx, %edx" |
| # CHECK-NEXT: ], |
| # CHECK-NEXT: "Name": "", |
| # CHECK-NEXT: "ResourcePressureView": { |
| # CHECK-NEXT: "ResourcePressureInfo": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 2, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 3, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 7, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 0, |
| # CHECK-NEXT: "ResourceIndex": 8, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 2, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 3, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 7, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "InstructionIndex": 1, |
| # CHECK-NEXT: "ResourceIndex": 8, |
| # CHECK-NEXT: "ResourceUsage": 0.25 |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "SummaryView": { |
| # CHECK-NEXT: "BlockRThroughput": 0.25, |
| # CHECK-NEXT: "DispatchWidth": 4, |
| # CHECK-NEXT: "IPC": 0.970873786407767, |
| # CHECK-NEXT: "Instructions": 100, |
| # CHECK-NEXT: "Iterations": 100, |
| # CHECK-NEXT: "TotalCycles": 103, |
| # CHECK-NEXT: "TotaluOps": 100, |
| # CHECK-NEXT: "uOpsPerCycle": 0.970873786407767 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "TimelineView": { |
| # CHECK-NEXT: "TimelineInfo": [ |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 2, |
| # CHECK-NEXT: "CycleIssued": 1, |
| # CHECK-NEXT: "CycleReady": 0, |
| # CHECK-NEXT: "CycleRetired": 3 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 3, |
| # CHECK-NEXT: "CycleIssued": 2, |
| # CHECK-NEXT: "CycleReady": 2, |
| # CHECK-NEXT: "CycleRetired": 4 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 4, |
| # CHECK-NEXT: "CycleIssued": 3, |
| # CHECK-NEXT: "CycleReady": 3, |
| # CHECK-NEXT: "CycleRetired": 5 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 0, |
| # CHECK-NEXT: "CycleExecuted": 5, |
| # CHECK-NEXT: "CycleIssued": 4, |
| # CHECK-NEXT: "CycleReady": 4, |
| # CHECK-NEXT: "CycleRetired": 6 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 6, |
| # CHECK-NEXT: "CycleIssued": 5, |
| # CHECK-NEXT: "CycleReady": 5, |
| # CHECK-NEXT: "CycleRetired": 7 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 7, |
| # CHECK-NEXT: "CycleIssued": 6, |
| # CHECK-NEXT: "CycleReady": 6, |
| # CHECK-NEXT: "CycleRetired": 8 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 8, |
| # CHECK-NEXT: "CycleIssued": 7, |
| # CHECK-NEXT: "CycleReady": 7, |
| # CHECK-NEXT: "CycleRetired": 9 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 1, |
| # CHECK-NEXT: "CycleExecuted": 9, |
| # CHECK-NEXT: "CycleIssued": 8, |
| # CHECK-NEXT: "CycleReady": 8, |
| # CHECK-NEXT: "CycleRetired": 10 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 10, |
| # CHECK-NEXT: "CycleIssued": 9, |
| # CHECK-NEXT: "CycleReady": 9, |
| # CHECK-NEXT: "CycleRetired": 11 |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: { |
| # CHECK-NEXT: "CycleDispatched": 2, |
| # CHECK-NEXT: "CycleExecuted": 11, |
| # CHECK-NEXT: "CycleIssued": 10, |
| # CHECK-NEXT: "CycleReady": 10, |
| # CHECK-NEXT: "CycleRetired": 12 |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: } |
| # CHECK-NEXT: } |
| # CHECK-NEXT: ], |
| # CHECK-NEXT: "SimulationParameters": { |
| # CHECK-NEXT: "-march": "x86_64", |
| # CHECK-NEXT: "-mcpu": "haswell", |
| # CHECK-NEXT: "-mtriple": "x86_64-unknown-unknown" |
| # CHECK-NEXT: }, |
| # CHECK-NEXT: "TargetInfo": { |
| # CHECK-NEXT: "CPUName": "haswell", |
| # CHECK-NEXT: "Resources": [ |
| # CHECK-NEXT: "HWDivider", |
| # CHECK-NEXT: "HWFPDivider", |
| # CHECK-NEXT: "HWPort0", |
| # CHECK-NEXT: "HWPort1", |
| # CHECK-NEXT: "HWPort2", |
| # CHECK-NEXT: "HWPort3", |
| # CHECK-NEXT: "HWPort4", |
| # CHECK-NEXT: "HWPort5", |
| # CHECK-NEXT: "HWPort6", |
| # CHECK-NEXT: "HWPort7" |
| # CHECK-NEXT: ] |
| # CHECK-NEXT: } |
| # CHECK-NEXT: } |