| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| ; RUN: opt -mtriple=amdgcn-amd-amdhsa -p simplifycfg,amdgpu-unify-divergent-exit-nodes %s -S -o - | FileCheck %s --check-prefix=OPT |
| ; RUN: llc -mtriple=amdgcn-amd-amdhsa %s -o - | FileCheck %s --check-prefix=ISA |
| |
| define void @nested_inf_loop(i1 %0, i1 %1) { |
| ; OPT-LABEL: @nested_inf_loop( |
| ; OPT-NEXT: BB: |
| ; OPT-NEXT: br label [[BB1:%.*]] |
| ; OPT: BB1: |
| ; OPT-NEXT: [[BRMERGE:%.*]] = select i1 [[TMP0:%.*]], i1 true, i1 [[TMP1:%.*]] |
| ; OPT-NEXT: br i1 [[BRMERGE]], label [[BB1]], label [[INFLOOP:%.*]] |
| ; OPT: infloop: |
| ; OPT-NEXT: br i1 true, label [[INFLOOP]], label [[DUMMYRETURNBLOCK:%.*]] |
| ; OPT: DummyReturnBlock: |
| ; OPT-NEXT: ret void |
| ; |
| ; ISA-LABEL: nested_inf_loop: |
| ; ISA-NEXT: %bb.0: ; %BB |
| ; ISA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) |
| ; ISA-NEXT: v_and_b32_e32 v1, 1, v1 |
| ; ISA-NEXT: v_and_b32_e32 v0, 1, v0 |
| ; ISA-NEXT: v_cmp_eq_u32_e64 s[4:5], 1, v1 |
| ; ISA-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 |
| ; ISA-NEXT: s_xor_b64 s[6:7], vcc, -1 |
| ; ISA-NEXT: s_mov_b64 s[8:9], 0 |
| ; ISA-NEXT: .LBB0_1: ; %BB1 |
| ; ISA: s_and_b64 s[10:11], exec, s[6:7] |
| ; ISA-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] |
| ; ISA-NEXT: s_andn2_b64 exec, exec, s[8:9] |
| ; ISA-NEXT: s_cbranch_execnz .LBB0_1 |
| ; ISA-NEXT: %bb.2: ; %BB2 |
| ; ISA: s_or_b64 exec, exec, s[8:9] |
| ; ISA-NEXT: s_mov_b64 s[8:9], 0 |
| ; ISA-NEXT: .LBB0_3: ; %BB4 |
| ; ISA: s_and_b64 s[10:11], exec, s[4:5] |
| ; ISA-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] |
| ; ISA-NEXT: s_andn2_b64 exec, exec, s[8:9] |
| ; ISA-NEXT: s_cbranch_execnz .LBB0_3 |
| ; ISA-NEXT: %bb.4: ; %loop.exit.guard |
| ; ISA: s_or_b64 exec, exec, s[8:9] |
| ; ISA-NEXT: s_mov_b64 vcc, 0 |
| ; ISA-NEXT: s_mov_b64 s[8:9], 0 |
| ; ISA-NEXT: s_branch .LBB0_1 |
| ; ISA-NEXT: %bb.5: ; %DummyReturnBlock |
| ; ISA-NEXT: s_setpc_b64 s[30:31] |
| BB: |
| br label %BB1 |
| |
| BB1: |
| br i1 %0, label %BB3, label %BB2 |
| |
| BB2: |
| br label %BB4 |
| |
| BB4: |
| br i1 %1, label %BB3, label %BB4 |
| |
| BB3: |
| br label %BB1 |
| } |