| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GFX11 |
| ; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GFX11 |
| |
| declare float @llvm.amdgcn.fdot2.f32.bf16(<2 x i16> %a, <2 x i16> %b, float %c, i1 %clamp) |
| |
| define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f32_bf16_clamp( |
| ; GFX11-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_clamp: |
| ; GFX11: ; %bb.0: ; %entry |
| ; GFX11-NEXT: s_load_b256 s[0:7], s[0:1], 0x24 |
| ; GFX11-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX11-NEXT: s_load_b32 s6, s[6:7], 0x0 |
| ; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0 |
| ; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x0 |
| ; GFX11-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) |
| ; GFX11-NEXT: v_dot2_f32_bf16 v0, s2, s3, v0 clamp |
| ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1] |
| ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) |
| ; GFX11-NEXT: s_endpgm |
| ptr addrspace(1) %r, |
| ptr addrspace(1) %a, |
| ptr addrspace(1) %b, |
| ptr addrspace(1) %c) { |
| entry: |
| %a.val = load <2 x i16>, ptr addrspace(1) %a |
| %b.val = load <2 x i16>, ptr addrspace(1) %b |
| %c.val = load float, ptr addrspace(1) %c |
| %r.val = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x i16> %a.val, <2 x i16> %b.val, float %c.val, i1 1) |
| store float %r.val, ptr addrspace(1) %r |
| ret void |
| } |
| |
| |
| define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f32_bf16_no_clamp( |
| ; GFX11-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_no_clamp: |
| ; GFX11: ; %bb.0: ; %entry |
| ; GFX11-NEXT: s_load_b256 s[0:7], s[0:1], 0x24 |
| ; GFX11-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX11-NEXT: s_load_b32 s6, s[6:7], 0x0 |
| ; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0 |
| ; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x0 |
| ; GFX11-NEXT: s_waitcnt lgkmcnt(0) |
| ; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6 |
| ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) |
| ; GFX11-NEXT: v_dot2_f32_bf16 v0, s2, s3, v0 |
| ; GFX11-NEXT: global_store_b32 v1, v0, s[0:1] |
| ; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) |
| ; GFX11-NEXT: s_endpgm |
| ptr addrspace(1) %r, |
| ptr addrspace(1) %a, |
| ptr addrspace(1) %b, |
| ptr addrspace(1) %c) { |
| entry: |
| %a.val = load <2 x i16>, ptr addrspace(1) %a |
| %b.val = load <2 x i16>, ptr addrspace(1) %b |
| %c.val = load float, ptr addrspace(1) %c |
| %r.val = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x i16> %a.val, <2 x i16> %b.val, float %c.val, i1 0) |
| store float %r.val, ptr addrspace(1) %r |
| ret void |
| } |