test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx1100 %s -run-pass twoaddressinstruction -verify-machineinstrs -o - | FileCheck --check-prefixes=GFX11 %s

---
name:            test_fmamk_reg_imm_f16
registers:
  - { id: 0, class: vreg_64 }
  - { id: 1, class: vgpr_32 }
  - { id: 2, class: vgpr_32 }
  - { id: 3, class: vgpr_32 }
  - { id: 4, class: vgpr_32 }
body:             |
  bb.0:

    ; GFX11-LABEL: name: test_fmamk_reg_imm_f16
    ; GFX11: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub1
    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0
    ; GFX11-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1078523331, implicit $exec
    ; GFX11-NEXT: [[V_FMA_F16_gfx9_e64_:%[0-9]+]]:vgpr_32 = V_FMA_F16_gfx9_e64 0, killed [[COPY1]], 0, [[V_MOV_B32_e32_]], 0, killed [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
    %0 = IMPLICIT_DEF
    %1 = COPY %0.sub1
    %2 = COPY %0.sub0
    %3 = V_MOV_B32_e32 1078523331, implicit $exec
    %4 = V_FMAC_F16_t16_e64 0, killed %2, 0, %3, 0, killed %1, 0, 0, 0, implicit $mode, implicit $exec

...

---
name:            test_fmamk_imm_reg_f16
registers:
  - { id: 0, class: vreg_64 }
  - { id: 1, class: vgpr_32 }
  - { id: 2, class: vgpr_32 }
  - { id: 3, class: vgpr_32 }
  - { id: 4, class: vgpr_32 }
body:             |
  bb.0:

    ; GFX11-LABEL: name: test_fmamk_imm_reg_f16
    ; GFX11: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub1
    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0
    ; GFX11-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1078523331, implicit $exec
    ; GFX11-NEXT: [[V_FMA_F16_gfx9_e64_:%[0-9]+]]:vgpr_32 = V_FMA_F16_gfx9_e64 0, [[COPY1]], 0, killed [[V_MOV_B32_e32_]], 0, killed [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
    %0 = IMPLICIT_DEF
    %1 = COPY %0.sub1
    %2 = COPY %0.sub0
    %3 = V_MOV_B32_e32 1078523331, implicit $exec
    %4 = V_FMAC_F16_t16_e64 0, %2, 0, killed %3, 0, killed %1, 0, 0, 0, implicit $mode, implicit $exec

...

---
name:            test_fmaak_f16
registers:
  - { id: 0, class: vreg_64 }
  - { id: 1, class: vgpr_32 }
  - { id: 2, class: vgpr_32 }
  - { id: 3, class: vgpr_32 }
  - { id: 4, class: vgpr_32 }
body:             |
  bb.0:

    ; GFX11-LABEL: name: test_fmaak_f16
    ; GFX11: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0
    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub1
    ; GFX11-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1078523331, implicit $exec
    ; GFX11-NEXT: [[V_FMA_F16_gfx9_e64_:%[0-9]+]]:vgpr_32 = V_FMA_F16_gfx9_e64 0, killed [[COPY]], 0, [[COPY1]], 0, [[V_MOV_B32_e32_]], 0, 0, 0, implicit $mode, implicit $exec
    %0 = IMPLICIT_DEF
    %1 = COPY %0.sub0
    %2 = COPY %0.sub1
    %3 = V_MOV_B32_e32 1078523331, implicit $exec
    %4 = V_FMAC_F16_t16_e64 0, killed %1, 0, %2, 0, %3, 0, 0, 0, implicit $mode, implicit $exec
...

---
name:            test_fmaak_inline_literal_f16
tracksRegLiveness: true
liveins:
  - { reg: '$vgpr0', virtual-reg: '%0' }
body:             |
  bb.0:
    liveins: $vgpr0

    ; GFX11-LABEL: name: test_fmaak_inline_literal_f16
    ; GFX11: liveins: $vgpr0
    ; GFX11-NEXT: {{  $}}
    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
    ; GFX11-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 49664, implicit $exec
    ; GFX11-NEXT: [[V_FMA_F16_gfx9_e64_:%[0-9]+]]:vgpr_32 = V_FMA_F16_gfx9_e64 0, 16384, 0, killed [[COPY]], 0, [[V_MOV_B32_e32_]], 0, 0, 0, implicit $mode, implicit $exec
    ; GFX11-NEXT: S_ENDPGM 0
    %0:vgpr_32 = COPY killed $vgpr0

    %1:vgpr_32 = V_MOV_B32_e32 49664, implicit $exec
    %2:vgpr_32 = V_FMAC_F16_t16_e64 0, 16384, 0, killed %0, 0, %1, 0, 0, 0, implicit $mode, implicit $exec
    S_ENDPGM 0

...