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llvm / llvm-project / 5048a0858beb15bdd203dee89dd4df9b2a72ba5f / . / llvm / test / CodeGen / RISCV / atomic-cmpxchg.ll
blob: c3b972840377f896519dd76ba63b7055f979e2f4 [file] [log] [blame]
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN: | FileCheck -check-prefix=RV32I %s
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO %s
Alex Bradbury614aeda2024-09-25 06:14:43 +0100[diff] [blame]6; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]7; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-WMO-ZACAS %s
Philip Reames90d79e22024-07-09 09:47:45 -0700[diff] [blame]8; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs < %s \
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]9; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO %s
Alex Bradbury614aeda2024-09-25 06:14:43 +0100[diff] [blame]10; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]11; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-TSO-ZACAS %s
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]12; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
13; RUN: | FileCheck -check-prefix=RV64I %s
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]14; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]15; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO %s
Alex Bradbury614aeda2024-09-25 06:14:43 +0100[diff] [blame]16; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]17; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-WMO-ZACAS %s
Alex Bradbury614aeda2024-09-25 06:14:43 +0100[diff] [blame]18; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs < %s \
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]19; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-WMO-ZABHA %s
Philip Reames90d79e22024-07-09 09:47:45 -0700[diff] [blame]20; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]21; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s
Alex Bradbury614aeda2024-09-25 06:14:43 +0100[diff] [blame]22; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]23; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO-ZACAS %s
Alex Bradbury614aeda2024-09-25 06:14:43 +0100[diff] [blame]24; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas,+zabha -verify-machineinstrs < %s \
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]25; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-TSO-ZABHA %s
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]26
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]27define void @cmpxchg_i8_monotonic_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]28; RV32I-LABEL: cmpxchg_i8_monotonic_monotonic:
29; RV32I: # %bb.0:
30; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]31; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]32; RV32I-NEXT: sb a1, 11(sp)
33; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]34; RV32I-NEXT: li a3, 0
35; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]36; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]37; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]38; RV32I-NEXT: addi sp, sp, 16
39; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]40;
41; RV32IA-LABEL: cmpxchg_i8_monotonic_monotonic:
42; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]43; RV32IA-NEXT: andi a3, a0, -4
44; RV32IA-NEXT: slli a0, a0, 3
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]45; RV32IA-NEXT: li a4, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]46; RV32IA-NEXT: andi a1, a1, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]47; RV32IA-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]48; RV32IA-NEXT: sll a4, a4, a0
49; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]50; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]51; RV32IA-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]52; RV32IA-NEXT: lr.w a2, (a3)
53; RV32IA-NEXT: and a5, a2, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]54; RV32IA-NEXT: bne a5, a1, .LBB0_3
55; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB0_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]56; RV32IA-NEXT: xor a5, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]57; RV32IA-NEXT: and a5, a5, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]58; RV32IA-NEXT: xor a5, a2, a5
59; RV32IA-NEXT: sc.w a5, a5, (a3)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]60; RV32IA-NEXT: bnez a5, .LBB0_1
61; RV32IA-NEXT: .LBB0_3:
62; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]63;
64; RV64I-LABEL: cmpxchg_i8_monotonic_monotonic:
65; RV64I: # %bb.0:
66; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]67; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]68; RV64I-NEXT: sb a1, 7(sp)
69; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]70; RV64I-NEXT: li a3, 0
71; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]72; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]73; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]74; RV64I-NEXT: addi sp, sp, 16
75; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]76;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]77; RV64IA-WMO-LABEL: cmpxchg_i8_monotonic_monotonic:
78; RV64IA-WMO: # %bb.0:
79; RV64IA-WMO-NEXT: andi a3, a0, -4
80; RV64IA-WMO-NEXT: slli a0, a0, 3
81; RV64IA-WMO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]82; RV64IA-WMO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]83; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]84; RV64IA-WMO-NEXT: sllw a4, a4, a0
85; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]86; RV64IA-WMO-NEXT: sllw a0, a2, a0
87; RV64IA-WMO-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
88; RV64IA-WMO-NEXT: lr.w a2, (a3)
89; RV64IA-WMO-NEXT: and a5, a2, a4
90; RV64IA-WMO-NEXT: bne a5, a1, .LBB0_3
91; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB0_1 Depth=1
92; RV64IA-WMO-NEXT: xor a5, a2, a0
93; RV64IA-WMO-NEXT: and a5, a5, a4
94; RV64IA-WMO-NEXT: xor a5, a2, a5
95; RV64IA-WMO-NEXT: sc.w a5, a5, (a3)
96; RV64IA-WMO-NEXT: bnez a5, .LBB0_1
97; RV64IA-WMO-NEXT: .LBB0_3:
98; RV64IA-WMO-NEXT: ret
99;
100; RV64IA-ZACAS-LABEL: cmpxchg_i8_monotonic_monotonic:
101; RV64IA-ZACAS: # %bb.0:
102; RV64IA-ZACAS-NEXT: andi a3, a0, -4
103; RV64IA-ZACAS-NEXT: slli a0, a0, 3
104; RV64IA-ZACAS-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]105; RV64IA-ZACAS-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]106; RV64IA-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]107; RV64IA-ZACAS-NEXT: sllw a4, a4, a0
108; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]109; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
110; RV64IA-ZACAS-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
111; RV64IA-ZACAS-NEXT: lr.w a2, (a3)
112; RV64IA-ZACAS-NEXT: and a5, a2, a4
113; RV64IA-ZACAS-NEXT: bne a5, a1, .LBB0_3
114; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB0_1 Depth=1
115; RV64IA-ZACAS-NEXT: xor a5, a2, a0
116; RV64IA-ZACAS-NEXT: and a5, a5, a4
117; RV64IA-ZACAS-NEXT: xor a5, a2, a5
118; RV64IA-ZACAS-NEXT: sc.w a5, a5, (a3)
119; RV64IA-ZACAS-NEXT: bnez a5, .LBB0_1
120; RV64IA-ZACAS-NEXT: .LBB0_3:
121; RV64IA-ZACAS-NEXT: ret
122;
123; RV64IA-ZABHA-LABEL: cmpxchg_i8_monotonic_monotonic:
124; RV64IA-ZABHA: # %bb.0:
125; RV64IA-ZABHA-NEXT: amocas.b a1, a2, (a0)
126; RV64IA-ZABHA-NEXT: ret
127;
128; RV64IA-TSO-LABEL: cmpxchg_i8_monotonic_monotonic:
129; RV64IA-TSO: # %bb.0:
130; RV64IA-TSO-NEXT: andi a3, a0, -4
131; RV64IA-TSO-NEXT: slli a0, a0, 3
132; RV64IA-TSO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]133; RV64IA-TSO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]134; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]135; RV64IA-TSO-NEXT: sllw a4, a4, a0
136; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]137; RV64IA-TSO-NEXT: sllw a0, a2, a0
138; RV64IA-TSO-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
139; RV64IA-TSO-NEXT: lr.w a2, (a3)
140; RV64IA-TSO-NEXT: and a5, a2, a4
141; RV64IA-TSO-NEXT: bne a5, a1, .LBB0_3
142; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB0_1 Depth=1
143; RV64IA-TSO-NEXT: xor a5, a2, a0
144; RV64IA-TSO-NEXT: and a5, a5, a4
145; RV64IA-TSO-NEXT: xor a5, a2, a5
146; RV64IA-TSO-NEXT: sc.w a5, a5, (a3)
147; RV64IA-TSO-NEXT: bnez a5, .LBB0_1
148; RV64IA-TSO-NEXT: .LBB0_3:
149; RV64IA-TSO-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]150 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]151 ret void
152}
153
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]154define void @cmpxchg_i8_acquire_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]155; RV32I-LABEL: cmpxchg_i8_acquire_monotonic:
156; RV32I: # %bb.0:
157; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]158; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]159; RV32I-NEXT: sb a1, 11(sp)
160; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]161; RV32I-NEXT: li a3, 2
162; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]163; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]164; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]165; RV32I-NEXT: addi sp, sp, 16
166; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]167;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]168; RV32IA-WMO-LABEL: cmpxchg_i8_acquire_monotonic:
169; RV32IA-WMO: # %bb.0:
170; RV32IA-WMO-NEXT: andi a3, a0, -4
171; RV32IA-WMO-NEXT: slli a0, a0, 3
172; RV32IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]173; RV32IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]174; RV32IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]175; RV32IA-WMO-NEXT: sll a4, a4, a0
176; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]177; RV32IA-WMO-NEXT: sll a0, a2, a0
178; RV32IA-WMO-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
179; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
180; RV32IA-WMO-NEXT: and a5, a2, a4
181; RV32IA-WMO-NEXT: bne a5, a1, .LBB1_3
182; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
183; RV32IA-WMO-NEXT: xor a5, a2, a0
184; RV32IA-WMO-NEXT: and a5, a5, a4
185; RV32IA-WMO-NEXT: xor a5, a2, a5
186; RV32IA-WMO-NEXT: sc.w a5, a5, (a3)
187; RV32IA-WMO-NEXT: bnez a5, .LBB1_1
188; RV32IA-WMO-NEXT: .LBB1_3:
189; RV32IA-WMO-NEXT: ret
190;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]191; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i8_acquire_monotonic:
192; RV32IA-WMO-ZACAS: # %bb.0:
193; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
194; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
195; RV32IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]196; RV32IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]197; RV32IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]198; RV32IA-WMO-ZACAS-NEXT: sll a4, a4, a0
199; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]200; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
201; RV32IA-WMO-ZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
202; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
203; RV32IA-WMO-ZACAS-NEXT: and a5, a2, a4
204; RV32IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB1_3
205; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
206; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a0
207; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4
208; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a5
209; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a3)
210; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB1_1
211; RV32IA-WMO-ZACAS-NEXT: .LBB1_3:
212; RV32IA-WMO-ZACAS-NEXT: ret
213;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]214; RV32IA-TSO-LABEL: cmpxchg_i8_acquire_monotonic:
215; RV32IA-TSO: # %bb.0:
216; RV32IA-TSO-NEXT: andi a3, a0, -4
217; RV32IA-TSO-NEXT: slli a0, a0, 3
218; RV32IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]219; RV32IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]220; RV32IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]221; RV32IA-TSO-NEXT: sll a4, a4, a0
222; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]223; RV32IA-TSO-NEXT: sll a0, a2, a0
224; RV32IA-TSO-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
225; RV32IA-TSO-NEXT: lr.w a2, (a3)
226; RV32IA-TSO-NEXT: and a5, a2, a4
227; RV32IA-TSO-NEXT: bne a5, a1, .LBB1_3
228; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
229; RV32IA-TSO-NEXT: xor a5, a2, a0
230; RV32IA-TSO-NEXT: and a5, a5, a4
231; RV32IA-TSO-NEXT: xor a5, a2, a5
232; RV32IA-TSO-NEXT: sc.w a5, a5, (a3)
233; RV32IA-TSO-NEXT: bnez a5, .LBB1_1
234; RV32IA-TSO-NEXT: .LBB1_3:
235; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]236;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]237; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i8_acquire_monotonic:
238; RV32IA-TSO-ZACAS: # %bb.0:
239; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
240; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
241; RV32IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]242; RV32IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]243; RV32IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]244; RV32IA-TSO-ZACAS-NEXT: sll a4, a4, a0
245; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]246; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
247; RV32IA-TSO-ZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
248; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
249; RV32IA-TSO-ZACAS-NEXT: and a5, a2, a4
250; RV32IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB1_3
251; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
252; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a0
253; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4
254; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a5
255; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
256; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB1_1
257; RV32IA-TSO-ZACAS-NEXT: .LBB1_3:
258; RV32IA-TSO-ZACAS-NEXT: ret
259;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]260; RV64I-LABEL: cmpxchg_i8_acquire_monotonic:
261; RV64I: # %bb.0:
262; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]263; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]264; RV64I-NEXT: sb a1, 7(sp)
265; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]266; RV64I-NEXT: li a3, 2
267; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]268; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]269; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]270; RV64I-NEXT: addi sp, sp, 16
271; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]272;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]273; RV64IA-WMO-LABEL: cmpxchg_i8_acquire_monotonic:
274; RV64IA-WMO: # %bb.0:
275; RV64IA-WMO-NEXT: andi a3, a0, -4
276; RV64IA-WMO-NEXT: slli a0, a0, 3
277; RV64IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]278; RV64IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]279; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]280; RV64IA-WMO-NEXT: sllw a4, a4, a0
281; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]282; RV64IA-WMO-NEXT: sllw a0, a2, a0
283; RV64IA-WMO-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
284; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
285; RV64IA-WMO-NEXT: and a5, a2, a4
286; RV64IA-WMO-NEXT: bne a5, a1, .LBB1_3
287; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
288; RV64IA-WMO-NEXT: xor a5, a2, a0
289; RV64IA-WMO-NEXT: and a5, a5, a4
290; RV64IA-WMO-NEXT: xor a5, a2, a5
291; RV64IA-WMO-NEXT: sc.w a5, a5, (a3)
292; RV64IA-WMO-NEXT: bnez a5, .LBB1_1
293; RV64IA-WMO-NEXT: .LBB1_3:
294; RV64IA-WMO-NEXT: ret
295;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]296; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i8_acquire_monotonic:
297; RV64IA-WMO-ZACAS: # %bb.0:
298; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
299; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
300; RV64IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]301; RV64IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]302; RV64IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]303; RV64IA-WMO-ZACAS-NEXT: sllw a4, a4, a0
304; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]305; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
306; RV64IA-WMO-ZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
307; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
308; RV64IA-WMO-ZACAS-NEXT: and a5, a2, a4
309; RV64IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB1_3
310; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
311; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a0
312; RV64IA-WMO-ZACAS-NEXT: and a5, a5, a4
313; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a5
314; RV64IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a3)
315; RV64IA-WMO-ZACAS-NEXT: bnez a5, .LBB1_1
316; RV64IA-WMO-ZACAS-NEXT: .LBB1_3:
317; RV64IA-WMO-ZACAS-NEXT: ret
318;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]319; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acquire_monotonic:
320; RV64IA-WMO-ZABHA: # %bb.0:
321; RV64IA-WMO-ZABHA-NEXT: amocas.b.aq a1, a2, (a0)
322; RV64IA-WMO-ZABHA-NEXT: ret
323;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]324; RV64IA-TSO-LABEL: cmpxchg_i8_acquire_monotonic:
325; RV64IA-TSO: # %bb.0:
326; RV64IA-TSO-NEXT: andi a3, a0, -4
327; RV64IA-TSO-NEXT: slli a0, a0, 3
328; RV64IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]329; RV64IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]330; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]331; RV64IA-TSO-NEXT: sllw a4, a4, a0
332; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]333; RV64IA-TSO-NEXT: sllw a0, a2, a0
334; RV64IA-TSO-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
335; RV64IA-TSO-NEXT: lr.w a2, (a3)
336; RV64IA-TSO-NEXT: and a5, a2, a4
337; RV64IA-TSO-NEXT: bne a5, a1, .LBB1_3
338; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
339; RV64IA-TSO-NEXT: xor a5, a2, a0
340; RV64IA-TSO-NEXT: and a5, a5, a4
341; RV64IA-TSO-NEXT: xor a5, a2, a5
342; RV64IA-TSO-NEXT: sc.w a5, a5, (a3)
343; RV64IA-TSO-NEXT: bnez a5, .LBB1_1
344; RV64IA-TSO-NEXT: .LBB1_3:
345; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]346;
347; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i8_acquire_monotonic:
348; RV64IA-TSO-ZACAS: # %bb.0:
349; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
350; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
351; RV64IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]352; RV64IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]353; RV64IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]354; RV64IA-TSO-ZACAS-NEXT: sllw a4, a4, a0
355; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]356; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
357; RV64IA-TSO-ZACAS-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
358; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
359; RV64IA-TSO-ZACAS-NEXT: and a5, a2, a4
360; RV64IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB1_3
361; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
362; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a0
363; RV64IA-TSO-ZACAS-NEXT: and a5, a5, a4
364; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a5
365; RV64IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
366; RV64IA-TSO-ZACAS-NEXT: bnez a5, .LBB1_1
367; RV64IA-TSO-ZACAS-NEXT: .LBB1_3:
368; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]369;
370; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acquire_monotonic:
371; RV64IA-TSO-ZABHA: # %bb.0:
372; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
373; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]374 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acquire monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]375 ret void
376}
377
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]378define void @cmpxchg_i8_acquire_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]379; RV32I-LABEL: cmpxchg_i8_acquire_acquire:
380; RV32I: # %bb.0:
381; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]382; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]383; RV32I-NEXT: sb a1, 11(sp)
384; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]385; RV32I-NEXT: li a3, 2
386; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]387; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]388; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]389; RV32I-NEXT: addi sp, sp, 16
390; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]391;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]392; RV32IA-WMO-LABEL: cmpxchg_i8_acquire_acquire:
393; RV32IA-WMO: # %bb.0:
394; RV32IA-WMO-NEXT: andi a3, a0, -4
395; RV32IA-WMO-NEXT: slli a0, a0, 3
396; RV32IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]397; RV32IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]398; RV32IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]399; RV32IA-WMO-NEXT: sll a4, a4, a0
400; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]401; RV32IA-WMO-NEXT: sll a0, a2, a0
402; RV32IA-WMO-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
403; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
404; RV32IA-WMO-NEXT: and a5, a2, a4
405; RV32IA-WMO-NEXT: bne a5, a1, .LBB2_3
406; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
407; RV32IA-WMO-NEXT: xor a5, a2, a0
408; RV32IA-WMO-NEXT: and a5, a5, a4
409; RV32IA-WMO-NEXT: xor a5, a2, a5
410; RV32IA-WMO-NEXT: sc.w a5, a5, (a3)
411; RV32IA-WMO-NEXT: bnez a5, .LBB2_1
412; RV32IA-WMO-NEXT: .LBB2_3:
413; RV32IA-WMO-NEXT: ret
414;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]415; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i8_acquire_acquire:
416; RV32IA-WMO-ZACAS: # %bb.0:
417; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
418; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
419; RV32IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]420; RV32IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]421; RV32IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]422; RV32IA-WMO-ZACAS-NEXT: sll a4, a4, a0
423; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]424; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
425; RV32IA-WMO-ZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
426; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
427; RV32IA-WMO-ZACAS-NEXT: and a5, a2, a4
428; RV32IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB2_3
429; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
430; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a0
431; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4
432; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a5
433; RV32IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a3)
434; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB2_1
435; RV32IA-WMO-ZACAS-NEXT: .LBB2_3:
436; RV32IA-WMO-ZACAS-NEXT: ret
437;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]438; RV32IA-TSO-LABEL: cmpxchg_i8_acquire_acquire:
439; RV32IA-TSO: # %bb.0:
440; RV32IA-TSO-NEXT: andi a3, a0, -4
441; RV32IA-TSO-NEXT: slli a0, a0, 3
442; RV32IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]443; RV32IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]444; RV32IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]445; RV32IA-TSO-NEXT: sll a4, a4, a0
446; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]447; RV32IA-TSO-NEXT: sll a0, a2, a0
448; RV32IA-TSO-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
449; RV32IA-TSO-NEXT: lr.w a2, (a3)
450; RV32IA-TSO-NEXT: and a5, a2, a4
451; RV32IA-TSO-NEXT: bne a5, a1, .LBB2_3
452; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
453; RV32IA-TSO-NEXT: xor a5, a2, a0
454; RV32IA-TSO-NEXT: and a5, a5, a4
455; RV32IA-TSO-NEXT: xor a5, a2, a5
456; RV32IA-TSO-NEXT: sc.w a5, a5, (a3)
457; RV32IA-TSO-NEXT: bnez a5, .LBB2_1
458; RV32IA-TSO-NEXT: .LBB2_3:
459; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]460;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]461; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i8_acquire_acquire:
462; RV32IA-TSO-ZACAS: # %bb.0:
463; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
464; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
465; RV32IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]466; RV32IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]467; RV32IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]468; RV32IA-TSO-ZACAS-NEXT: sll a4, a4, a0
469; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]470; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
471; RV32IA-TSO-ZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
472; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
473; RV32IA-TSO-ZACAS-NEXT: and a5, a2, a4
474; RV32IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB2_3
475; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
476; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a0
477; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4
478; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a5
479; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
480; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB2_1
481; RV32IA-TSO-ZACAS-NEXT: .LBB2_3:
482; RV32IA-TSO-ZACAS-NEXT: ret
483;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]484; RV64I-LABEL: cmpxchg_i8_acquire_acquire:
485; RV64I: # %bb.0:
486; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]487; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]488; RV64I-NEXT: sb a1, 7(sp)
489; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]490; RV64I-NEXT: li a3, 2
491; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]492; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]493; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]494; RV64I-NEXT: addi sp, sp, 16
495; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]496;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]497; RV64IA-WMO-LABEL: cmpxchg_i8_acquire_acquire:
498; RV64IA-WMO: # %bb.0:
499; RV64IA-WMO-NEXT: andi a3, a0, -4
500; RV64IA-WMO-NEXT: slli a0, a0, 3
501; RV64IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]502; RV64IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]503; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]504; RV64IA-WMO-NEXT: sllw a4, a4, a0
505; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]506; RV64IA-WMO-NEXT: sllw a0, a2, a0
507; RV64IA-WMO-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
508; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
509; RV64IA-WMO-NEXT: and a5, a2, a4
510; RV64IA-WMO-NEXT: bne a5, a1, .LBB2_3
511; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
512; RV64IA-WMO-NEXT: xor a5, a2, a0
513; RV64IA-WMO-NEXT: and a5, a5, a4
514; RV64IA-WMO-NEXT: xor a5, a2, a5
515; RV64IA-WMO-NEXT: sc.w a5, a5, (a3)
516; RV64IA-WMO-NEXT: bnez a5, .LBB2_1
517; RV64IA-WMO-NEXT: .LBB2_3:
518; RV64IA-WMO-NEXT: ret
519;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]520; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i8_acquire_acquire:
521; RV64IA-WMO-ZACAS: # %bb.0:
522; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
523; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
524; RV64IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]525; RV64IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]526; RV64IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]527; RV64IA-WMO-ZACAS-NEXT: sllw a4, a4, a0
528; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]529; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
530; RV64IA-WMO-ZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
531; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
532; RV64IA-WMO-ZACAS-NEXT: and a5, a2, a4
533; RV64IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB2_3
534; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
535; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a0
536; RV64IA-WMO-ZACAS-NEXT: and a5, a5, a4
537; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a5
538; RV64IA-WMO-ZACAS-NEXT: sc.w a5, a5, (a3)
539; RV64IA-WMO-ZACAS-NEXT: bnez a5, .LBB2_1
540; RV64IA-WMO-ZACAS-NEXT: .LBB2_3:
541; RV64IA-WMO-ZACAS-NEXT: ret
542;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]543; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acquire_acquire:
544; RV64IA-WMO-ZABHA: # %bb.0:
545; RV64IA-WMO-ZABHA-NEXT: amocas.b.aq a1, a2, (a0)
546; RV64IA-WMO-ZABHA-NEXT: ret
547;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]548; RV64IA-TSO-LABEL: cmpxchg_i8_acquire_acquire:
549; RV64IA-TSO: # %bb.0:
550; RV64IA-TSO-NEXT: andi a3, a0, -4
551; RV64IA-TSO-NEXT: slli a0, a0, 3
552; RV64IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]553; RV64IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]554; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]555; RV64IA-TSO-NEXT: sllw a4, a4, a0
556; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]557; RV64IA-TSO-NEXT: sllw a0, a2, a0
558; RV64IA-TSO-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
559; RV64IA-TSO-NEXT: lr.w a2, (a3)
560; RV64IA-TSO-NEXT: and a5, a2, a4
561; RV64IA-TSO-NEXT: bne a5, a1, .LBB2_3
562; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
563; RV64IA-TSO-NEXT: xor a5, a2, a0
564; RV64IA-TSO-NEXT: and a5, a5, a4
565; RV64IA-TSO-NEXT: xor a5, a2, a5
566; RV64IA-TSO-NEXT: sc.w a5, a5, (a3)
567; RV64IA-TSO-NEXT: bnez a5, .LBB2_1
568; RV64IA-TSO-NEXT: .LBB2_3:
569; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]570;
571; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i8_acquire_acquire:
572; RV64IA-TSO-ZACAS: # %bb.0:
573; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
574; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
575; RV64IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]576; RV64IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]577; RV64IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]578; RV64IA-TSO-ZACAS-NEXT: sllw a4, a4, a0
579; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]580; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
581; RV64IA-TSO-ZACAS-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
582; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
583; RV64IA-TSO-ZACAS-NEXT: and a5, a2, a4
584; RV64IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB2_3
585; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB2_1 Depth=1
586; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a0
587; RV64IA-TSO-ZACAS-NEXT: and a5, a5, a4
588; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a5
589; RV64IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
590; RV64IA-TSO-ZACAS-NEXT: bnez a5, .LBB2_1
591; RV64IA-TSO-ZACAS-NEXT: .LBB2_3:
592; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]593;
594; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acquire_acquire:
595; RV64IA-TSO-ZABHA: # %bb.0:
596; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
597; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]598 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acquire acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]599 ret void
600}
601
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]602define void @cmpxchg_i8_release_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]603; RV32I-LABEL: cmpxchg_i8_release_monotonic:
604; RV32I: # %bb.0:
605; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]606; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]607; RV32I-NEXT: sb a1, 11(sp)
608; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]609; RV32I-NEXT: li a3, 3
610; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]611; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]612; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]613; RV32I-NEXT: addi sp, sp, 16
614; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]615;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]616; RV32IA-WMO-LABEL: cmpxchg_i8_release_monotonic:
617; RV32IA-WMO: # %bb.0:
618; RV32IA-WMO-NEXT: andi a3, a0, -4
619; RV32IA-WMO-NEXT: slli a0, a0, 3
620; RV32IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]621; RV32IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]622; RV32IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]623; RV32IA-WMO-NEXT: sll a4, a4, a0
624; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]625; RV32IA-WMO-NEXT: sll a0, a2, a0
626; RV32IA-WMO-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
627; RV32IA-WMO-NEXT: lr.w a2, (a3)
628; RV32IA-WMO-NEXT: and a5, a2, a4
629; RV32IA-WMO-NEXT: bne a5, a1, .LBB3_3
630; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
631; RV32IA-WMO-NEXT: xor a5, a2, a0
632; RV32IA-WMO-NEXT: and a5, a5, a4
633; RV32IA-WMO-NEXT: xor a5, a2, a5
634; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
635; RV32IA-WMO-NEXT: bnez a5, .LBB3_1
636; RV32IA-WMO-NEXT: .LBB3_3:
637; RV32IA-WMO-NEXT: ret
638;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]639; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i8_release_monotonic:
640; RV32IA-WMO-ZACAS: # %bb.0:
641; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
642; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
643; RV32IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]644; RV32IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]645; RV32IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]646; RV32IA-WMO-ZACAS-NEXT: sll a4, a4, a0
647; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]648; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
649; RV32IA-WMO-ZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
650; RV32IA-WMO-ZACAS-NEXT: lr.w a2, (a3)
651; RV32IA-WMO-ZACAS-NEXT: and a5, a2, a4
652; RV32IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB3_3
653; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
654; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a0
655; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4
656; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a5
657; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
658; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB3_1
659; RV32IA-WMO-ZACAS-NEXT: .LBB3_3:
660; RV32IA-WMO-ZACAS-NEXT: ret
661;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]662; RV32IA-TSO-LABEL: cmpxchg_i8_release_monotonic:
663; RV32IA-TSO: # %bb.0:
664; RV32IA-TSO-NEXT: andi a3, a0, -4
665; RV32IA-TSO-NEXT: slli a0, a0, 3
666; RV32IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]667; RV32IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]668; RV32IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]669; RV32IA-TSO-NEXT: sll a4, a4, a0
670; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]671; RV32IA-TSO-NEXT: sll a0, a2, a0
672; RV32IA-TSO-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
673; RV32IA-TSO-NEXT: lr.w a2, (a3)
674; RV32IA-TSO-NEXT: and a5, a2, a4
675; RV32IA-TSO-NEXT: bne a5, a1, .LBB3_3
676; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
677; RV32IA-TSO-NEXT: xor a5, a2, a0
678; RV32IA-TSO-NEXT: and a5, a5, a4
679; RV32IA-TSO-NEXT: xor a5, a2, a5
680; RV32IA-TSO-NEXT: sc.w a5, a5, (a3)
681; RV32IA-TSO-NEXT: bnez a5, .LBB3_1
682; RV32IA-TSO-NEXT: .LBB3_3:
683; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]684;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]685; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i8_release_monotonic:
686; RV32IA-TSO-ZACAS: # %bb.0:
687; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
688; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
689; RV32IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]690; RV32IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]691; RV32IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]692; RV32IA-TSO-ZACAS-NEXT: sll a4, a4, a0
693; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]694; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
695; RV32IA-TSO-ZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
696; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
697; RV32IA-TSO-ZACAS-NEXT: and a5, a2, a4
698; RV32IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB3_3
699; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
700; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a0
701; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4
702; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a5
703; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
704; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB3_1
705; RV32IA-TSO-ZACAS-NEXT: .LBB3_3:
706; RV32IA-TSO-ZACAS-NEXT: ret
707;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]708; RV64I-LABEL: cmpxchg_i8_release_monotonic:
709; RV64I: # %bb.0:
710; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]711; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]712; RV64I-NEXT: sb a1, 7(sp)
713; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]714; RV64I-NEXT: li a3, 3
715; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]716; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]717; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]718; RV64I-NEXT: addi sp, sp, 16
719; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]720;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]721; RV64IA-WMO-LABEL: cmpxchg_i8_release_monotonic:
722; RV64IA-WMO: # %bb.0:
723; RV64IA-WMO-NEXT: andi a3, a0, -4
724; RV64IA-WMO-NEXT: slli a0, a0, 3
725; RV64IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]726; RV64IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]727; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]728; RV64IA-WMO-NEXT: sllw a4, a4, a0
729; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]730; RV64IA-WMO-NEXT: sllw a0, a2, a0
731; RV64IA-WMO-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
732; RV64IA-WMO-NEXT: lr.w a2, (a3)
733; RV64IA-WMO-NEXT: and a5, a2, a4
734; RV64IA-WMO-NEXT: bne a5, a1, .LBB3_3
735; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
736; RV64IA-WMO-NEXT: xor a5, a2, a0
737; RV64IA-WMO-NEXT: and a5, a5, a4
738; RV64IA-WMO-NEXT: xor a5, a2, a5
739; RV64IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
740; RV64IA-WMO-NEXT: bnez a5, .LBB3_1
741; RV64IA-WMO-NEXT: .LBB3_3:
742; RV64IA-WMO-NEXT: ret
743;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]744; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i8_release_monotonic:
745; RV64IA-WMO-ZACAS: # %bb.0:
746; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
747; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
748; RV64IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]749; RV64IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]750; RV64IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]751; RV64IA-WMO-ZACAS-NEXT: sllw a4, a4, a0
752; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]753; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
754; RV64IA-WMO-ZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
755; RV64IA-WMO-ZACAS-NEXT: lr.w a2, (a3)
756; RV64IA-WMO-ZACAS-NEXT: and a5, a2, a4
757; RV64IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB3_3
758; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
759; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a0
760; RV64IA-WMO-ZACAS-NEXT: and a5, a5, a4
761; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a5
762; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
763; RV64IA-WMO-ZACAS-NEXT: bnez a5, .LBB3_1
764; RV64IA-WMO-ZACAS-NEXT: .LBB3_3:
765; RV64IA-WMO-ZACAS-NEXT: ret
766;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]767; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_release_monotonic:
768; RV64IA-WMO-ZABHA: # %bb.0:
769; RV64IA-WMO-ZABHA-NEXT: amocas.b.rl a1, a2, (a0)
770; RV64IA-WMO-ZABHA-NEXT: ret
771;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]772; RV64IA-TSO-LABEL: cmpxchg_i8_release_monotonic:
773; RV64IA-TSO: # %bb.0:
774; RV64IA-TSO-NEXT: andi a3, a0, -4
775; RV64IA-TSO-NEXT: slli a0, a0, 3
776; RV64IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]777; RV64IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]778; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]779; RV64IA-TSO-NEXT: sllw a4, a4, a0
780; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]781; RV64IA-TSO-NEXT: sllw a0, a2, a0
782; RV64IA-TSO-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
783; RV64IA-TSO-NEXT: lr.w a2, (a3)
784; RV64IA-TSO-NEXT: and a5, a2, a4
785; RV64IA-TSO-NEXT: bne a5, a1, .LBB3_3
786; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
787; RV64IA-TSO-NEXT: xor a5, a2, a0
788; RV64IA-TSO-NEXT: and a5, a5, a4
789; RV64IA-TSO-NEXT: xor a5, a2, a5
790; RV64IA-TSO-NEXT: sc.w a5, a5, (a3)
791; RV64IA-TSO-NEXT: bnez a5, .LBB3_1
792; RV64IA-TSO-NEXT: .LBB3_3:
793; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]794;
795; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i8_release_monotonic:
796; RV64IA-TSO-ZACAS: # %bb.0:
797; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
798; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
799; RV64IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]800; RV64IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]801; RV64IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]802; RV64IA-TSO-ZACAS-NEXT: sllw a4, a4, a0
803; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]804; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
805; RV64IA-TSO-ZACAS-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
806; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
807; RV64IA-TSO-ZACAS-NEXT: and a5, a2, a4
808; RV64IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB3_3
809; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
810; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a0
811; RV64IA-TSO-ZACAS-NEXT: and a5, a5, a4
812; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a5
813; RV64IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
814; RV64IA-TSO-ZACAS-NEXT: bnez a5, .LBB3_1
815; RV64IA-TSO-ZACAS-NEXT: .LBB3_3:
816; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]817;
818; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_release_monotonic:
819; RV64IA-TSO-ZABHA: # %bb.0:
820; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
821; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]822 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val release monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]823 ret void
824}
825
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]826define void @cmpxchg_i8_release_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]827; RV32I-LABEL: cmpxchg_i8_release_acquire:
828; RV32I: # %bb.0:
829; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]830; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]831; RV32I-NEXT: sb a1, 11(sp)
832; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]833; RV32I-NEXT: li a3, 3
834; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]835; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]836; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]837; RV32I-NEXT: addi sp, sp, 16
838; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]839;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]840; RV32IA-WMO-LABEL: cmpxchg_i8_release_acquire:
841; RV32IA-WMO: # %bb.0:
842; RV32IA-WMO-NEXT: andi a3, a0, -4
843; RV32IA-WMO-NEXT: slli a0, a0, 3
844; RV32IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]845; RV32IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]846; RV32IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]847; RV32IA-WMO-NEXT: sll a4, a4, a0
848; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]849; RV32IA-WMO-NEXT: sll a0, a2, a0
850; RV32IA-WMO-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
851; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
852; RV32IA-WMO-NEXT: and a5, a2, a4
853; RV32IA-WMO-NEXT: bne a5, a1, .LBB4_3
854; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
855; RV32IA-WMO-NEXT: xor a5, a2, a0
856; RV32IA-WMO-NEXT: and a5, a5, a4
857; RV32IA-WMO-NEXT: xor a5, a2, a5
858; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
859; RV32IA-WMO-NEXT: bnez a5, .LBB4_1
860; RV32IA-WMO-NEXT: .LBB4_3:
861; RV32IA-WMO-NEXT: ret
862;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]863; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i8_release_acquire:
864; RV32IA-WMO-ZACAS: # %bb.0:
865; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
866; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
867; RV32IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]868; RV32IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]869; RV32IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]870; RV32IA-WMO-ZACAS-NEXT: sll a4, a4, a0
871; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]872; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
873; RV32IA-WMO-ZACAS-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
874; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
875; RV32IA-WMO-ZACAS-NEXT: and a5, a2, a4
876; RV32IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB4_3
877; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
878; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a0
879; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4
880; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a5
881; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
882; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB4_1
883; RV32IA-WMO-ZACAS-NEXT: .LBB4_3:
884; RV32IA-WMO-ZACAS-NEXT: ret
885;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]886; RV32IA-TSO-LABEL: cmpxchg_i8_release_acquire:
887; RV32IA-TSO: # %bb.0:
888; RV32IA-TSO-NEXT: andi a3, a0, -4
889; RV32IA-TSO-NEXT: slli a0, a0, 3
890; RV32IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]891; RV32IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]892; RV32IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]893; RV32IA-TSO-NEXT: sll a4, a4, a0
894; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]895; RV32IA-TSO-NEXT: sll a0, a2, a0
896; RV32IA-TSO-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
897; RV32IA-TSO-NEXT: lr.w a2, (a3)
898; RV32IA-TSO-NEXT: and a5, a2, a4
899; RV32IA-TSO-NEXT: bne a5, a1, .LBB4_3
900; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
901; RV32IA-TSO-NEXT: xor a5, a2, a0
902; RV32IA-TSO-NEXT: and a5, a5, a4
903; RV32IA-TSO-NEXT: xor a5, a2, a5
904; RV32IA-TSO-NEXT: sc.w a5, a5, (a3)
905; RV32IA-TSO-NEXT: bnez a5, .LBB4_1
906; RV32IA-TSO-NEXT: .LBB4_3:
907; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]908;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]909; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i8_release_acquire:
910; RV32IA-TSO-ZACAS: # %bb.0:
911; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
912; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
913; RV32IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]914; RV32IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]915; RV32IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]916; RV32IA-TSO-ZACAS-NEXT: sll a4, a4, a0
917; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]918; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
919; RV32IA-TSO-ZACAS-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
920; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
921; RV32IA-TSO-ZACAS-NEXT: and a5, a2, a4
922; RV32IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB4_3
923; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
924; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a0
925; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4
926; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a5
927; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
928; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB4_1
929; RV32IA-TSO-ZACAS-NEXT: .LBB4_3:
930; RV32IA-TSO-ZACAS-NEXT: ret
931;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]932; RV64I-LABEL: cmpxchg_i8_release_acquire:
933; RV64I: # %bb.0:
934; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]935; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]936; RV64I-NEXT: sb a1, 7(sp)
937; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]938; RV64I-NEXT: li a3, 3
939; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]940; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]941; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]942; RV64I-NEXT: addi sp, sp, 16
943; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]944;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]945; RV64IA-WMO-LABEL: cmpxchg_i8_release_acquire:
946; RV64IA-WMO: # %bb.0:
947; RV64IA-WMO-NEXT: andi a3, a0, -4
948; RV64IA-WMO-NEXT: slli a0, a0, 3
949; RV64IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]950; RV64IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]951; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]952; RV64IA-WMO-NEXT: sllw a4, a4, a0
953; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]954; RV64IA-WMO-NEXT: sllw a0, a2, a0
955; RV64IA-WMO-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
956; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
957; RV64IA-WMO-NEXT: and a5, a2, a4
958; RV64IA-WMO-NEXT: bne a5, a1, .LBB4_3
959; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
960; RV64IA-WMO-NEXT: xor a5, a2, a0
961; RV64IA-WMO-NEXT: and a5, a5, a4
962; RV64IA-WMO-NEXT: xor a5, a2, a5
963; RV64IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
964; RV64IA-WMO-NEXT: bnez a5, .LBB4_1
965; RV64IA-WMO-NEXT: .LBB4_3:
966; RV64IA-WMO-NEXT: ret
967;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]968; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i8_release_acquire:
969; RV64IA-WMO-ZACAS: # %bb.0:
970; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
971; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
972; RV64IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]973; RV64IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]974; RV64IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]975; RV64IA-WMO-ZACAS-NEXT: sllw a4, a4, a0
976; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]977; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
978; RV64IA-WMO-ZACAS-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
979; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
980; RV64IA-WMO-ZACAS-NEXT: and a5, a2, a4
981; RV64IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB4_3
982; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
983; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a0
984; RV64IA-WMO-ZACAS-NEXT: and a5, a5, a4
985; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a5
986; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
987; RV64IA-WMO-ZACAS-NEXT: bnez a5, .LBB4_1
988; RV64IA-WMO-ZACAS-NEXT: .LBB4_3:
989; RV64IA-WMO-ZACAS-NEXT: ret
990;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]991; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_release_acquire:
992; RV64IA-WMO-ZABHA: # %bb.0:
993; RV64IA-WMO-ZABHA-NEXT: amocas.b.aqrl a1, a2, (a0)
994; RV64IA-WMO-ZABHA-NEXT: ret
995;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]996; RV64IA-TSO-LABEL: cmpxchg_i8_release_acquire:
997; RV64IA-TSO: # %bb.0:
998; RV64IA-TSO-NEXT: andi a3, a0, -4
999; RV64IA-TSO-NEXT: slli a0, a0, 3
1000; RV64IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1001; RV64IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1002; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1003; RV64IA-TSO-NEXT: sllw a4, a4, a0
1004; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1005; RV64IA-TSO-NEXT: sllw a0, a2, a0
1006; RV64IA-TSO-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
1007; RV64IA-TSO-NEXT: lr.w a2, (a3)
1008; RV64IA-TSO-NEXT: and a5, a2, a4
1009; RV64IA-TSO-NEXT: bne a5, a1, .LBB4_3
1010; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
1011; RV64IA-TSO-NEXT: xor a5, a2, a0
1012; RV64IA-TSO-NEXT: and a5, a5, a4
1013; RV64IA-TSO-NEXT: xor a5, a2, a5
1014; RV64IA-TSO-NEXT: sc.w a5, a5, (a3)
1015; RV64IA-TSO-NEXT: bnez a5, .LBB4_1
1016; RV64IA-TSO-NEXT: .LBB4_3:
1017; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1018;
1019; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i8_release_acquire:
1020; RV64IA-TSO-ZACAS: # %bb.0:
1021; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
1022; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
1023; RV64IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1024; RV64IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1025; RV64IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1026; RV64IA-TSO-ZACAS-NEXT: sllw a4, a4, a0
1027; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1028; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
1029; RV64IA-TSO-ZACAS-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
1030; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
1031; RV64IA-TSO-ZACAS-NEXT: and a5, a2, a4
1032; RV64IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB4_3
1033; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
1034; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a0
1035; RV64IA-TSO-ZACAS-NEXT: and a5, a5, a4
1036; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a5
1037; RV64IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
1038; RV64IA-TSO-ZACAS-NEXT: bnez a5, .LBB4_1
1039; RV64IA-TSO-ZACAS-NEXT: .LBB4_3:
1040; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1041;
1042; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_release_acquire:
1043; RV64IA-TSO-ZABHA: # %bb.0:
1044; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
1045; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1046 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val release acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1047 ret void
1048}
1049
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1050define void @cmpxchg_i8_acq_rel_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1051; RV32I-LABEL: cmpxchg_i8_acq_rel_monotonic:
1052; RV32I: # %bb.0:
1053; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1054; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1055; RV32I-NEXT: sb a1, 11(sp)
1056; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1057; RV32I-NEXT: li a3, 4
1058; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1059; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1060; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1061; RV32I-NEXT: addi sp, sp, 16
1062; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1063;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1064; RV32IA-WMO-LABEL: cmpxchg_i8_acq_rel_monotonic:
1065; RV32IA-WMO: # %bb.0:
1066; RV32IA-WMO-NEXT: andi a3, a0, -4
1067; RV32IA-WMO-NEXT: slli a0, a0, 3
1068; RV32IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1069; RV32IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1070; RV32IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1071; RV32IA-WMO-NEXT: sll a4, a4, a0
1072; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1073; RV32IA-WMO-NEXT: sll a0, a2, a0
1074; RV32IA-WMO-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1075; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
1076; RV32IA-WMO-NEXT: and a5, a2, a4
1077; RV32IA-WMO-NEXT: bne a5, a1, .LBB5_3
1078; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1079; RV32IA-WMO-NEXT: xor a5, a2, a0
1080; RV32IA-WMO-NEXT: and a5, a5, a4
1081; RV32IA-WMO-NEXT: xor a5, a2, a5
1082; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
1083; RV32IA-WMO-NEXT: bnez a5, .LBB5_1
1084; RV32IA-WMO-NEXT: .LBB5_3:
1085; RV32IA-WMO-NEXT: ret
1086;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1087; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i8_acq_rel_monotonic:
1088; RV32IA-WMO-ZACAS: # %bb.0:
1089; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
1090; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
1091; RV32IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1092; RV32IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1093; RV32IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1094; RV32IA-WMO-ZACAS-NEXT: sll a4, a4, a0
1095; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1096; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
1097; RV32IA-WMO-ZACAS-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1098; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
1099; RV32IA-WMO-ZACAS-NEXT: and a5, a2, a4
1100; RV32IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB5_3
1101; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1102; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a0
1103; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4
1104; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a5
1105; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
1106; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB5_1
1107; RV32IA-WMO-ZACAS-NEXT: .LBB5_3:
1108; RV32IA-WMO-ZACAS-NEXT: ret
1109;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1110; RV32IA-TSO-LABEL: cmpxchg_i8_acq_rel_monotonic:
1111; RV32IA-TSO: # %bb.0:
1112; RV32IA-TSO-NEXT: andi a3, a0, -4
1113; RV32IA-TSO-NEXT: slli a0, a0, 3
1114; RV32IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1115; RV32IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1116; RV32IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1117; RV32IA-TSO-NEXT: sll a4, a4, a0
1118; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1119; RV32IA-TSO-NEXT: sll a0, a2, a0
1120; RV32IA-TSO-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1121; RV32IA-TSO-NEXT: lr.w a2, (a3)
1122; RV32IA-TSO-NEXT: and a5, a2, a4
1123; RV32IA-TSO-NEXT: bne a5, a1, .LBB5_3
1124; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1125; RV32IA-TSO-NEXT: xor a5, a2, a0
1126; RV32IA-TSO-NEXT: and a5, a5, a4
1127; RV32IA-TSO-NEXT: xor a5, a2, a5
1128; RV32IA-TSO-NEXT: sc.w a5, a5, (a3)
1129; RV32IA-TSO-NEXT: bnez a5, .LBB5_1
1130; RV32IA-TSO-NEXT: .LBB5_3:
1131; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1132;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1133; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i8_acq_rel_monotonic:
1134; RV32IA-TSO-ZACAS: # %bb.0:
1135; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
1136; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
1137; RV32IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1138; RV32IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1139; RV32IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1140; RV32IA-TSO-ZACAS-NEXT: sll a4, a4, a0
1141; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1142; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
1143; RV32IA-TSO-ZACAS-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1144; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
1145; RV32IA-TSO-ZACAS-NEXT: and a5, a2, a4
1146; RV32IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB5_3
1147; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1148; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a0
1149; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4
1150; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a5
1151; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
1152; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB5_1
1153; RV32IA-TSO-ZACAS-NEXT: .LBB5_3:
1154; RV32IA-TSO-ZACAS-NEXT: ret
1155;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1156; RV64I-LABEL: cmpxchg_i8_acq_rel_monotonic:
1157; RV64I: # %bb.0:
1158; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1159; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1160; RV64I-NEXT: sb a1, 7(sp)
1161; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1162; RV64I-NEXT: li a3, 4
1163; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1164; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1165; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1166; RV64I-NEXT: addi sp, sp, 16
1167; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]1168;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1169; RV64IA-WMO-LABEL: cmpxchg_i8_acq_rel_monotonic:
1170; RV64IA-WMO: # %bb.0:
1171; RV64IA-WMO-NEXT: andi a3, a0, -4
1172; RV64IA-WMO-NEXT: slli a0, a0, 3
1173; RV64IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1174; RV64IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1175; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1176; RV64IA-WMO-NEXT: sllw a4, a4, a0
1177; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1178; RV64IA-WMO-NEXT: sllw a0, a2, a0
1179; RV64IA-WMO-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1180; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
1181; RV64IA-WMO-NEXT: and a5, a2, a4
1182; RV64IA-WMO-NEXT: bne a5, a1, .LBB5_3
1183; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1184; RV64IA-WMO-NEXT: xor a5, a2, a0
1185; RV64IA-WMO-NEXT: and a5, a5, a4
1186; RV64IA-WMO-NEXT: xor a5, a2, a5
1187; RV64IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
1188; RV64IA-WMO-NEXT: bnez a5, .LBB5_1
1189; RV64IA-WMO-NEXT: .LBB5_3:
1190; RV64IA-WMO-NEXT: ret
1191;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1192; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i8_acq_rel_monotonic:
1193; RV64IA-WMO-ZACAS: # %bb.0:
1194; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
1195; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
1196; RV64IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1197; RV64IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1198; RV64IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1199; RV64IA-WMO-ZACAS-NEXT: sllw a4, a4, a0
1200; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1201; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
1202; RV64IA-WMO-ZACAS-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1203; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
1204; RV64IA-WMO-ZACAS-NEXT: and a5, a2, a4
1205; RV64IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB5_3
1206; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1207; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a0
1208; RV64IA-WMO-ZACAS-NEXT: and a5, a5, a4
1209; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a5
1210; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
1211; RV64IA-WMO-ZACAS-NEXT: bnez a5, .LBB5_1
1212; RV64IA-WMO-ZACAS-NEXT: .LBB5_3:
1213; RV64IA-WMO-ZACAS-NEXT: ret
1214;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1215; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acq_rel_monotonic:
1216; RV64IA-WMO-ZABHA: # %bb.0:
1217; RV64IA-WMO-ZABHA-NEXT: amocas.b.aqrl a1, a2, (a0)
1218; RV64IA-WMO-ZABHA-NEXT: ret
1219;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1220; RV64IA-TSO-LABEL: cmpxchg_i8_acq_rel_monotonic:
1221; RV64IA-TSO: # %bb.0:
1222; RV64IA-TSO-NEXT: andi a3, a0, -4
1223; RV64IA-TSO-NEXT: slli a0, a0, 3
1224; RV64IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1225; RV64IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1226; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1227; RV64IA-TSO-NEXT: sllw a4, a4, a0
1228; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1229; RV64IA-TSO-NEXT: sllw a0, a2, a0
1230; RV64IA-TSO-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1231; RV64IA-TSO-NEXT: lr.w a2, (a3)
1232; RV64IA-TSO-NEXT: and a5, a2, a4
1233; RV64IA-TSO-NEXT: bne a5, a1, .LBB5_3
1234; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1235; RV64IA-TSO-NEXT: xor a5, a2, a0
1236; RV64IA-TSO-NEXT: and a5, a5, a4
1237; RV64IA-TSO-NEXT: xor a5, a2, a5
1238; RV64IA-TSO-NEXT: sc.w a5, a5, (a3)
1239; RV64IA-TSO-NEXT: bnez a5, .LBB5_1
1240; RV64IA-TSO-NEXT: .LBB5_3:
1241; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1242;
1243; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i8_acq_rel_monotonic:
1244; RV64IA-TSO-ZACAS: # %bb.0:
1245; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
1246; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
1247; RV64IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1248; RV64IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1249; RV64IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1250; RV64IA-TSO-ZACAS-NEXT: sllw a4, a4, a0
1251; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1252; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
1253; RV64IA-TSO-ZACAS-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
1254; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
1255; RV64IA-TSO-ZACAS-NEXT: and a5, a2, a4
1256; RV64IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB5_3
1257; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
1258; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a0
1259; RV64IA-TSO-ZACAS-NEXT: and a5, a5, a4
1260; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a5
1261; RV64IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
1262; RV64IA-TSO-ZACAS-NEXT: bnez a5, .LBB5_1
1263; RV64IA-TSO-ZACAS-NEXT: .LBB5_3:
1264; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1265;
1266; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acq_rel_monotonic:
1267; RV64IA-TSO-ZABHA: # %bb.0:
1268; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
1269; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1270 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acq_rel monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1271 ret void
1272}
1273
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1274define void @cmpxchg_i8_acq_rel_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1275; RV32I-LABEL: cmpxchg_i8_acq_rel_acquire:
1276; RV32I: # %bb.0:
1277; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1278; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1279; RV32I-NEXT: sb a1, 11(sp)
1280; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1281; RV32I-NEXT: li a3, 4
1282; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1283; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1284; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1285; RV32I-NEXT: addi sp, sp, 16
1286; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1287;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1288; RV32IA-WMO-LABEL: cmpxchg_i8_acq_rel_acquire:
1289; RV32IA-WMO: # %bb.0:
1290; RV32IA-WMO-NEXT: andi a3, a0, -4
1291; RV32IA-WMO-NEXT: slli a0, a0, 3
1292; RV32IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1293; RV32IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1294; RV32IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1295; RV32IA-WMO-NEXT: sll a4, a4, a0
1296; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1297; RV32IA-WMO-NEXT: sll a0, a2, a0
1298; RV32IA-WMO-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1299; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
1300; RV32IA-WMO-NEXT: and a5, a2, a4
1301; RV32IA-WMO-NEXT: bne a5, a1, .LBB6_3
1302; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1303; RV32IA-WMO-NEXT: xor a5, a2, a0
1304; RV32IA-WMO-NEXT: and a5, a5, a4
1305; RV32IA-WMO-NEXT: xor a5, a2, a5
1306; RV32IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
1307; RV32IA-WMO-NEXT: bnez a5, .LBB6_1
1308; RV32IA-WMO-NEXT: .LBB6_3:
1309; RV32IA-WMO-NEXT: ret
1310;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1311; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i8_acq_rel_acquire:
1312; RV32IA-WMO-ZACAS: # %bb.0:
1313; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
1314; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
1315; RV32IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1316; RV32IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1317; RV32IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1318; RV32IA-WMO-ZACAS-NEXT: sll a4, a4, a0
1319; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1320; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
1321; RV32IA-WMO-ZACAS-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1322; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
1323; RV32IA-WMO-ZACAS-NEXT: and a5, a2, a4
1324; RV32IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB6_3
1325; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1326; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a0
1327; RV32IA-WMO-ZACAS-NEXT: and a5, a5, a4
1328; RV32IA-WMO-ZACAS-NEXT: xor a5, a2, a5
1329; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
1330; RV32IA-WMO-ZACAS-NEXT: bnez a5, .LBB6_1
1331; RV32IA-WMO-ZACAS-NEXT: .LBB6_3:
1332; RV32IA-WMO-ZACAS-NEXT: ret
1333;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1334; RV32IA-TSO-LABEL: cmpxchg_i8_acq_rel_acquire:
1335; RV32IA-TSO: # %bb.0:
1336; RV32IA-TSO-NEXT: andi a3, a0, -4
1337; RV32IA-TSO-NEXT: slli a0, a0, 3
1338; RV32IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1339; RV32IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1340; RV32IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1341; RV32IA-TSO-NEXT: sll a4, a4, a0
1342; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1343; RV32IA-TSO-NEXT: sll a0, a2, a0
1344; RV32IA-TSO-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1345; RV32IA-TSO-NEXT: lr.w a2, (a3)
1346; RV32IA-TSO-NEXT: and a5, a2, a4
1347; RV32IA-TSO-NEXT: bne a5, a1, .LBB6_3
1348; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1349; RV32IA-TSO-NEXT: xor a5, a2, a0
1350; RV32IA-TSO-NEXT: and a5, a5, a4
1351; RV32IA-TSO-NEXT: xor a5, a2, a5
1352; RV32IA-TSO-NEXT: sc.w a5, a5, (a3)
1353; RV32IA-TSO-NEXT: bnez a5, .LBB6_1
1354; RV32IA-TSO-NEXT: .LBB6_3:
1355; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1356;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1357; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i8_acq_rel_acquire:
1358; RV32IA-TSO-ZACAS: # %bb.0:
1359; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
1360; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
1361; RV32IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1362; RV32IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1363; RV32IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1364; RV32IA-TSO-ZACAS-NEXT: sll a4, a4, a0
1365; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1366; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
1367; RV32IA-TSO-ZACAS-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1368; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
1369; RV32IA-TSO-ZACAS-NEXT: and a5, a2, a4
1370; RV32IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB6_3
1371; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1372; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a0
1373; RV32IA-TSO-ZACAS-NEXT: and a5, a5, a4
1374; RV32IA-TSO-ZACAS-NEXT: xor a5, a2, a5
1375; RV32IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
1376; RV32IA-TSO-ZACAS-NEXT: bnez a5, .LBB6_1
1377; RV32IA-TSO-ZACAS-NEXT: .LBB6_3:
1378; RV32IA-TSO-ZACAS-NEXT: ret
1379;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1380; RV64I-LABEL: cmpxchg_i8_acq_rel_acquire:
1381; RV64I: # %bb.0:
1382; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1383; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1384; RV64I-NEXT: sb a1, 7(sp)
1385; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1386; RV64I-NEXT: li a3, 4
1387; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1388; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1389; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1390; RV64I-NEXT: addi sp, sp, 16
1391; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]1392;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1393; RV64IA-WMO-LABEL: cmpxchg_i8_acq_rel_acquire:
1394; RV64IA-WMO: # %bb.0:
1395; RV64IA-WMO-NEXT: andi a3, a0, -4
1396; RV64IA-WMO-NEXT: slli a0, a0, 3
1397; RV64IA-WMO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1398; RV64IA-WMO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1399; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1400; RV64IA-WMO-NEXT: sllw a4, a4, a0
1401; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1402; RV64IA-WMO-NEXT: sllw a0, a2, a0
1403; RV64IA-WMO-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1404; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
1405; RV64IA-WMO-NEXT: and a5, a2, a4
1406; RV64IA-WMO-NEXT: bne a5, a1, .LBB6_3
1407; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1408; RV64IA-WMO-NEXT: xor a5, a2, a0
1409; RV64IA-WMO-NEXT: and a5, a5, a4
1410; RV64IA-WMO-NEXT: xor a5, a2, a5
1411; RV64IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
1412; RV64IA-WMO-NEXT: bnez a5, .LBB6_1
1413; RV64IA-WMO-NEXT: .LBB6_3:
1414; RV64IA-WMO-NEXT: ret
1415;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1416; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i8_acq_rel_acquire:
1417; RV64IA-WMO-ZACAS: # %bb.0:
1418; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
1419; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
1420; RV64IA-WMO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1421; RV64IA-WMO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1422; RV64IA-WMO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1423; RV64IA-WMO-ZACAS-NEXT: sllw a4, a4, a0
1424; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1425; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
1426; RV64IA-WMO-ZACAS-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1427; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
1428; RV64IA-WMO-ZACAS-NEXT: and a5, a2, a4
1429; RV64IA-WMO-ZACAS-NEXT: bne a5, a1, .LBB6_3
1430; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1431; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a0
1432; RV64IA-WMO-ZACAS-NEXT: and a5, a5, a4
1433; RV64IA-WMO-ZACAS-NEXT: xor a5, a2, a5
1434; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
1435; RV64IA-WMO-ZACAS-NEXT: bnez a5, .LBB6_1
1436; RV64IA-WMO-ZACAS-NEXT: .LBB6_3:
1437; RV64IA-WMO-ZACAS-NEXT: ret
1438;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1439; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_acq_rel_acquire:
1440; RV64IA-WMO-ZABHA: # %bb.0:
1441; RV64IA-WMO-ZABHA-NEXT: amocas.b.aqrl a1, a2, (a0)
1442; RV64IA-WMO-ZABHA-NEXT: ret
1443;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1444; RV64IA-TSO-LABEL: cmpxchg_i8_acq_rel_acquire:
1445; RV64IA-TSO: # %bb.0:
1446; RV64IA-TSO-NEXT: andi a3, a0, -4
1447; RV64IA-TSO-NEXT: slli a0, a0, 3
1448; RV64IA-TSO-NEXT: li a4, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1449; RV64IA-TSO-NEXT: andi a1, a1, 255
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1450; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1451; RV64IA-TSO-NEXT: sllw a4, a4, a0
1452; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]1453; RV64IA-TSO-NEXT: sllw a0, a2, a0
1454; RV64IA-TSO-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1455; RV64IA-TSO-NEXT: lr.w a2, (a3)
1456; RV64IA-TSO-NEXT: and a5, a2, a4
1457; RV64IA-TSO-NEXT: bne a5, a1, .LBB6_3
1458; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1459; RV64IA-TSO-NEXT: xor a5, a2, a0
1460; RV64IA-TSO-NEXT: and a5, a5, a4
1461; RV64IA-TSO-NEXT: xor a5, a2, a5
1462; RV64IA-TSO-NEXT: sc.w a5, a5, (a3)
1463; RV64IA-TSO-NEXT: bnez a5, .LBB6_1
1464; RV64IA-TSO-NEXT: .LBB6_3:
1465; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1466;
1467; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i8_acq_rel_acquire:
1468; RV64IA-TSO-ZACAS: # %bb.0:
1469; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
1470; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
1471; RV64IA-TSO-ZACAS-NEXT: li a4, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1472; RV64IA-TSO-ZACAS-NEXT: andi a1, a1, 255
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1473; RV64IA-TSO-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1474; RV64IA-TSO-ZACAS-NEXT: sllw a4, a4, a0
1475; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]1476; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
1477; RV64IA-TSO-ZACAS-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
1478; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
1479; RV64IA-TSO-ZACAS-NEXT: and a5, a2, a4
1480; RV64IA-TSO-ZACAS-NEXT: bne a5, a1, .LBB6_3
1481; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB6_1 Depth=1
1482; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a0
1483; RV64IA-TSO-ZACAS-NEXT: and a5, a5, a4
1484; RV64IA-TSO-ZACAS-NEXT: xor a5, a2, a5
1485; RV64IA-TSO-ZACAS-NEXT: sc.w a5, a5, (a3)
1486; RV64IA-TSO-ZACAS-NEXT: bnez a5, .LBB6_1
1487; RV64IA-TSO-ZACAS-NEXT: .LBB6_3:
1488; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1489;
1490; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_acq_rel_acquire:
1491; RV64IA-TSO-ZABHA: # %bb.0:
1492; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
1493; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1494 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val acq_rel acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1495 ret void
1496}
1497
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1498define void @cmpxchg_i8_seq_cst_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1499; RV32I-LABEL: cmpxchg_i8_seq_cst_monotonic:
1500; RV32I: # %bb.0:
1501; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1502; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1503; RV32I-NEXT: sb a1, 11(sp)
1504; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1505; RV32I-NEXT: li a3, 5
1506; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1507; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1508; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1509; RV32I-NEXT: addi sp, sp, 16
1510; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1511;
1512; RV32IA-LABEL: cmpxchg_i8_seq_cst_monotonic:
1513; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1514; RV32IA-NEXT: andi a3, a0, -4
1515; RV32IA-NEXT: slli a0, a0, 3
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1516; RV32IA-NEXT: li a4, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]1517; RV32IA-NEXT: andi a1, a1, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]1518; RV32IA-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1519; RV32IA-NEXT: sll a4, a4, a0
1520; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1521; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1522; RV32IA-NEXT: .LBB7_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1523; RV32IA-NEXT: lr.w.aqrl a2, (a3)
1524; RV32IA-NEXT: and a5, a2, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1525; RV32IA-NEXT: bne a5, a1, .LBB7_3
1526; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB7_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1527; RV32IA-NEXT: xor a5, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1528; RV32IA-NEXT: and a5, a5, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1529; RV32IA-NEXT: xor a5, a2, a5
Alex Bradbury5b070592023-03-30 20:47:28 +0100[diff] [blame]1530; RV32IA-NEXT: sc.w.rl a5, a5, (a3)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1531; RV32IA-NEXT: bnez a5, .LBB7_1
1532; RV32IA-NEXT: .LBB7_3:
1533; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1534;
1535; RV64I-LABEL: cmpxchg_i8_seq_cst_monotonic:
1536; RV64I: # %bb.0:
1537; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1538; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1539; RV64I-NEXT: sb a1, 7(sp)
1540; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1541; RV64I-NEXT: li a3, 5
1542; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1543; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1544; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1545; RV64I-NEXT: addi sp, sp, 16
1546; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]1547;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1548; RV64IA-WMO-LABEL: cmpxchg_i8_seq_cst_monotonic:
1549; RV64IA-WMO: # %bb.0:
1550; RV64IA-WMO-NEXT: andi a3, a0, -4
1551; RV64IA-WMO-NEXT: slli a0, a0, 3
1552; RV64IA-WMO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1553; RV64IA-WMO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1554; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1555; RV64IA-WMO-NEXT: sllw a4, a4, a0
1556; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1557; RV64IA-WMO-NEXT: sllw a0, a2, a0
1558; RV64IA-WMO-NEXT: .LBB7_1: # =>This Inner Loop Header: Depth=1
1559; RV64IA-WMO-NEXT: lr.w.aqrl a2, (a3)
1560; RV64IA-WMO-NEXT: and a5, a2, a4
1561; RV64IA-WMO-NEXT: bne a5, a1, .LBB7_3
1562; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB7_1 Depth=1
1563; RV64IA-WMO-NEXT: xor a5, a2, a0
1564; RV64IA-WMO-NEXT: and a5, a5, a4
1565; RV64IA-WMO-NEXT: xor a5, a2, a5
1566; RV64IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
1567; RV64IA-WMO-NEXT: bnez a5, .LBB7_1
1568; RV64IA-WMO-NEXT: .LBB7_3:
1569; RV64IA-WMO-NEXT: ret
1570;
1571; RV64IA-ZACAS-LABEL: cmpxchg_i8_seq_cst_monotonic:
1572; RV64IA-ZACAS: # %bb.0:
1573; RV64IA-ZACAS-NEXT: andi a3, a0, -4
1574; RV64IA-ZACAS-NEXT: slli a0, a0, 3
1575; RV64IA-ZACAS-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1576; RV64IA-ZACAS-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1577; RV64IA-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1578; RV64IA-ZACAS-NEXT: sllw a4, a4, a0
1579; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1580; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
1581; RV64IA-ZACAS-NEXT: .LBB7_1: # =>This Inner Loop Header: Depth=1
1582; RV64IA-ZACAS-NEXT: lr.w.aqrl a2, (a3)
1583; RV64IA-ZACAS-NEXT: and a5, a2, a4
1584; RV64IA-ZACAS-NEXT: bne a5, a1, .LBB7_3
1585; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB7_1 Depth=1
1586; RV64IA-ZACAS-NEXT: xor a5, a2, a0
1587; RV64IA-ZACAS-NEXT: and a5, a5, a4
1588; RV64IA-ZACAS-NEXT: xor a5, a2, a5
1589; RV64IA-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
1590; RV64IA-ZACAS-NEXT: bnez a5, .LBB7_1
1591; RV64IA-ZACAS-NEXT: .LBB7_3:
1592; RV64IA-ZACAS-NEXT: ret
1593;
1594; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_seq_cst_monotonic:
1595; RV64IA-WMO-ZABHA: # %bb.0:
1596; RV64IA-WMO-ZABHA-NEXT: amocas.b.aqrl a1, a2, (a0)
1597; RV64IA-WMO-ZABHA-NEXT: ret
1598;
1599; RV64IA-TSO-LABEL: cmpxchg_i8_seq_cst_monotonic:
1600; RV64IA-TSO: # %bb.0:
1601; RV64IA-TSO-NEXT: andi a3, a0, -4
1602; RV64IA-TSO-NEXT: slli a0, a0, 3
1603; RV64IA-TSO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1604; RV64IA-TSO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1605; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1606; RV64IA-TSO-NEXT: sllw a4, a4, a0
1607; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1608; RV64IA-TSO-NEXT: sllw a0, a2, a0
1609; RV64IA-TSO-NEXT: .LBB7_1: # =>This Inner Loop Header: Depth=1
1610; RV64IA-TSO-NEXT: lr.w.aqrl a2, (a3)
1611; RV64IA-TSO-NEXT: and a5, a2, a4
1612; RV64IA-TSO-NEXT: bne a5, a1, .LBB7_3
1613; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB7_1 Depth=1
1614; RV64IA-TSO-NEXT: xor a5, a2, a0
1615; RV64IA-TSO-NEXT: and a5, a5, a4
1616; RV64IA-TSO-NEXT: xor a5, a2, a5
1617; RV64IA-TSO-NEXT: sc.w.rl a5, a5, (a3)
1618; RV64IA-TSO-NEXT: bnez a5, .LBB7_1
1619; RV64IA-TSO-NEXT: .LBB7_3:
1620; RV64IA-TSO-NEXT: ret
1621;
1622; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_seq_cst_monotonic:
1623; RV64IA-TSO-ZABHA: # %bb.0:
1624; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
1625; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1626 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1627 ret void
1628}
1629
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1630define void @cmpxchg_i8_seq_cst_acquire(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1631; RV32I-LABEL: cmpxchg_i8_seq_cst_acquire:
1632; RV32I: # %bb.0:
1633; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1634; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1635; RV32I-NEXT: sb a1, 11(sp)
1636; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1637; RV32I-NEXT: li a3, 5
1638; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1639; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1640; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1641; RV32I-NEXT: addi sp, sp, 16
1642; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1643;
1644; RV32IA-LABEL: cmpxchg_i8_seq_cst_acquire:
1645; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1646; RV32IA-NEXT: andi a3, a0, -4
1647; RV32IA-NEXT: slli a0, a0, 3
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1648; RV32IA-NEXT: li a4, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]1649; RV32IA-NEXT: andi a1, a1, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]1650; RV32IA-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1651; RV32IA-NEXT: sll a4, a4, a0
1652; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1653; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1654; RV32IA-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1655; RV32IA-NEXT: lr.w.aqrl a2, (a3)
1656; RV32IA-NEXT: and a5, a2, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1657; RV32IA-NEXT: bne a5, a1, .LBB8_3
1658; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB8_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1659; RV32IA-NEXT: xor a5, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1660; RV32IA-NEXT: and a5, a5, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1661; RV32IA-NEXT: xor a5, a2, a5
Alex Bradbury5b070592023-03-30 20:47:28 +0100[diff] [blame]1662; RV32IA-NEXT: sc.w.rl a5, a5, (a3)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1663; RV32IA-NEXT: bnez a5, .LBB8_1
1664; RV32IA-NEXT: .LBB8_3:
1665; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1666;
1667; RV64I-LABEL: cmpxchg_i8_seq_cst_acquire:
1668; RV64I: # %bb.0:
1669; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1670; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1671; RV64I-NEXT: sb a1, 7(sp)
1672; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1673; RV64I-NEXT: li a3, 5
1674; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1675; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1676; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1677; RV64I-NEXT: addi sp, sp, 16
1678; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]1679;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1680; RV64IA-WMO-LABEL: cmpxchg_i8_seq_cst_acquire:
1681; RV64IA-WMO: # %bb.0:
1682; RV64IA-WMO-NEXT: andi a3, a0, -4
1683; RV64IA-WMO-NEXT: slli a0, a0, 3
1684; RV64IA-WMO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1685; RV64IA-WMO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1686; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1687; RV64IA-WMO-NEXT: sllw a4, a4, a0
1688; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1689; RV64IA-WMO-NEXT: sllw a0, a2, a0
1690; RV64IA-WMO-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1
1691; RV64IA-WMO-NEXT: lr.w.aqrl a2, (a3)
1692; RV64IA-WMO-NEXT: and a5, a2, a4
1693; RV64IA-WMO-NEXT: bne a5, a1, .LBB8_3
1694; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB8_1 Depth=1
1695; RV64IA-WMO-NEXT: xor a5, a2, a0
1696; RV64IA-WMO-NEXT: and a5, a5, a4
1697; RV64IA-WMO-NEXT: xor a5, a2, a5
1698; RV64IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
1699; RV64IA-WMO-NEXT: bnez a5, .LBB8_1
1700; RV64IA-WMO-NEXT: .LBB8_3:
1701; RV64IA-WMO-NEXT: ret
1702;
1703; RV64IA-ZACAS-LABEL: cmpxchg_i8_seq_cst_acquire:
1704; RV64IA-ZACAS: # %bb.0:
1705; RV64IA-ZACAS-NEXT: andi a3, a0, -4
1706; RV64IA-ZACAS-NEXT: slli a0, a0, 3
1707; RV64IA-ZACAS-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1708; RV64IA-ZACAS-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1709; RV64IA-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1710; RV64IA-ZACAS-NEXT: sllw a4, a4, a0
1711; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1712; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
1713; RV64IA-ZACAS-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1
1714; RV64IA-ZACAS-NEXT: lr.w.aqrl a2, (a3)
1715; RV64IA-ZACAS-NEXT: and a5, a2, a4
1716; RV64IA-ZACAS-NEXT: bne a5, a1, .LBB8_3
1717; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB8_1 Depth=1
1718; RV64IA-ZACAS-NEXT: xor a5, a2, a0
1719; RV64IA-ZACAS-NEXT: and a5, a5, a4
1720; RV64IA-ZACAS-NEXT: xor a5, a2, a5
1721; RV64IA-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
1722; RV64IA-ZACAS-NEXT: bnez a5, .LBB8_1
1723; RV64IA-ZACAS-NEXT: .LBB8_3:
1724; RV64IA-ZACAS-NEXT: ret
1725;
1726; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_seq_cst_acquire:
1727; RV64IA-WMO-ZABHA: # %bb.0:
1728; RV64IA-WMO-ZABHA-NEXT: amocas.b.aqrl a1, a2, (a0)
1729; RV64IA-WMO-ZABHA-NEXT: ret
1730;
1731; RV64IA-TSO-LABEL: cmpxchg_i8_seq_cst_acquire:
1732; RV64IA-TSO: # %bb.0:
1733; RV64IA-TSO-NEXT: andi a3, a0, -4
1734; RV64IA-TSO-NEXT: slli a0, a0, 3
1735; RV64IA-TSO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1736; RV64IA-TSO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1737; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1738; RV64IA-TSO-NEXT: sllw a4, a4, a0
1739; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1740; RV64IA-TSO-NEXT: sllw a0, a2, a0
1741; RV64IA-TSO-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1
1742; RV64IA-TSO-NEXT: lr.w.aqrl a2, (a3)
1743; RV64IA-TSO-NEXT: and a5, a2, a4
1744; RV64IA-TSO-NEXT: bne a5, a1, .LBB8_3
1745; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB8_1 Depth=1
1746; RV64IA-TSO-NEXT: xor a5, a2, a0
1747; RV64IA-TSO-NEXT: and a5, a5, a4
1748; RV64IA-TSO-NEXT: xor a5, a2, a5
1749; RV64IA-TSO-NEXT: sc.w.rl a5, a5, (a3)
1750; RV64IA-TSO-NEXT: bnez a5, .LBB8_1
1751; RV64IA-TSO-NEXT: .LBB8_3:
1752; RV64IA-TSO-NEXT: ret
1753;
1754; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_seq_cst_acquire:
1755; RV64IA-TSO-ZABHA: # %bb.0:
1756; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
1757; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1758 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1759 ret void
1760}
1761
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1762define void @cmpxchg_i8_seq_cst_seq_cst(ptr %ptr, i8 %cmp, i8 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1763; RV32I-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1764; RV32I: # %bb.0:
1765; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1766; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1767; RV32I-NEXT: sb a1, 11(sp)
1768; RV32I-NEXT: addi a1, sp, 11
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1769; RV32I-NEXT: li a3, 5
1770; RV32I-NEXT: li a4, 5
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1771; RV32I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1772; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1773; RV32I-NEXT: addi sp, sp, 16
1774; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1775;
1776; RV32IA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1777; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1778; RV32IA-NEXT: andi a3, a0, -4
1779; RV32IA-NEXT: slli a0, a0, 3
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1780; RV32IA-NEXT: li a4, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]1781; RV32IA-NEXT: andi a1, a1, 255
Craig Topper249d7de2021-01-05 10:23:04 -0800[diff] [blame]1782; RV32IA-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1783; RV32IA-NEXT: sll a4, a4, a0
1784; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1785; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1786; RV32IA-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1787; RV32IA-NEXT: lr.w.aqrl a2, (a3)
1788; RV32IA-NEXT: and a5, a2, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1789; RV32IA-NEXT: bne a5, a1, .LBB9_3
1790; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB9_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1791; RV32IA-NEXT: xor a5, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1792; RV32IA-NEXT: and a5, a5, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1793; RV32IA-NEXT: xor a5, a2, a5
Alex Bradbury5b070592023-03-30 20:47:28 +0100[diff] [blame]1794; RV32IA-NEXT: sc.w.rl a5, a5, (a3)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1795; RV32IA-NEXT: bnez a5, .LBB9_1
1796; RV32IA-NEXT: .LBB9_3:
1797; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1798;
1799; RV64I-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1800; RV64I: # %bb.0:
1801; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1802; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1803; RV64I-NEXT: sb a1, 7(sp)
1804; RV64I-NEXT: addi a1, sp, 7
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1805; RV64I-NEXT: li a3, 5
1806; RV64I-NEXT: li a4, 5
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1807; RV64I-NEXT: call __atomic_compare_exchange_1
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1808; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1809; RV64I-NEXT: addi sp, sp, 16
1810; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]1811;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1812; RV64IA-WMO-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1813; RV64IA-WMO: # %bb.0:
1814; RV64IA-WMO-NEXT: andi a3, a0, -4
1815; RV64IA-WMO-NEXT: slli a0, a0, 3
1816; RV64IA-WMO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1817; RV64IA-WMO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1818; RV64IA-WMO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1819; RV64IA-WMO-NEXT: sllw a4, a4, a0
1820; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1821; RV64IA-WMO-NEXT: sllw a0, a2, a0
1822; RV64IA-WMO-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
1823; RV64IA-WMO-NEXT: lr.w.aqrl a2, (a3)
1824; RV64IA-WMO-NEXT: and a5, a2, a4
1825; RV64IA-WMO-NEXT: bne a5, a1, .LBB9_3
1826; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB9_1 Depth=1
1827; RV64IA-WMO-NEXT: xor a5, a2, a0
1828; RV64IA-WMO-NEXT: and a5, a5, a4
1829; RV64IA-WMO-NEXT: xor a5, a2, a5
1830; RV64IA-WMO-NEXT: sc.w.rl a5, a5, (a3)
1831; RV64IA-WMO-NEXT: bnez a5, .LBB9_1
1832; RV64IA-WMO-NEXT: .LBB9_3:
1833; RV64IA-WMO-NEXT: ret
1834;
1835; RV64IA-ZACAS-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1836; RV64IA-ZACAS: # %bb.0:
1837; RV64IA-ZACAS-NEXT: andi a3, a0, -4
1838; RV64IA-ZACAS-NEXT: slli a0, a0, 3
1839; RV64IA-ZACAS-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1840; RV64IA-ZACAS-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1841; RV64IA-ZACAS-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1842; RV64IA-ZACAS-NEXT: sllw a4, a4, a0
1843; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1844; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
1845; RV64IA-ZACAS-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
1846; RV64IA-ZACAS-NEXT: lr.w.aqrl a2, (a3)
1847; RV64IA-ZACAS-NEXT: and a5, a2, a4
1848; RV64IA-ZACAS-NEXT: bne a5, a1, .LBB9_3
1849; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB9_1 Depth=1
1850; RV64IA-ZACAS-NEXT: xor a5, a2, a0
1851; RV64IA-ZACAS-NEXT: and a5, a5, a4
1852; RV64IA-ZACAS-NEXT: xor a5, a2, a5
1853; RV64IA-ZACAS-NEXT: sc.w.rl a5, a5, (a3)
1854; RV64IA-ZACAS-NEXT: bnez a5, .LBB9_1
1855; RV64IA-ZACAS-NEXT: .LBB9_3:
1856; RV64IA-ZACAS-NEXT: ret
1857;
1858; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1859; RV64IA-WMO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]1860; RV64IA-WMO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1861; RV64IA-WMO-ZABHA-NEXT: amocas.b.aqrl a1, a2, (a0)
1862; RV64IA-WMO-ZABHA-NEXT: ret
1863;
1864; RV64IA-TSO-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1865; RV64IA-TSO: # %bb.0:
1866; RV64IA-TSO-NEXT: andi a3, a0, -4
1867; RV64IA-TSO-NEXT: slli a0, a0, 3
1868; RV64IA-TSO-NEXT: li a4, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1869; RV64IA-TSO-NEXT: andi a1, a1, 255
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1870; RV64IA-TSO-NEXT: andi a2, a2, 255
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1871; RV64IA-TSO-NEXT: sllw a4, a4, a0
1872; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1873; RV64IA-TSO-NEXT: sllw a0, a2, a0
1874; RV64IA-TSO-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
1875; RV64IA-TSO-NEXT: lr.w.aqrl a2, (a3)
1876; RV64IA-TSO-NEXT: and a5, a2, a4
1877; RV64IA-TSO-NEXT: bne a5, a1, .LBB9_3
1878; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB9_1 Depth=1
1879; RV64IA-TSO-NEXT: xor a5, a2, a0
1880; RV64IA-TSO-NEXT: and a5, a5, a4
1881; RV64IA-TSO-NEXT: xor a5, a2, a5
1882; RV64IA-TSO-NEXT: sc.w.rl a5, a5, (a3)
1883; RV64IA-TSO-NEXT: bnez a5, .LBB9_1
1884; RV64IA-TSO-NEXT: .LBB9_3:
1885; RV64IA-TSO-NEXT: ret
1886;
1887; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i8_seq_cst_seq_cst:
1888; RV64IA-TSO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]1889; RV64IA-TSO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1890; RV64IA-TSO-ZABHA-NEXT: amocas.b a1, a2, (a0)
1891; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1892 %res = cmpxchg ptr %ptr, i8 %cmp, i8 %val seq_cst seq_cst
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1893 ret void
1894}
1895
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]1896define void @cmpxchg_i16_monotonic_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1897; RV32I-LABEL: cmpxchg_i16_monotonic_monotonic:
1898; RV32I: # %bb.0:
1899; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1900; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1901; RV32I-NEXT: sh a1, 10(sp)
1902; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1903; RV32I-NEXT: li a3, 0
1904; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1905; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1906; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1907; RV32I-NEXT: addi sp, sp, 16
1908; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1909;
1910; RV32IA-LABEL: cmpxchg_i16_monotonic_monotonic:
1911; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1912; RV32IA-NEXT: andi a3, a0, -4
1913; RV32IA-NEXT: slli a0, a0, 3
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1914; RV32IA-NEXT: lui a4, 16
1915; RV32IA-NEXT: addi a4, a4, -1
1916; RV32IA-NEXT: sll a5, a4, a0
1917; RV32IA-NEXT: and a1, a1, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1918; RV32IA-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1919; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1920; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1921; RV32IA-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1922; RV32IA-NEXT: lr.w a2, (a3)
1923; RV32IA-NEXT: and a4, a2, a5
1924; RV32IA-NEXT: bne a4, a1, .LBB10_3
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1925; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB10_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]1926; RV32IA-NEXT: xor a4, a2, a0
1927; RV32IA-NEXT: and a4, a4, a5
1928; RV32IA-NEXT: xor a4, a2, a4
1929; RV32IA-NEXT: sc.w a4, a4, (a3)
1930; RV32IA-NEXT: bnez a4, .LBB10_1
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]1931; RV32IA-NEXT: .LBB10_3:
1932; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1933;
1934; RV64I-LABEL: cmpxchg_i16_monotonic_monotonic:
1935; RV64I: # %bb.0:
1936; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1937; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1938; RV64I-NEXT: sh a1, 6(sp)
1939; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]1940; RV64I-NEXT: li a3, 0
1941; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]1942; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]1943; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]1944; RV64I-NEXT: addi sp, sp, 16
1945; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]1946;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1947; RV64IA-WMO-LABEL: cmpxchg_i16_monotonic_monotonic:
1948; RV64IA-WMO: # %bb.0:
1949; RV64IA-WMO-NEXT: andi a3, a0, -4
1950; RV64IA-WMO-NEXT: slli a0, a0, 3
1951; RV64IA-WMO-NEXT: lui a4, 16
1952; RV64IA-WMO-NEXT: addi a4, a4, -1
1953; RV64IA-WMO-NEXT: sllw a5, a4, a0
1954; RV64IA-WMO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1955; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1956; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1957; RV64IA-WMO-NEXT: sllw a0, a2, a0
1958; RV64IA-WMO-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
1959; RV64IA-WMO-NEXT: lr.w a2, (a3)
1960; RV64IA-WMO-NEXT: and a4, a2, a5
1961; RV64IA-WMO-NEXT: bne a4, a1, .LBB10_3
1962; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB10_1 Depth=1
1963; RV64IA-WMO-NEXT: xor a4, a2, a0
1964; RV64IA-WMO-NEXT: and a4, a4, a5
1965; RV64IA-WMO-NEXT: xor a4, a2, a4
1966; RV64IA-WMO-NEXT: sc.w a4, a4, (a3)
1967; RV64IA-WMO-NEXT: bnez a4, .LBB10_1
1968; RV64IA-WMO-NEXT: .LBB10_3:
1969; RV64IA-WMO-NEXT: ret
1970;
1971; RV64IA-ZACAS-LABEL: cmpxchg_i16_monotonic_monotonic:
1972; RV64IA-ZACAS: # %bb.0:
1973; RV64IA-ZACAS-NEXT: andi a3, a0, -4
1974; RV64IA-ZACAS-NEXT: slli a0, a0, 3
1975; RV64IA-ZACAS-NEXT: lui a4, 16
1976; RV64IA-ZACAS-NEXT: addi a4, a4, -1
1977; RV64IA-ZACAS-NEXT: sllw a5, a4, a0
1978; RV64IA-ZACAS-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1979; RV64IA-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]1980; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]1981; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
1982; RV64IA-ZACAS-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
1983; RV64IA-ZACAS-NEXT: lr.w a2, (a3)
1984; RV64IA-ZACAS-NEXT: and a4, a2, a5
1985; RV64IA-ZACAS-NEXT: bne a4, a1, .LBB10_3
1986; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB10_1 Depth=1
1987; RV64IA-ZACAS-NEXT: xor a4, a2, a0
1988; RV64IA-ZACAS-NEXT: and a4, a4, a5
1989; RV64IA-ZACAS-NEXT: xor a4, a2, a4
1990; RV64IA-ZACAS-NEXT: sc.w a4, a4, (a3)
1991; RV64IA-ZACAS-NEXT: bnez a4, .LBB10_1
1992; RV64IA-ZACAS-NEXT: .LBB10_3:
1993; RV64IA-ZACAS-NEXT: ret
1994;
1995; RV64IA-ZABHA-LABEL: cmpxchg_i16_monotonic_monotonic:
1996; RV64IA-ZABHA: # %bb.0:
1997; RV64IA-ZABHA-NEXT: amocas.h a1, a2, (a0)
1998; RV64IA-ZABHA-NEXT: ret
1999;
2000; RV64IA-TSO-LABEL: cmpxchg_i16_monotonic_monotonic:
2001; RV64IA-TSO: # %bb.0:
2002; RV64IA-TSO-NEXT: andi a3, a0, -4
2003; RV64IA-TSO-NEXT: slli a0, a0, 3
2004; RV64IA-TSO-NEXT: lui a4, 16
2005; RV64IA-TSO-NEXT: addi a4, a4, -1
2006; RV64IA-TSO-NEXT: sllw a5, a4, a0
2007; RV64IA-TSO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2008; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2009; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2010; RV64IA-TSO-NEXT: sllw a0, a2, a0
2011; RV64IA-TSO-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
2012; RV64IA-TSO-NEXT: lr.w a2, (a3)
2013; RV64IA-TSO-NEXT: and a4, a2, a5
2014; RV64IA-TSO-NEXT: bne a4, a1, .LBB10_3
2015; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB10_1 Depth=1
2016; RV64IA-TSO-NEXT: xor a4, a2, a0
2017; RV64IA-TSO-NEXT: and a4, a4, a5
2018; RV64IA-TSO-NEXT: xor a4, a2, a4
2019; RV64IA-TSO-NEXT: sc.w a4, a4, (a3)
2020; RV64IA-TSO-NEXT: bnez a4, .LBB10_1
2021; RV64IA-TSO-NEXT: .LBB10_3:
2022; RV64IA-TSO-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2023 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val monotonic monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2024 ret void
2025}
2026
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2027define void @cmpxchg_i16_acquire_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2028; RV32I-LABEL: cmpxchg_i16_acquire_monotonic:
2029; RV32I: # %bb.0:
2030; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2031; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2032; RV32I-NEXT: sh a1, 10(sp)
2033; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2034; RV32I-NEXT: li a3, 2
2035; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2036; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2037; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2038; RV32I-NEXT: addi sp, sp, 16
2039; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]2040;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2041; RV32IA-WMO-LABEL: cmpxchg_i16_acquire_monotonic:
2042; RV32IA-WMO: # %bb.0:
2043; RV32IA-WMO-NEXT: andi a3, a0, -4
2044; RV32IA-WMO-NEXT: slli a0, a0, 3
2045; RV32IA-WMO-NEXT: lui a4, 16
2046; RV32IA-WMO-NEXT: addi a4, a4, -1
2047; RV32IA-WMO-NEXT: sll a5, a4, a0
2048; RV32IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2049; RV32IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2050; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2051; RV32IA-WMO-NEXT: sll a0, a2, a0
2052; RV32IA-WMO-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2053; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
2054; RV32IA-WMO-NEXT: and a4, a2, a5
2055; RV32IA-WMO-NEXT: bne a4, a1, .LBB11_3
2056; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2057; RV32IA-WMO-NEXT: xor a4, a2, a0
2058; RV32IA-WMO-NEXT: and a4, a4, a5
2059; RV32IA-WMO-NEXT: xor a4, a2, a4
2060; RV32IA-WMO-NEXT: sc.w a4, a4, (a3)
2061; RV32IA-WMO-NEXT: bnez a4, .LBB11_1
2062; RV32IA-WMO-NEXT: .LBB11_3:
2063; RV32IA-WMO-NEXT: ret
2064;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2065; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i16_acquire_monotonic:
2066; RV32IA-WMO-ZACAS: # %bb.0:
2067; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2068; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2069; RV32IA-WMO-ZACAS-NEXT: lui a4, 16
2070; RV32IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2071; RV32IA-WMO-ZACAS-NEXT: sll a5, a4, a0
2072; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2073; RV32IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2074; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2075; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
2076; RV32IA-WMO-ZACAS-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2077; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
2078; RV32IA-WMO-ZACAS-NEXT: and a4, a2, a5
2079; RV32IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB11_3
2080; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2081; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2082; RV32IA-WMO-ZACAS-NEXT: and a4, a4, a5
2083; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2084; RV32IA-WMO-ZACAS-NEXT: sc.w a4, a4, (a3)
2085; RV32IA-WMO-ZACAS-NEXT: bnez a4, .LBB11_1
2086; RV32IA-WMO-ZACAS-NEXT: .LBB11_3:
2087; RV32IA-WMO-ZACAS-NEXT: ret
2088;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2089; RV32IA-TSO-LABEL: cmpxchg_i16_acquire_monotonic:
2090; RV32IA-TSO: # %bb.0:
2091; RV32IA-TSO-NEXT: andi a3, a0, -4
2092; RV32IA-TSO-NEXT: slli a0, a0, 3
2093; RV32IA-TSO-NEXT: lui a4, 16
2094; RV32IA-TSO-NEXT: addi a4, a4, -1
2095; RV32IA-TSO-NEXT: sll a5, a4, a0
2096; RV32IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2097; RV32IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2098; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2099; RV32IA-TSO-NEXT: sll a0, a2, a0
2100; RV32IA-TSO-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2101; RV32IA-TSO-NEXT: lr.w a2, (a3)
2102; RV32IA-TSO-NEXT: and a4, a2, a5
2103; RV32IA-TSO-NEXT: bne a4, a1, .LBB11_3
2104; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2105; RV32IA-TSO-NEXT: xor a4, a2, a0
2106; RV32IA-TSO-NEXT: and a4, a4, a5
2107; RV32IA-TSO-NEXT: xor a4, a2, a4
2108; RV32IA-TSO-NEXT: sc.w a4, a4, (a3)
2109; RV32IA-TSO-NEXT: bnez a4, .LBB11_1
2110; RV32IA-TSO-NEXT: .LBB11_3:
2111; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2112;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2113; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i16_acquire_monotonic:
2114; RV32IA-TSO-ZACAS: # %bb.0:
2115; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2116; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2117; RV32IA-TSO-ZACAS-NEXT: lui a4, 16
2118; RV32IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2119; RV32IA-TSO-ZACAS-NEXT: sll a5, a4, a0
2120; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2121; RV32IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2122; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2123; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
2124; RV32IA-TSO-ZACAS-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2125; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2126; RV32IA-TSO-ZACAS-NEXT: and a4, a2, a5
2127; RV32IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB11_3
2128; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2129; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2130; RV32IA-TSO-ZACAS-NEXT: and a4, a4, a5
2131; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2132; RV32IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2133; RV32IA-TSO-ZACAS-NEXT: bnez a4, .LBB11_1
2134; RV32IA-TSO-ZACAS-NEXT: .LBB11_3:
2135; RV32IA-TSO-ZACAS-NEXT: ret
2136;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2137; RV64I-LABEL: cmpxchg_i16_acquire_monotonic:
2138; RV64I: # %bb.0:
2139; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2140; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2141; RV64I-NEXT: sh a1, 6(sp)
2142; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2143; RV64I-NEXT: li a3, 2
2144; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2145; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2146; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2147; RV64I-NEXT: addi sp, sp, 16
2148; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]2149;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2150; RV64IA-WMO-LABEL: cmpxchg_i16_acquire_monotonic:
2151; RV64IA-WMO: # %bb.0:
2152; RV64IA-WMO-NEXT: andi a3, a0, -4
2153; RV64IA-WMO-NEXT: slli a0, a0, 3
2154; RV64IA-WMO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2155; RV64IA-WMO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2156; RV64IA-WMO-NEXT: sllw a5, a4, a0
2157; RV64IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2158; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2159; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2160; RV64IA-WMO-NEXT: sllw a0, a2, a0
2161; RV64IA-WMO-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2162; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
2163; RV64IA-WMO-NEXT: and a4, a2, a5
2164; RV64IA-WMO-NEXT: bne a4, a1, .LBB11_3
2165; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2166; RV64IA-WMO-NEXT: xor a4, a2, a0
2167; RV64IA-WMO-NEXT: and a4, a4, a5
2168; RV64IA-WMO-NEXT: xor a4, a2, a4
2169; RV64IA-WMO-NEXT: sc.w a4, a4, (a3)
2170; RV64IA-WMO-NEXT: bnez a4, .LBB11_1
2171; RV64IA-WMO-NEXT: .LBB11_3:
2172; RV64IA-WMO-NEXT: ret
2173;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2174; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i16_acquire_monotonic:
2175; RV64IA-WMO-ZACAS: # %bb.0:
2176; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2177; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2178; RV64IA-WMO-ZACAS-NEXT: lui a4, 16
2179; RV64IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2180; RV64IA-WMO-ZACAS-NEXT: sllw a5, a4, a0
2181; RV64IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2182; RV64IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2183; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2184; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
2185; RV64IA-WMO-ZACAS-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2186; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
2187; RV64IA-WMO-ZACAS-NEXT: and a4, a2, a5
2188; RV64IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB11_3
2189; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2190; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2191; RV64IA-WMO-ZACAS-NEXT: and a4, a4, a5
2192; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2193; RV64IA-WMO-ZACAS-NEXT: sc.w a4, a4, (a3)
2194; RV64IA-WMO-ZACAS-NEXT: bnez a4, .LBB11_1
2195; RV64IA-WMO-ZACAS-NEXT: .LBB11_3:
2196; RV64IA-WMO-ZACAS-NEXT: ret
2197;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2198; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acquire_monotonic:
2199; RV64IA-WMO-ZABHA: # %bb.0:
2200; RV64IA-WMO-ZABHA-NEXT: amocas.h.aq a1, a2, (a0)
2201; RV64IA-WMO-ZABHA-NEXT: ret
2202;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2203; RV64IA-TSO-LABEL: cmpxchg_i16_acquire_monotonic:
2204; RV64IA-TSO: # %bb.0:
2205; RV64IA-TSO-NEXT: andi a3, a0, -4
2206; RV64IA-TSO-NEXT: slli a0, a0, 3
2207; RV64IA-TSO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2208; RV64IA-TSO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2209; RV64IA-TSO-NEXT: sllw a5, a4, a0
2210; RV64IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2211; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2212; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2213; RV64IA-TSO-NEXT: sllw a0, a2, a0
2214; RV64IA-TSO-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2215; RV64IA-TSO-NEXT: lr.w a2, (a3)
2216; RV64IA-TSO-NEXT: and a4, a2, a5
2217; RV64IA-TSO-NEXT: bne a4, a1, .LBB11_3
2218; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2219; RV64IA-TSO-NEXT: xor a4, a2, a0
2220; RV64IA-TSO-NEXT: and a4, a4, a5
2221; RV64IA-TSO-NEXT: xor a4, a2, a4
2222; RV64IA-TSO-NEXT: sc.w a4, a4, (a3)
2223; RV64IA-TSO-NEXT: bnez a4, .LBB11_1
2224; RV64IA-TSO-NEXT: .LBB11_3:
2225; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2226;
2227; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i16_acquire_monotonic:
2228; RV64IA-TSO-ZACAS: # %bb.0:
2229; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2230; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2231; RV64IA-TSO-ZACAS-NEXT: lui a4, 16
2232; RV64IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2233; RV64IA-TSO-ZACAS-NEXT: sllw a5, a4, a0
2234; RV64IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2235; RV64IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2236; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2237; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
2238; RV64IA-TSO-ZACAS-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
2239; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2240; RV64IA-TSO-ZACAS-NEXT: and a4, a2, a5
2241; RV64IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB11_3
2242; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB11_1 Depth=1
2243; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2244; RV64IA-TSO-ZACAS-NEXT: and a4, a4, a5
2245; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2246; RV64IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2247; RV64IA-TSO-ZACAS-NEXT: bnez a4, .LBB11_1
2248; RV64IA-TSO-ZACAS-NEXT: .LBB11_3:
2249; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2250;
2251; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acquire_monotonic:
2252; RV64IA-TSO-ZABHA: # %bb.0:
2253; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
2254; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2255 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acquire monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2256 ret void
2257}
2258
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2259define void @cmpxchg_i16_acquire_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2260; RV32I-LABEL: cmpxchg_i16_acquire_acquire:
2261; RV32I: # %bb.0:
2262; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2263; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2264; RV32I-NEXT: sh a1, 10(sp)
2265; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2266; RV32I-NEXT: li a3, 2
2267; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2268; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2269; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2270; RV32I-NEXT: addi sp, sp, 16
2271; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]2272;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2273; RV32IA-WMO-LABEL: cmpxchg_i16_acquire_acquire:
2274; RV32IA-WMO: # %bb.0:
2275; RV32IA-WMO-NEXT: andi a3, a0, -4
2276; RV32IA-WMO-NEXT: slli a0, a0, 3
2277; RV32IA-WMO-NEXT: lui a4, 16
2278; RV32IA-WMO-NEXT: addi a4, a4, -1
2279; RV32IA-WMO-NEXT: sll a5, a4, a0
2280; RV32IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2281; RV32IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2282; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2283; RV32IA-WMO-NEXT: sll a0, a2, a0
2284; RV32IA-WMO-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2285; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
2286; RV32IA-WMO-NEXT: and a4, a2, a5
2287; RV32IA-WMO-NEXT: bne a4, a1, .LBB12_3
2288; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2289; RV32IA-WMO-NEXT: xor a4, a2, a0
2290; RV32IA-WMO-NEXT: and a4, a4, a5
2291; RV32IA-WMO-NEXT: xor a4, a2, a4
2292; RV32IA-WMO-NEXT: sc.w a4, a4, (a3)
2293; RV32IA-WMO-NEXT: bnez a4, .LBB12_1
2294; RV32IA-WMO-NEXT: .LBB12_3:
2295; RV32IA-WMO-NEXT: ret
2296;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2297; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i16_acquire_acquire:
2298; RV32IA-WMO-ZACAS: # %bb.0:
2299; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2300; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2301; RV32IA-WMO-ZACAS-NEXT: lui a4, 16
2302; RV32IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2303; RV32IA-WMO-ZACAS-NEXT: sll a5, a4, a0
2304; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2305; RV32IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2306; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2307; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
2308; RV32IA-WMO-ZACAS-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2309; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
2310; RV32IA-WMO-ZACAS-NEXT: and a4, a2, a5
2311; RV32IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB12_3
2312; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2313; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2314; RV32IA-WMO-ZACAS-NEXT: and a4, a4, a5
2315; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2316; RV32IA-WMO-ZACAS-NEXT: sc.w a4, a4, (a3)
2317; RV32IA-WMO-ZACAS-NEXT: bnez a4, .LBB12_1
2318; RV32IA-WMO-ZACAS-NEXT: .LBB12_3:
2319; RV32IA-WMO-ZACAS-NEXT: ret
2320;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2321; RV32IA-TSO-LABEL: cmpxchg_i16_acquire_acquire:
2322; RV32IA-TSO: # %bb.0:
2323; RV32IA-TSO-NEXT: andi a3, a0, -4
2324; RV32IA-TSO-NEXT: slli a0, a0, 3
2325; RV32IA-TSO-NEXT: lui a4, 16
2326; RV32IA-TSO-NEXT: addi a4, a4, -1
2327; RV32IA-TSO-NEXT: sll a5, a4, a0
2328; RV32IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2329; RV32IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2330; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2331; RV32IA-TSO-NEXT: sll a0, a2, a0
2332; RV32IA-TSO-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2333; RV32IA-TSO-NEXT: lr.w a2, (a3)
2334; RV32IA-TSO-NEXT: and a4, a2, a5
2335; RV32IA-TSO-NEXT: bne a4, a1, .LBB12_3
2336; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2337; RV32IA-TSO-NEXT: xor a4, a2, a0
2338; RV32IA-TSO-NEXT: and a4, a4, a5
2339; RV32IA-TSO-NEXT: xor a4, a2, a4
2340; RV32IA-TSO-NEXT: sc.w a4, a4, (a3)
2341; RV32IA-TSO-NEXT: bnez a4, .LBB12_1
2342; RV32IA-TSO-NEXT: .LBB12_3:
2343; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2344;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2345; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i16_acquire_acquire:
2346; RV32IA-TSO-ZACAS: # %bb.0:
2347; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2348; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2349; RV32IA-TSO-ZACAS-NEXT: lui a4, 16
2350; RV32IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2351; RV32IA-TSO-ZACAS-NEXT: sll a5, a4, a0
2352; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2353; RV32IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2354; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2355; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
2356; RV32IA-TSO-ZACAS-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2357; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2358; RV32IA-TSO-ZACAS-NEXT: and a4, a2, a5
2359; RV32IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB12_3
2360; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2361; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2362; RV32IA-TSO-ZACAS-NEXT: and a4, a4, a5
2363; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2364; RV32IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2365; RV32IA-TSO-ZACAS-NEXT: bnez a4, .LBB12_1
2366; RV32IA-TSO-ZACAS-NEXT: .LBB12_3:
2367; RV32IA-TSO-ZACAS-NEXT: ret
2368;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2369; RV64I-LABEL: cmpxchg_i16_acquire_acquire:
2370; RV64I: # %bb.0:
2371; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2372; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2373; RV64I-NEXT: sh a1, 6(sp)
2374; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2375; RV64I-NEXT: li a3, 2
2376; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2377; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2378; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2379; RV64I-NEXT: addi sp, sp, 16
2380; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]2381;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2382; RV64IA-WMO-LABEL: cmpxchg_i16_acquire_acquire:
2383; RV64IA-WMO: # %bb.0:
2384; RV64IA-WMO-NEXT: andi a3, a0, -4
2385; RV64IA-WMO-NEXT: slli a0, a0, 3
2386; RV64IA-WMO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2387; RV64IA-WMO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2388; RV64IA-WMO-NEXT: sllw a5, a4, a0
2389; RV64IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2390; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2391; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2392; RV64IA-WMO-NEXT: sllw a0, a2, a0
2393; RV64IA-WMO-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2394; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
2395; RV64IA-WMO-NEXT: and a4, a2, a5
2396; RV64IA-WMO-NEXT: bne a4, a1, .LBB12_3
2397; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2398; RV64IA-WMO-NEXT: xor a4, a2, a0
2399; RV64IA-WMO-NEXT: and a4, a4, a5
2400; RV64IA-WMO-NEXT: xor a4, a2, a4
2401; RV64IA-WMO-NEXT: sc.w a4, a4, (a3)
2402; RV64IA-WMO-NEXT: bnez a4, .LBB12_1
2403; RV64IA-WMO-NEXT: .LBB12_3:
2404; RV64IA-WMO-NEXT: ret
2405;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2406; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i16_acquire_acquire:
2407; RV64IA-WMO-ZACAS: # %bb.0:
2408; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2409; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2410; RV64IA-WMO-ZACAS-NEXT: lui a4, 16
2411; RV64IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2412; RV64IA-WMO-ZACAS-NEXT: sllw a5, a4, a0
2413; RV64IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2414; RV64IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2415; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2416; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
2417; RV64IA-WMO-ZACAS-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2418; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
2419; RV64IA-WMO-ZACAS-NEXT: and a4, a2, a5
2420; RV64IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB12_3
2421; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2422; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2423; RV64IA-WMO-ZACAS-NEXT: and a4, a4, a5
2424; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2425; RV64IA-WMO-ZACAS-NEXT: sc.w a4, a4, (a3)
2426; RV64IA-WMO-ZACAS-NEXT: bnez a4, .LBB12_1
2427; RV64IA-WMO-ZACAS-NEXT: .LBB12_3:
2428; RV64IA-WMO-ZACAS-NEXT: ret
2429;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2430; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acquire_acquire:
2431; RV64IA-WMO-ZABHA: # %bb.0:
2432; RV64IA-WMO-ZABHA-NEXT: amocas.h.aq a1, a2, (a0)
2433; RV64IA-WMO-ZABHA-NEXT: ret
2434;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2435; RV64IA-TSO-LABEL: cmpxchg_i16_acquire_acquire:
2436; RV64IA-TSO: # %bb.0:
2437; RV64IA-TSO-NEXT: andi a3, a0, -4
2438; RV64IA-TSO-NEXT: slli a0, a0, 3
2439; RV64IA-TSO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2440; RV64IA-TSO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2441; RV64IA-TSO-NEXT: sllw a5, a4, a0
2442; RV64IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2443; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2444; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2445; RV64IA-TSO-NEXT: sllw a0, a2, a0
2446; RV64IA-TSO-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2447; RV64IA-TSO-NEXT: lr.w a2, (a3)
2448; RV64IA-TSO-NEXT: and a4, a2, a5
2449; RV64IA-TSO-NEXT: bne a4, a1, .LBB12_3
2450; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2451; RV64IA-TSO-NEXT: xor a4, a2, a0
2452; RV64IA-TSO-NEXT: and a4, a4, a5
2453; RV64IA-TSO-NEXT: xor a4, a2, a4
2454; RV64IA-TSO-NEXT: sc.w a4, a4, (a3)
2455; RV64IA-TSO-NEXT: bnez a4, .LBB12_1
2456; RV64IA-TSO-NEXT: .LBB12_3:
2457; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2458;
2459; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i16_acquire_acquire:
2460; RV64IA-TSO-ZACAS: # %bb.0:
2461; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2462; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2463; RV64IA-TSO-ZACAS-NEXT: lui a4, 16
2464; RV64IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2465; RV64IA-TSO-ZACAS-NEXT: sllw a5, a4, a0
2466; RV64IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2467; RV64IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2468; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2469; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
2470; RV64IA-TSO-ZACAS-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
2471; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2472; RV64IA-TSO-ZACAS-NEXT: and a4, a2, a5
2473; RV64IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB12_3
2474; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
2475; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2476; RV64IA-TSO-ZACAS-NEXT: and a4, a4, a5
2477; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2478; RV64IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2479; RV64IA-TSO-ZACAS-NEXT: bnez a4, .LBB12_1
2480; RV64IA-TSO-ZACAS-NEXT: .LBB12_3:
2481; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2482;
2483; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acquire_acquire:
2484; RV64IA-TSO-ZABHA: # %bb.0:
2485; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
2486; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2487 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acquire acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2488 ret void
2489}
2490
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2491define void @cmpxchg_i16_release_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2492; RV32I-LABEL: cmpxchg_i16_release_monotonic:
2493; RV32I: # %bb.0:
2494; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2495; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2496; RV32I-NEXT: sh a1, 10(sp)
2497; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2498; RV32I-NEXT: li a3, 3
2499; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2500; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2501; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2502; RV32I-NEXT: addi sp, sp, 16
2503; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]2504;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2505; RV32IA-WMO-LABEL: cmpxchg_i16_release_monotonic:
2506; RV32IA-WMO: # %bb.0:
2507; RV32IA-WMO-NEXT: andi a3, a0, -4
2508; RV32IA-WMO-NEXT: slli a0, a0, 3
2509; RV32IA-WMO-NEXT: lui a4, 16
2510; RV32IA-WMO-NEXT: addi a4, a4, -1
2511; RV32IA-WMO-NEXT: sll a5, a4, a0
2512; RV32IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2513; RV32IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2514; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2515; RV32IA-WMO-NEXT: sll a0, a2, a0
2516; RV32IA-WMO-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2517; RV32IA-WMO-NEXT: lr.w a2, (a3)
2518; RV32IA-WMO-NEXT: and a4, a2, a5
2519; RV32IA-WMO-NEXT: bne a4, a1, .LBB13_3
2520; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2521; RV32IA-WMO-NEXT: xor a4, a2, a0
2522; RV32IA-WMO-NEXT: and a4, a4, a5
2523; RV32IA-WMO-NEXT: xor a4, a2, a4
2524; RV32IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
2525; RV32IA-WMO-NEXT: bnez a4, .LBB13_1
2526; RV32IA-WMO-NEXT: .LBB13_3:
2527; RV32IA-WMO-NEXT: ret
2528;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2529; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i16_release_monotonic:
2530; RV32IA-WMO-ZACAS: # %bb.0:
2531; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2532; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2533; RV32IA-WMO-ZACAS-NEXT: lui a4, 16
2534; RV32IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2535; RV32IA-WMO-ZACAS-NEXT: sll a5, a4, a0
2536; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2537; RV32IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2538; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2539; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
2540; RV32IA-WMO-ZACAS-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2541; RV32IA-WMO-ZACAS-NEXT: lr.w a2, (a3)
2542; RV32IA-WMO-ZACAS-NEXT: and a4, a2, a5
2543; RV32IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB13_3
2544; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2545; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2546; RV32IA-WMO-ZACAS-NEXT: and a4, a4, a5
2547; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2548; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
2549; RV32IA-WMO-ZACAS-NEXT: bnez a4, .LBB13_1
2550; RV32IA-WMO-ZACAS-NEXT: .LBB13_3:
2551; RV32IA-WMO-ZACAS-NEXT: ret
2552;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2553; RV32IA-TSO-LABEL: cmpxchg_i16_release_monotonic:
2554; RV32IA-TSO: # %bb.0:
2555; RV32IA-TSO-NEXT: andi a3, a0, -4
2556; RV32IA-TSO-NEXT: slli a0, a0, 3
2557; RV32IA-TSO-NEXT: lui a4, 16
2558; RV32IA-TSO-NEXT: addi a4, a4, -1
2559; RV32IA-TSO-NEXT: sll a5, a4, a0
2560; RV32IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2561; RV32IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2562; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2563; RV32IA-TSO-NEXT: sll a0, a2, a0
2564; RV32IA-TSO-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2565; RV32IA-TSO-NEXT: lr.w a2, (a3)
2566; RV32IA-TSO-NEXT: and a4, a2, a5
2567; RV32IA-TSO-NEXT: bne a4, a1, .LBB13_3
2568; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2569; RV32IA-TSO-NEXT: xor a4, a2, a0
2570; RV32IA-TSO-NEXT: and a4, a4, a5
2571; RV32IA-TSO-NEXT: xor a4, a2, a4
2572; RV32IA-TSO-NEXT: sc.w a4, a4, (a3)
2573; RV32IA-TSO-NEXT: bnez a4, .LBB13_1
2574; RV32IA-TSO-NEXT: .LBB13_3:
2575; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2576;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2577; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i16_release_monotonic:
2578; RV32IA-TSO-ZACAS: # %bb.0:
2579; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2580; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2581; RV32IA-TSO-ZACAS-NEXT: lui a4, 16
2582; RV32IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2583; RV32IA-TSO-ZACAS-NEXT: sll a5, a4, a0
2584; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2585; RV32IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2586; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2587; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
2588; RV32IA-TSO-ZACAS-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2589; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2590; RV32IA-TSO-ZACAS-NEXT: and a4, a2, a5
2591; RV32IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB13_3
2592; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2593; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2594; RV32IA-TSO-ZACAS-NEXT: and a4, a4, a5
2595; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2596; RV32IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2597; RV32IA-TSO-ZACAS-NEXT: bnez a4, .LBB13_1
2598; RV32IA-TSO-ZACAS-NEXT: .LBB13_3:
2599; RV32IA-TSO-ZACAS-NEXT: ret
2600;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2601; RV64I-LABEL: cmpxchg_i16_release_monotonic:
2602; RV64I: # %bb.0:
2603; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2604; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2605; RV64I-NEXT: sh a1, 6(sp)
2606; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2607; RV64I-NEXT: li a3, 3
2608; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2609; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2610; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2611; RV64I-NEXT: addi sp, sp, 16
2612; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]2613;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2614; RV64IA-WMO-LABEL: cmpxchg_i16_release_monotonic:
2615; RV64IA-WMO: # %bb.0:
2616; RV64IA-WMO-NEXT: andi a3, a0, -4
2617; RV64IA-WMO-NEXT: slli a0, a0, 3
2618; RV64IA-WMO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2619; RV64IA-WMO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2620; RV64IA-WMO-NEXT: sllw a5, a4, a0
2621; RV64IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2622; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2623; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2624; RV64IA-WMO-NEXT: sllw a0, a2, a0
2625; RV64IA-WMO-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2626; RV64IA-WMO-NEXT: lr.w a2, (a3)
2627; RV64IA-WMO-NEXT: and a4, a2, a5
2628; RV64IA-WMO-NEXT: bne a4, a1, .LBB13_3
2629; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2630; RV64IA-WMO-NEXT: xor a4, a2, a0
2631; RV64IA-WMO-NEXT: and a4, a4, a5
2632; RV64IA-WMO-NEXT: xor a4, a2, a4
2633; RV64IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
2634; RV64IA-WMO-NEXT: bnez a4, .LBB13_1
2635; RV64IA-WMO-NEXT: .LBB13_3:
2636; RV64IA-WMO-NEXT: ret
2637;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2638; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i16_release_monotonic:
2639; RV64IA-WMO-ZACAS: # %bb.0:
2640; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2641; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2642; RV64IA-WMO-ZACAS-NEXT: lui a4, 16
2643; RV64IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2644; RV64IA-WMO-ZACAS-NEXT: sllw a5, a4, a0
2645; RV64IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2646; RV64IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2647; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2648; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
2649; RV64IA-WMO-ZACAS-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2650; RV64IA-WMO-ZACAS-NEXT: lr.w a2, (a3)
2651; RV64IA-WMO-ZACAS-NEXT: and a4, a2, a5
2652; RV64IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB13_3
2653; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2654; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2655; RV64IA-WMO-ZACAS-NEXT: and a4, a4, a5
2656; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2657; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
2658; RV64IA-WMO-ZACAS-NEXT: bnez a4, .LBB13_1
2659; RV64IA-WMO-ZACAS-NEXT: .LBB13_3:
2660; RV64IA-WMO-ZACAS-NEXT: ret
2661;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2662; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_release_monotonic:
2663; RV64IA-WMO-ZABHA: # %bb.0:
2664; RV64IA-WMO-ZABHA-NEXT: amocas.h.rl a1, a2, (a0)
2665; RV64IA-WMO-ZABHA-NEXT: ret
2666;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2667; RV64IA-TSO-LABEL: cmpxchg_i16_release_monotonic:
2668; RV64IA-TSO: # %bb.0:
2669; RV64IA-TSO-NEXT: andi a3, a0, -4
2670; RV64IA-TSO-NEXT: slli a0, a0, 3
2671; RV64IA-TSO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2672; RV64IA-TSO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2673; RV64IA-TSO-NEXT: sllw a5, a4, a0
2674; RV64IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2675; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2676; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2677; RV64IA-TSO-NEXT: sllw a0, a2, a0
2678; RV64IA-TSO-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2679; RV64IA-TSO-NEXT: lr.w a2, (a3)
2680; RV64IA-TSO-NEXT: and a4, a2, a5
2681; RV64IA-TSO-NEXT: bne a4, a1, .LBB13_3
2682; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2683; RV64IA-TSO-NEXT: xor a4, a2, a0
2684; RV64IA-TSO-NEXT: and a4, a4, a5
2685; RV64IA-TSO-NEXT: xor a4, a2, a4
2686; RV64IA-TSO-NEXT: sc.w a4, a4, (a3)
2687; RV64IA-TSO-NEXT: bnez a4, .LBB13_1
2688; RV64IA-TSO-NEXT: .LBB13_3:
2689; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2690;
2691; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i16_release_monotonic:
2692; RV64IA-TSO-ZACAS: # %bb.0:
2693; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2694; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2695; RV64IA-TSO-ZACAS-NEXT: lui a4, 16
2696; RV64IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2697; RV64IA-TSO-ZACAS-NEXT: sllw a5, a4, a0
2698; RV64IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2699; RV64IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2700; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2701; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
2702; RV64IA-TSO-ZACAS-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
2703; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2704; RV64IA-TSO-ZACAS-NEXT: and a4, a2, a5
2705; RV64IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB13_3
2706; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
2707; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2708; RV64IA-TSO-ZACAS-NEXT: and a4, a4, a5
2709; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2710; RV64IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2711; RV64IA-TSO-ZACAS-NEXT: bnez a4, .LBB13_1
2712; RV64IA-TSO-ZACAS-NEXT: .LBB13_3:
2713; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2714;
2715; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_release_monotonic:
2716; RV64IA-TSO-ZABHA: # %bb.0:
2717; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
2718; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2719 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val release monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2720 ret void
2721}
2722
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2723define void @cmpxchg_i16_release_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2724; RV32I-LABEL: cmpxchg_i16_release_acquire:
2725; RV32I: # %bb.0:
2726; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2727; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2728; RV32I-NEXT: sh a1, 10(sp)
2729; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2730; RV32I-NEXT: li a3, 3
2731; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2732; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2733; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2734; RV32I-NEXT: addi sp, sp, 16
2735; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]2736;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2737; RV32IA-WMO-LABEL: cmpxchg_i16_release_acquire:
2738; RV32IA-WMO: # %bb.0:
2739; RV32IA-WMO-NEXT: andi a3, a0, -4
2740; RV32IA-WMO-NEXT: slli a0, a0, 3
2741; RV32IA-WMO-NEXT: lui a4, 16
2742; RV32IA-WMO-NEXT: addi a4, a4, -1
2743; RV32IA-WMO-NEXT: sll a5, a4, a0
2744; RV32IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2745; RV32IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2746; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2747; RV32IA-WMO-NEXT: sll a0, a2, a0
2748; RV32IA-WMO-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2749; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
2750; RV32IA-WMO-NEXT: and a4, a2, a5
2751; RV32IA-WMO-NEXT: bne a4, a1, .LBB14_3
2752; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2753; RV32IA-WMO-NEXT: xor a4, a2, a0
2754; RV32IA-WMO-NEXT: and a4, a4, a5
2755; RV32IA-WMO-NEXT: xor a4, a2, a4
2756; RV32IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
2757; RV32IA-WMO-NEXT: bnez a4, .LBB14_1
2758; RV32IA-WMO-NEXT: .LBB14_3:
2759; RV32IA-WMO-NEXT: ret
2760;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2761; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i16_release_acquire:
2762; RV32IA-WMO-ZACAS: # %bb.0:
2763; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2764; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2765; RV32IA-WMO-ZACAS-NEXT: lui a4, 16
2766; RV32IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2767; RV32IA-WMO-ZACAS-NEXT: sll a5, a4, a0
2768; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2769; RV32IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2770; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2771; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
2772; RV32IA-WMO-ZACAS-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2773; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
2774; RV32IA-WMO-ZACAS-NEXT: and a4, a2, a5
2775; RV32IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB14_3
2776; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2777; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2778; RV32IA-WMO-ZACAS-NEXT: and a4, a4, a5
2779; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2780; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
2781; RV32IA-WMO-ZACAS-NEXT: bnez a4, .LBB14_1
2782; RV32IA-WMO-ZACAS-NEXT: .LBB14_3:
2783; RV32IA-WMO-ZACAS-NEXT: ret
2784;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2785; RV32IA-TSO-LABEL: cmpxchg_i16_release_acquire:
2786; RV32IA-TSO: # %bb.0:
2787; RV32IA-TSO-NEXT: andi a3, a0, -4
2788; RV32IA-TSO-NEXT: slli a0, a0, 3
2789; RV32IA-TSO-NEXT: lui a4, 16
2790; RV32IA-TSO-NEXT: addi a4, a4, -1
2791; RV32IA-TSO-NEXT: sll a5, a4, a0
2792; RV32IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2793; RV32IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2794; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2795; RV32IA-TSO-NEXT: sll a0, a2, a0
2796; RV32IA-TSO-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2797; RV32IA-TSO-NEXT: lr.w a2, (a3)
2798; RV32IA-TSO-NEXT: and a4, a2, a5
2799; RV32IA-TSO-NEXT: bne a4, a1, .LBB14_3
2800; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2801; RV32IA-TSO-NEXT: xor a4, a2, a0
2802; RV32IA-TSO-NEXT: and a4, a4, a5
2803; RV32IA-TSO-NEXT: xor a4, a2, a4
2804; RV32IA-TSO-NEXT: sc.w a4, a4, (a3)
2805; RV32IA-TSO-NEXT: bnez a4, .LBB14_1
2806; RV32IA-TSO-NEXT: .LBB14_3:
2807; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2808;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2809; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i16_release_acquire:
2810; RV32IA-TSO-ZACAS: # %bb.0:
2811; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2812; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2813; RV32IA-TSO-ZACAS-NEXT: lui a4, 16
2814; RV32IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2815; RV32IA-TSO-ZACAS-NEXT: sll a5, a4, a0
2816; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2817; RV32IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2818; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2819; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
2820; RV32IA-TSO-ZACAS-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2821; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2822; RV32IA-TSO-ZACAS-NEXT: and a4, a2, a5
2823; RV32IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB14_3
2824; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2825; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2826; RV32IA-TSO-ZACAS-NEXT: and a4, a4, a5
2827; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2828; RV32IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2829; RV32IA-TSO-ZACAS-NEXT: bnez a4, .LBB14_1
2830; RV32IA-TSO-ZACAS-NEXT: .LBB14_3:
2831; RV32IA-TSO-ZACAS-NEXT: ret
2832;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2833; RV64I-LABEL: cmpxchg_i16_release_acquire:
2834; RV64I: # %bb.0:
2835; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2836; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2837; RV64I-NEXT: sh a1, 6(sp)
2838; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2839; RV64I-NEXT: li a3, 3
2840; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2841; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2842; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]2843; RV64I-NEXT: addi sp, sp, 16
2844; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]2845;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2846; RV64IA-WMO-LABEL: cmpxchg_i16_release_acquire:
2847; RV64IA-WMO: # %bb.0:
2848; RV64IA-WMO-NEXT: andi a3, a0, -4
2849; RV64IA-WMO-NEXT: slli a0, a0, 3
2850; RV64IA-WMO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2851; RV64IA-WMO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2852; RV64IA-WMO-NEXT: sllw a5, a4, a0
2853; RV64IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2854; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2855; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2856; RV64IA-WMO-NEXT: sllw a0, a2, a0
2857; RV64IA-WMO-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2858; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
2859; RV64IA-WMO-NEXT: and a4, a2, a5
2860; RV64IA-WMO-NEXT: bne a4, a1, .LBB14_3
2861; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2862; RV64IA-WMO-NEXT: xor a4, a2, a0
2863; RV64IA-WMO-NEXT: and a4, a4, a5
2864; RV64IA-WMO-NEXT: xor a4, a2, a4
2865; RV64IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
2866; RV64IA-WMO-NEXT: bnez a4, .LBB14_1
2867; RV64IA-WMO-NEXT: .LBB14_3:
2868; RV64IA-WMO-NEXT: ret
2869;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2870; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i16_release_acquire:
2871; RV64IA-WMO-ZACAS: # %bb.0:
2872; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2873; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2874; RV64IA-WMO-ZACAS-NEXT: lui a4, 16
2875; RV64IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2876; RV64IA-WMO-ZACAS-NEXT: sllw a5, a4, a0
2877; RV64IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2878; RV64IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2879; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2880; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
2881; RV64IA-WMO-ZACAS-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2882; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
2883; RV64IA-WMO-ZACAS-NEXT: and a4, a2, a5
2884; RV64IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB14_3
2885; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2886; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a0
2887; RV64IA-WMO-ZACAS-NEXT: and a4, a4, a5
2888; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a4
2889; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
2890; RV64IA-WMO-ZACAS-NEXT: bnez a4, .LBB14_1
2891; RV64IA-WMO-ZACAS-NEXT: .LBB14_3:
2892; RV64IA-WMO-ZACAS-NEXT: ret
2893;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2894; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_release_acquire:
2895; RV64IA-WMO-ZABHA: # %bb.0:
2896; RV64IA-WMO-ZABHA-NEXT: amocas.h.aqrl a1, a2, (a0)
2897; RV64IA-WMO-ZABHA-NEXT: ret
2898;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2899; RV64IA-TSO-LABEL: cmpxchg_i16_release_acquire:
2900; RV64IA-TSO: # %bb.0:
2901; RV64IA-TSO-NEXT: andi a3, a0, -4
2902; RV64IA-TSO-NEXT: slli a0, a0, 3
2903; RV64IA-TSO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]2904; RV64IA-TSO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2905; RV64IA-TSO-NEXT: sllw a5, a4, a0
2906; RV64IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2907; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2908; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2909; RV64IA-TSO-NEXT: sllw a0, a2, a0
2910; RV64IA-TSO-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2911; RV64IA-TSO-NEXT: lr.w a2, (a3)
2912; RV64IA-TSO-NEXT: and a4, a2, a5
2913; RV64IA-TSO-NEXT: bne a4, a1, .LBB14_3
2914; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2915; RV64IA-TSO-NEXT: xor a4, a2, a0
2916; RV64IA-TSO-NEXT: and a4, a4, a5
2917; RV64IA-TSO-NEXT: xor a4, a2, a4
2918; RV64IA-TSO-NEXT: sc.w a4, a4, (a3)
2919; RV64IA-TSO-NEXT: bnez a4, .LBB14_1
2920; RV64IA-TSO-NEXT: .LBB14_3:
2921; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2922;
2923; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i16_release_acquire:
2924; RV64IA-TSO-ZACAS: # %bb.0:
2925; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
2926; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
2927; RV64IA-TSO-ZACAS-NEXT: lui a4, 16
2928; RV64IA-TSO-ZACAS-NEXT: addi a4, a4, -1
2929; RV64IA-TSO-ZACAS-NEXT: sllw a5, a4, a0
2930; RV64IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2931; RV64IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2932; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2933; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
2934; RV64IA-TSO-ZACAS-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
2935; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
2936; RV64IA-TSO-ZACAS-NEXT: and a4, a2, a5
2937; RV64IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB14_3
2938; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB14_1 Depth=1
2939; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a0
2940; RV64IA-TSO-ZACAS-NEXT: and a4, a4, a5
2941; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a4
2942; RV64IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
2943; RV64IA-TSO-ZACAS-NEXT: bnez a4, .LBB14_1
2944; RV64IA-TSO-ZACAS-NEXT: .LBB14_3:
2945; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]2946;
2947; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_release_acquire:
2948; RV64IA-TSO-ZABHA: # %bb.0:
2949; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
2950; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2951 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val release acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2952 ret void
2953}
2954
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]2955define void @cmpxchg_i16_acq_rel_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2956; RV32I-LABEL: cmpxchg_i16_acq_rel_monotonic:
2957; RV32I: # %bb.0:
2958; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2959; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2960; RV32I-NEXT: sh a1, 10(sp)
2961; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]2962; RV32I-NEXT: li a3, 4
2963; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]2964; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]2965; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2966; RV32I-NEXT: addi sp, sp, 16
2967; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]2968;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2969; RV32IA-WMO-LABEL: cmpxchg_i16_acq_rel_monotonic:
2970; RV32IA-WMO: # %bb.0:
2971; RV32IA-WMO-NEXT: andi a3, a0, -4
2972; RV32IA-WMO-NEXT: slli a0, a0, 3
2973; RV32IA-WMO-NEXT: lui a4, 16
2974; RV32IA-WMO-NEXT: addi a4, a4, -1
2975; RV32IA-WMO-NEXT: sll a5, a4, a0
2976; RV32IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2977; RV32IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]2978; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]2979; RV32IA-WMO-NEXT: sll a0, a2, a0
2980; RV32IA-WMO-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
2981; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
2982; RV32IA-WMO-NEXT: and a4, a2, a5
2983; RV32IA-WMO-NEXT: bne a4, a1, .LBB15_3
2984; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
2985; RV32IA-WMO-NEXT: xor a4, a2, a0
2986; RV32IA-WMO-NEXT: and a4, a4, a5
2987; RV32IA-WMO-NEXT: xor a4, a2, a4
2988; RV32IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
2989; RV32IA-WMO-NEXT: bnez a4, .LBB15_1
2990; RV32IA-WMO-NEXT: .LBB15_3:
2991; RV32IA-WMO-NEXT: ret
2992;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]2993; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i16_acq_rel_monotonic:
2994; RV32IA-WMO-ZACAS: # %bb.0:
2995; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
2996; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
2997; RV32IA-WMO-ZACAS-NEXT: lui a4, 16
2998; RV32IA-WMO-ZACAS-NEXT: addi a4, a4, -1
2999; RV32IA-WMO-ZACAS-NEXT: sll a5, a4, a0
3000; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3001; RV32IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3002; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3003; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
3004; RV32IA-WMO-ZACAS-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
3005; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
3006; RV32IA-WMO-ZACAS-NEXT: and a4, a2, a5
3007; RV32IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB15_3
3008; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
3009; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a0
3010; RV32IA-WMO-ZACAS-NEXT: and a4, a4, a5
3011; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a4
3012; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
3013; RV32IA-WMO-ZACAS-NEXT: bnez a4, .LBB15_1
3014; RV32IA-WMO-ZACAS-NEXT: .LBB15_3:
3015; RV32IA-WMO-ZACAS-NEXT: ret
3016;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3017; RV32IA-TSO-LABEL: cmpxchg_i16_acq_rel_monotonic:
3018; RV32IA-TSO: # %bb.0:
3019; RV32IA-TSO-NEXT: andi a3, a0, -4
3020; RV32IA-TSO-NEXT: slli a0, a0, 3
3021; RV32IA-TSO-NEXT: lui a4, 16
3022; RV32IA-TSO-NEXT: addi a4, a4, -1
3023; RV32IA-TSO-NEXT: sll a5, a4, a0
3024; RV32IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3025; RV32IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3026; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3027; RV32IA-TSO-NEXT: sll a0, a2, a0
3028; RV32IA-TSO-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
3029; RV32IA-TSO-NEXT: lr.w a2, (a3)
3030; RV32IA-TSO-NEXT: and a4, a2, a5
3031; RV32IA-TSO-NEXT: bne a4, a1, .LBB15_3
3032; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
3033; RV32IA-TSO-NEXT: xor a4, a2, a0
3034; RV32IA-TSO-NEXT: and a4, a4, a5
3035; RV32IA-TSO-NEXT: xor a4, a2, a4
3036; RV32IA-TSO-NEXT: sc.w a4, a4, (a3)
3037; RV32IA-TSO-NEXT: bnez a4, .LBB15_1
3038; RV32IA-TSO-NEXT: .LBB15_3:
3039; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3040;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3041; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i16_acq_rel_monotonic:
3042; RV32IA-TSO-ZACAS: # %bb.0:
3043; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
3044; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
3045; RV32IA-TSO-ZACAS-NEXT: lui a4, 16
3046; RV32IA-TSO-ZACAS-NEXT: addi a4, a4, -1
3047; RV32IA-TSO-ZACAS-NEXT: sll a5, a4, a0
3048; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3049; RV32IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3050; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3051; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
3052; RV32IA-TSO-ZACAS-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
3053; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
3054; RV32IA-TSO-ZACAS-NEXT: and a4, a2, a5
3055; RV32IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB15_3
3056; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
3057; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a0
3058; RV32IA-TSO-ZACAS-NEXT: and a4, a4, a5
3059; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a4
3060; RV32IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
3061; RV32IA-TSO-ZACAS-NEXT: bnez a4, .LBB15_1
3062; RV32IA-TSO-ZACAS-NEXT: .LBB15_3:
3063; RV32IA-TSO-ZACAS-NEXT: ret
3064;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3065; RV64I-LABEL: cmpxchg_i16_acq_rel_monotonic:
3066; RV64I: # %bb.0:
3067; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3068; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3069; RV64I-NEXT: sh a1, 6(sp)
3070; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3071; RV64I-NEXT: li a3, 4
3072; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3073; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3074; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3075; RV64I-NEXT: addi sp, sp, 16
3076; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]3077;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3078; RV64IA-WMO-LABEL: cmpxchg_i16_acq_rel_monotonic:
3079; RV64IA-WMO: # %bb.0:
3080; RV64IA-WMO-NEXT: andi a3, a0, -4
3081; RV64IA-WMO-NEXT: slli a0, a0, 3
3082; RV64IA-WMO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]3083; RV64IA-WMO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3084; RV64IA-WMO-NEXT: sllw a5, a4, a0
3085; RV64IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3086; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3087; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3088; RV64IA-WMO-NEXT: sllw a0, a2, a0
3089; RV64IA-WMO-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
3090; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
3091; RV64IA-WMO-NEXT: and a4, a2, a5
3092; RV64IA-WMO-NEXT: bne a4, a1, .LBB15_3
3093; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
3094; RV64IA-WMO-NEXT: xor a4, a2, a0
3095; RV64IA-WMO-NEXT: and a4, a4, a5
3096; RV64IA-WMO-NEXT: xor a4, a2, a4
3097; RV64IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
3098; RV64IA-WMO-NEXT: bnez a4, .LBB15_1
3099; RV64IA-WMO-NEXT: .LBB15_3:
3100; RV64IA-WMO-NEXT: ret
3101;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3102; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i16_acq_rel_monotonic:
3103; RV64IA-WMO-ZACAS: # %bb.0:
3104; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
3105; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
3106; RV64IA-WMO-ZACAS-NEXT: lui a4, 16
3107; RV64IA-WMO-ZACAS-NEXT: addi a4, a4, -1
3108; RV64IA-WMO-ZACAS-NEXT: sllw a5, a4, a0
3109; RV64IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3110; RV64IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3111; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3112; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
3113; RV64IA-WMO-ZACAS-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
3114; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
3115; RV64IA-WMO-ZACAS-NEXT: and a4, a2, a5
3116; RV64IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB15_3
3117; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
3118; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a0
3119; RV64IA-WMO-ZACAS-NEXT: and a4, a4, a5
3120; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a4
3121; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
3122; RV64IA-WMO-ZACAS-NEXT: bnez a4, .LBB15_1
3123; RV64IA-WMO-ZACAS-NEXT: .LBB15_3:
3124; RV64IA-WMO-ZACAS-NEXT: ret
3125;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3126; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acq_rel_monotonic:
3127; RV64IA-WMO-ZABHA: # %bb.0:
3128; RV64IA-WMO-ZABHA-NEXT: amocas.h.aqrl a1, a2, (a0)
3129; RV64IA-WMO-ZABHA-NEXT: ret
3130;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3131; RV64IA-TSO-LABEL: cmpxchg_i16_acq_rel_monotonic:
3132; RV64IA-TSO: # %bb.0:
3133; RV64IA-TSO-NEXT: andi a3, a0, -4
3134; RV64IA-TSO-NEXT: slli a0, a0, 3
3135; RV64IA-TSO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]3136; RV64IA-TSO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3137; RV64IA-TSO-NEXT: sllw a5, a4, a0
3138; RV64IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3139; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3140; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3141; RV64IA-TSO-NEXT: sllw a0, a2, a0
3142; RV64IA-TSO-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
3143; RV64IA-TSO-NEXT: lr.w a2, (a3)
3144; RV64IA-TSO-NEXT: and a4, a2, a5
3145; RV64IA-TSO-NEXT: bne a4, a1, .LBB15_3
3146; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
3147; RV64IA-TSO-NEXT: xor a4, a2, a0
3148; RV64IA-TSO-NEXT: and a4, a4, a5
3149; RV64IA-TSO-NEXT: xor a4, a2, a4
3150; RV64IA-TSO-NEXT: sc.w a4, a4, (a3)
3151; RV64IA-TSO-NEXT: bnez a4, .LBB15_1
3152; RV64IA-TSO-NEXT: .LBB15_3:
3153; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3154;
3155; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i16_acq_rel_monotonic:
3156; RV64IA-TSO-ZACAS: # %bb.0:
3157; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
3158; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
3159; RV64IA-TSO-ZACAS-NEXT: lui a4, 16
3160; RV64IA-TSO-ZACAS-NEXT: addi a4, a4, -1
3161; RV64IA-TSO-ZACAS-NEXT: sllw a5, a4, a0
3162; RV64IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3163; RV64IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3164; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3165; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
3166; RV64IA-TSO-ZACAS-NEXT: .LBB15_1: # =>This Inner Loop Header: Depth=1
3167; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
3168; RV64IA-TSO-ZACAS-NEXT: and a4, a2, a5
3169; RV64IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB15_3
3170; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB15_1 Depth=1
3171; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a0
3172; RV64IA-TSO-ZACAS-NEXT: and a4, a4, a5
3173; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a4
3174; RV64IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
3175; RV64IA-TSO-ZACAS-NEXT: bnez a4, .LBB15_1
3176; RV64IA-TSO-ZACAS-NEXT: .LBB15_3:
3177; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3178;
3179; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acq_rel_monotonic:
3180; RV64IA-TSO-ZABHA: # %bb.0:
3181; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
3182; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3183 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acq_rel monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3184 ret void
3185}
3186
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3187define void @cmpxchg_i16_acq_rel_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3188; RV32I-LABEL: cmpxchg_i16_acq_rel_acquire:
3189; RV32I: # %bb.0:
3190; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3191; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3192; RV32I-NEXT: sh a1, 10(sp)
3193; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3194; RV32I-NEXT: li a3, 4
3195; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3196; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3197; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3198; RV32I-NEXT: addi sp, sp, 16
3199; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3200;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3201; RV32IA-WMO-LABEL: cmpxchg_i16_acq_rel_acquire:
3202; RV32IA-WMO: # %bb.0:
3203; RV32IA-WMO-NEXT: andi a3, a0, -4
3204; RV32IA-WMO-NEXT: slli a0, a0, 3
3205; RV32IA-WMO-NEXT: lui a4, 16
3206; RV32IA-WMO-NEXT: addi a4, a4, -1
3207; RV32IA-WMO-NEXT: sll a5, a4, a0
3208; RV32IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3209; RV32IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3210; RV32IA-WMO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3211; RV32IA-WMO-NEXT: sll a0, a2, a0
3212; RV32IA-WMO-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3213; RV32IA-WMO-NEXT: lr.w.aq a2, (a3)
3214; RV32IA-WMO-NEXT: and a4, a2, a5
3215; RV32IA-WMO-NEXT: bne a4, a1, .LBB16_3
3216; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3217; RV32IA-WMO-NEXT: xor a4, a2, a0
3218; RV32IA-WMO-NEXT: and a4, a4, a5
3219; RV32IA-WMO-NEXT: xor a4, a2, a4
3220; RV32IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
3221; RV32IA-WMO-NEXT: bnez a4, .LBB16_1
3222; RV32IA-WMO-NEXT: .LBB16_3:
3223; RV32IA-WMO-NEXT: ret
3224;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3225; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i16_acq_rel_acquire:
3226; RV32IA-WMO-ZACAS: # %bb.0:
3227; RV32IA-WMO-ZACAS-NEXT: andi a3, a0, -4
3228; RV32IA-WMO-ZACAS-NEXT: slli a0, a0, 3
3229; RV32IA-WMO-ZACAS-NEXT: lui a4, 16
3230; RV32IA-WMO-ZACAS-NEXT: addi a4, a4, -1
3231; RV32IA-WMO-ZACAS-NEXT: sll a5, a4, a0
3232; RV32IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3233; RV32IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3234; RV32IA-WMO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3235; RV32IA-WMO-ZACAS-NEXT: sll a0, a2, a0
3236; RV32IA-WMO-ZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3237; RV32IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
3238; RV32IA-WMO-ZACAS-NEXT: and a4, a2, a5
3239; RV32IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB16_3
3240; RV32IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3241; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a0
3242; RV32IA-WMO-ZACAS-NEXT: and a4, a4, a5
3243; RV32IA-WMO-ZACAS-NEXT: xor a4, a2, a4
3244; RV32IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
3245; RV32IA-WMO-ZACAS-NEXT: bnez a4, .LBB16_1
3246; RV32IA-WMO-ZACAS-NEXT: .LBB16_3:
3247; RV32IA-WMO-ZACAS-NEXT: ret
3248;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3249; RV32IA-TSO-LABEL: cmpxchg_i16_acq_rel_acquire:
3250; RV32IA-TSO: # %bb.0:
3251; RV32IA-TSO-NEXT: andi a3, a0, -4
3252; RV32IA-TSO-NEXT: slli a0, a0, 3
3253; RV32IA-TSO-NEXT: lui a4, 16
3254; RV32IA-TSO-NEXT: addi a4, a4, -1
3255; RV32IA-TSO-NEXT: sll a5, a4, a0
3256; RV32IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3257; RV32IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3258; RV32IA-TSO-NEXT: sll a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3259; RV32IA-TSO-NEXT: sll a0, a2, a0
3260; RV32IA-TSO-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3261; RV32IA-TSO-NEXT: lr.w a2, (a3)
3262; RV32IA-TSO-NEXT: and a4, a2, a5
3263; RV32IA-TSO-NEXT: bne a4, a1, .LBB16_3
3264; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3265; RV32IA-TSO-NEXT: xor a4, a2, a0
3266; RV32IA-TSO-NEXT: and a4, a4, a5
3267; RV32IA-TSO-NEXT: xor a4, a2, a4
3268; RV32IA-TSO-NEXT: sc.w a4, a4, (a3)
3269; RV32IA-TSO-NEXT: bnez a4, .LBB16_1
3270; RV32IA-TSO-NEXT: .LBB16_3:
3271; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3272;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3273; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i16_acq_rel_acquire:
3274; RV32IA-TSO-ZACAS: # %bb.0:
3275; RV32IA-TSO-ZACAS-NEXT: andi a3, a0, -4
3276; RV32IA-TSO-ZACAS-NEXT: slli a0, a0, 3
3277; RV32IA-TSO-ZACAS-NEXT: lui a4, 16
3278; RV32IA-TSO-ZACAS-NEXT: addi a4, a4, -1
3279; RV32IA-TSO-ZACAS-NEXT: sll a5, a4, a0
3280; RV32IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3281; RV32IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3282; RV32IA-TSO-ZACAS-NEXT: sll a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3283; RV32IA-TSO-ZACAS-NEXT: sll a0, a2, a0
3284; RV32IA-TSO-ZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3285; RV32IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
3286; RV32IA-TSO-ZACAS-NEXT: and a4, a2, a5
3287; RV32IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB16_3
3288; RV32IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3289; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a0
3290; RV32IA-TSO-ZACAS-NEXT: and a4, a4, a5
3291; RV32IA-TSO-ZACAS-NEXT: xor a4, a2, a4
3292; RV32IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
3293; RV32IA-TSO-ZACAS-NEXT: bnez a4, .LBB16_1
3294; RV32IA-TSO-ZACAS-NEXT: .LBB16_3:
3295; RV32IA-TSO-ZACAS-NEXT: ret
3296;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3297; RV64I-LABEL: cmpxchg_i16_acq_rel_acquire:
3298; RV64I: # %bb.0:
3299; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3300; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3301; RV64I-NEXT: sh a1, 6(sp)
3302; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3303; RV64I-NEXT: li a3, 4
3304; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3305; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3306; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3307; RV64I-NEXT: addi sp, sp, 16
3308; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]3309;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3310; RV64IA-WMO-LABEL: cmpxchg_i16_acq_rel_acquire:
3311; RV64IA-WMO: # %bb.0:
3312; RV64IA-WMO-NEXT: andi a3, a0, -4
3313; RV64IA-WMO-NEXT: slli a0, a0, 3
3314; RV64IA-WMO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]3315; RV64IA-WMO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3316; RV64IA-WMO-NEXT: sllw a5, a4, a0
3317; RV64IA-WMO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3318; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3319; RV64IA-WMO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3320; RV64IA-WMO-NEXT: sllw a0, a2, a0
3321; RV64IA-WMO-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3322; RV64IA-WMO-NEXT: lr.w.aq a2, (a3)
3323; RV64IA-WMO-NEXT: and a4, a2, a5
3324; RV64IA-WMO-NEXT: bne a4, a1, .LBB16_3
3325; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3326; RV64IA-WMO-NEXT: xor a4, a2, a0
3327; RV64IA-WMO-NEXT: and a4, a4, a5
3328; RV64IA-WMO-NEXT: xor a4, a2, a4
3329; RV64IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
3330; RV64IA-WMO-NEXT: bnez a4, .LBB16_1
3331; RV64IA-WMO-NEXT: .LBB16_3:
3332; RV64IA-WMO-NEXT: ret
3333;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3334; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i16_acq_rel_acquire:
3335; RV64IA-WMO-ZACAS: # %bb.0:
3336; RV64IA-WMO-ZACAS-NEXT: andi a3, a0, -4
3337; RV64IA-WMO-ZACAS-NEXT: slli a0, a0, 3
3338; RV64IA-WMO-ZACAS-NEXT: lui a4, 16
3339; RV64IA-WMO-ZACAS-NEXT: addi a4, a4, -1
3340; RV64IA-WMO-ZACAS-NEXT: sllw a5, a4, a0
3341; RV64IA-WMO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3342; RV64IA-WMO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3343; RV64IA-WMO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3344; RV64IA-WMO-ZACAS-NEXT: sllw a0, a2, a0
3345; RV64IA-WMO-ZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3346; RV64IA-WMO-ZACAS-NEXT: lr.w.aq a2, (a3)
3347; RV64IA-WMO-ZACAS-NEXT: and a4, a2, a5
3348; RV64IA-WMO-ZACAS-NEXT: bne a4, a1, .LBB16_3
3349; RV64IA-WMO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3350; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a0
3351; RV64IA-WMO-ZACAS-NEXT: and a4, a4, a5
3352; RV64IA-WMO-ZACAS-NEXT: xor a4, a2, a4
3353; RV64IA-WMO-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
3354; RV64IA-WMO-ZACAS-NEXT: bnez a4, .LBB16_1
3355; RV64IA-WMO-ZACAS-NEXT: .LBB16_3:
3356; RV64IA-WMO-ZACAS-NEXT: ret
3357;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3358; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_acq_rel_acquire:
3359; RV64IA-WMO-ZABHA: # %bb.0:
3360; RV64IA-WMO-ZABHA-NEXT: amocas.h.aqrl a1, a2, (a0)
3361; RV64IA-WMO-ZABHA-NEXT: ret
3362;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3363; RV64IA-TSO-LABEL: cmpxchg_i16_acq_rel_acquire:
3364; RV64IA-TSO: # %bb.0:
3365; RV64IA-TSO-NEXT: andi a3, a0, -4
3366; RV64IA-TSO-NEXT: slli a0, a0, 3
3367; RV64IA-TSO-NEXT: lui a4, 16
Philip Reames86240752023-10-06 10:28:01 -0700[diff] [blame]3368; RV64IA-TSO-NEXT: addi a4, a4, -1
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3369; RV64IA-TSO-NEXT: sllw a5, a4, a0
3370; RV64IA-TSO-NEXT: and a1, a1, a4
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3371; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3372; RV64IA-TSO-NEXT: sllw a1, a1, a0
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3373; RV64IA-TSO-NEXT: sllw a0, a2, a0
3374; RV64IA-TSO-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3375; RV64IA-TSO-NEXT: lr.w a2, (a3)
3376; RV64IA-TSO-NEXT: and a4, a2, a5
3377; RV64IA-TSO-NEXT: bne a4, a1, .LBB16_3
3378; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3379; RV64IA-TSO-NEXT: xor a4, a2, a0
3380; RV64IA-TSO-NEXT: and a4, a4, a5
3381; RV64IA-TSO-NEXT: xor a4, a2, a4
3382; RV64IA-TSO-NEXT: sc.w a4, a4, (a3)
3383; RV64IA-TSO-NEXT: bnez a4, .LBB16_1
3384; RV64IA-TSO-NEXT: .LBB16_3:
3385; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3386;
3387; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i16_acq_rel_acquire:
3388; RV64IA-TSO-ZACAS: # %bb.0:
3389; RV64IA-TSO-ZACAS-NEXT: andi a3, a0, -4
3390; RV64IA-TSO-ZACAS-NEXT: slli a0, a0, 3
3391; RV64IA-TSO-ZACAS-NEXT: lui a4, 16
3392; RV64IA-TSO-ZACAS-NEXT: addi a4, a4, -1
3393; RV64IA-TSO-ZACAS-NEXT: sllw a5, a4, a0
3394; RV64IA-TSO-ZACAS-NEXT: and a1, a1, a4
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3395; RV64IA-TSO-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3396; RV64IA-TSO-ZACAS-NEXT: sllw a1, a1, a0
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3397; RV64IA-TSO-ZACAS-NEXT: sllw a0, a2, a0
3398; RV64IA-TSO-ZACAS-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
3399; RV64IA-TSO-ZACAS-NEXT: lr.w a2, (a3)
3400; RV64IA-TSO-ZACAS-NEXT: and a4, a2, a5
3401; RV64IA-TSO-ZACAS-NEXT: bne a4, a1, .LBB16_3
3402; RV64IA-TSO-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
3403; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a0
3404; RV64IA-TSO-ZACAS-NEXT: and a4, a4, a5
3405; RV64IA-TSO-ZACAS-NEXT: xor a4, a2, a4
3406; RV64IA-TSO-ZACAS-NEXT: sc.w a4, a4, (a3)
3407; RV64IA-TSO-ZACAS-NEXT: bnez a4, .LBB16_1
3408; RV64IA-TSO-ZACAS-NEXT: .LBB16_3:
3409; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3410;
3411; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_acq_rel_acquire:
3412; RV64IA-TSO-ZABHA: # %bb.0:
3413; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
3414; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3415 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val acq_rel acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3416 ret void
3417}
3418
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3419define void @cmpxchg_i16_seq_cst_monotonic(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3420; RV32I-LABEL: cmpxchg_i16_seq_cst_monotonic:
3421; RV32I: # %bb.0:
3422; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3423; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3424; RV32I-NEXT: sh a1, 10(sp)
3425; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3426; RV32I-NEXT: li a3, 5
3427; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3428; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3429; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3430; RV32I-NEXT: addi sp, sp, 16
3431; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3432;
3433; RV32IA-LABEL: cmpxchg_i16_seq_cst_monotonic:
3434; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3435; RV32IA-NEXT: andi a3, a0, -4
3436; RV32IA-NEXT: slli a0, a0, 3
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3437; RV32IA-NEXT: lui a4, 16
3438; RV32IA-NEXT: addi a4, a4, -1
3439; RV32IA-NEXT: sll a5, a4, a0
3440; RV32IA-NEXT: and a1, a1, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3441; RV32IA-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3442; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3443; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3444; RV32IA-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3445; RV32IA-NEXT: lr.w.aqrl a2, (a3)
3446; RV32IA-NEXT: and a4, a2, a5
3447; RV32IA-NEXT: bne a4, a1, .LBB17_3
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3448; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB17_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3449; RV32IA-NEXT: xor a4, a2, a0
3450; RV32IA-NEXT: and a4, a4, a5
3451; RV32IA-NEXT: xor a4, a2, a4
Alex Bradbury5b070592023-03-30 20:47:28 +0100[diff] [blame]3452; RV32IA-NEXT: sc.w.rl a4, a4, (a3)
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3453; RV32IA-NEXT: bnez a4, .LBB17_1
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3454; RV32IA-NEXT: .LBB17_3:
3455; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3456;
3457; RV64I-LABEL: cmpxchg_i16_seq_cst_monotonic:
3458; RV64I: # %bb.0:
3459; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3460; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3461; RV64I-NEXT: sh a1, 6(sp)
3462; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3463; RV64I-NEXT: li a3, 5
3464; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3465; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3466; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3467; RV64I-NEXT: addi sp, sp, 16
3468; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]3469;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3470; RV64IA-WMO-LABEL: cmpxchg_i16_seq_cst_monotonic:
3471; RV64IA-WMO: # %bb.0:
3472; RV64IA-WMO-NEXT: andi a3, a0, -4
3473; RV64IA-WMO-NEXT: slli a0, a0, 3
3474; RV64IA-WMO-NEXT: lui a4, 16
3475; RV64IA-WMO-NEXT: addi a4, a4, -1
3476; RV64IA-WMO-NEXT: sllw a5, a4, a0
3477; RV64IA-WMO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3478; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3479; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3480; RV64IA-WMO-NEXT: sllw a0, a2, a0
3481; RV64IA-WMO-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1
3482; RV64IA-WMO-NEXT: lr.w.aqrl a2, (a3)
3483; RV64IA-WMO-NEXT: and a4, a2, a5
3484; RV64IA-WMO-NEXT: bne a4, a1, .LBB17_3
3485; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB17_1 Depth=1
3486; RV64IA-WMO-NEXT: xor a4, a2, a0
3487; RV64IA-WMO-NEXT: and a4, a4, a5
3488; RV64IA-WMO-NEXT: xor a4, a2, a4
3489; RV64IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
3490; RV64IA-WMO-NEXT: bnez a4, .LBB17_1
3491; RV64IA-WMO-NEXT: .LBB17_3:
3492; RV64IA-WMO-NEXT: ret
3493;
3494; RV64IA-ZACAS-LABEL: cmpxchg_i16_seq_cst_monotonic:
3495; RV64IA-ZACAS: # %bb.0:
3496; RV64IA-ZACAS-NEXT: andi a3, a0, -4
3497; RV64IA-ZACAS-NEXT: slli a0, a0, 3
3498; RV64IA-ZACAS-NEXT: lui a4, 16
3499; RV64IA-ZACAS-NEXT: addi a4, a4, -1
3500; RV64IA-ZACAS-NEXT: sllw a5, a4, a0
3501; RV64IA-ZACAS-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3502; RV64IA-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3503; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3504; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
3505; RV64IA-ZACAS-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1
3506; RV64IA-ZACAS-NEXT: lr.w.aqrl a2, (a3)
3507; RV64IA-ZACAS-NEXT: and a4, a2, a5
3508; RV64IA-ZACAS-NEXT: bne a4, a1, .LBB17_3
3509; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB17_1 Depth=1
3510; RV64IA-ZACAS-NEXT: xor a4, a2, a0
3511; RV64IA-ZACAS-NEXT: and a4, a4, a5
3512; RV64IA-ZACAS-NEXT: xor a4, a2, a4
3513; RV64IA-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
3514; RV64IA-ZACAS-NEXT: bnez a4, .LBB17_1
3515; RV64IA-ZACAS-NEXT: .LBB17_3:
3516; RV64IA-ZACAS-NEXT: ret
3517;
3518; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_seq_cst_monotonic:
3519; RV64IA-WMO-ZABHA: # %bb.0:
3520; RV64IA-WMO-ZABHA-NEXT: amocas.h.aqrl a1, a2, (a0)
3521; RV64IA-WMO-ZABHA-NEXT: ret
3522;
3523; RV64IA-TSO-LABEL: cmpxchg_i16_seq_cst_monotonic:
3524; RV64IA-TSO: # %bb.0:
3525; RV64IA-TSO-NEXT: andi a3, a0, -4
3526; RV64IA-TSO-NEXT: slli a0, a0, 3
3527; RV64IA-TSO-NEXT: lui a4, 16
3528; RV64IA-TSO-NEXT: addi a4, a4, -1
3529; RV64IA-TSO-NEXT: sllw a5, a4, a0
3530; RV64IA-TSO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3531; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3532; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3533; RV64IA-TSO-NEXT: sllw a0, a2, a0
3534; RV64IA-TSO-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1
3535; RV64IA-TSO-NEXT: lr.w.aqrl a2, (a3)
3536; RV64IA-TSO-NEXT: and a4, a2, a5
3537; RV64IA-TSO-NEXT: bne a4, a1, .LBB17_3
3538; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB17_1 Depth=1
3539; RV64IA-TSO-NEXT: xor a4, a2, a0
3540; RV64IA-TSO-NEXT: and a4, a4, a5
3541; RV64IA-TSO-NEXT: xor a4, a2, a4
3542; RV64IA-TSO-NEXT: sc.w.rl a4, a4, (a3)
3543; RV64IA-TSO-NEXT: bnez a4, .LBB17_1
3544; RV64IA-TSO-NEXT: .LBB17_3:
3545; RV64IA-TSO-NEXT: ret
3546;
3547; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_seq_cst_monotonic:
3548; RV64IA-TSO-ZABHA: # %bb.0:
3549; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
3550; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3551 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3552 ret void
3553}
3554
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3555define void @cmpxchg_i16_seq_cst_acquire(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3556; RV32I-LABEL: cmpxchg_i16_seq_cst_acquire:
3557; RV32I: # %bb.0:
3558; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3559; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3560; RV32I-NEXT: sh a1, 10(sp)
3561; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3562; RV32I-NEXT: li a3, 5
3563; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3564; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3565; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3566; RV32I-NEXT: addi sp, sp, 16
3567; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3568;
3569; RV32IA-LABEL: cmpxchg_i16_seq_cst_acquire:
3570; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3571; RV32IA-NEXT: andi a3, a0, -4
3572; RV32IA-NEXT: slli a0, a0, 3
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3573; RV32IA-NEXT: lui a4, 16
3574; RV32IA-NEXT: addi a4, a4, -1
3575; RV32IA-NEXT: sll a5, a4, a0
3576; RV32IA-NEXT: and a1, a1, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3577; RV32IA-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3578; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3579; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3580; RV32IA-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3581; RV32IA-NEXT: lr.w.aqrl a2, (a3)
3582; RV32IA-NEXT: and a4, a2, a5
3583; RV32IA-NEXT: bne a4, a1, .LBB18_3
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3584; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB18_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3585; RV32IA-NEXT: xor a4, a2, a0
3586; RV32IA-NEXT: and a4, a4, a5
3587; RV32IA-NEXT: xor a4, a2, a4
Alex Bradbury5b070592023-03-30 20:47:28 +0100[diff] [blame]3588; RV32IA-NEXT: sc.w.rl a4, a4, (a3)
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3589; RV32IA-NEXT: bnez a4, .LBB18_1
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3590; RV32IA-NEXT: .LBB18_3:
3591; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3592;
3593; RV64I-LABEL: cmpxchg_i16_seq_cst_acquire:
3594; RV64I: # %bb.0:
3595; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3596; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3597; RV64I-NEXT: sh a1, 6(sp)
3598; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3599; RV64I-NEXT: li a3, 5
3600; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3601; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3602; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3603; RV64I-NEXT: addi sp, sp, 16
3604; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]3605;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3606; RV64IA-WMO-LABEL: cmpxchg_i16_seq_cst_acquire:
3607; RV64IA-WMO: # %bb.0:
3608; RV64IA-WMO-NEXT: andi a3, a0, -4
3609; RV64IA-WMO-NEXT: slli a0, a0, 3
3610; RV64IA-WMO-NEXT: lui a4, 16
3611; RV64IA-WMO-NEXT: addi a4, a4, -1
3612; RV64IA-WMO-NEXT: sllw a5, a4, a0
3613; RV64IA-WMO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3614; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3615; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3616; RV64IA-WMO-NEXT: sllw a0, a2, a0
3617; RV64IA-WMO-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1
3618; RV64IA-WMO-NEXT: lr.w.aqrl a2, (a3)
3619; RV64IA-WMO-NEXT: and a4, a2, a5
3620; RV64IA-WMO-NEXT: bne a4, a1, .LBB18_3
3621; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB18_1 Depth=1
3622; RV64IA-WMO-NEXT: xor a4, a2, a0
3623; RV64IA-WMO-NEXT: and a4, a4, a5
3624; RV64IA-WMO-NEXT: xor a4, a2, a4
3625; RV64IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
3626; RV64IA-WMO-NEXT: bnez a4, .LBB18_1
3627; RV64IA-WMO-NEXT: .LBB18_3:
3628; RV64IA-WMO-NEXT: ret
3629;
3630; RV64IA-ZACAS-LABEL: cmpxchg_i16_seq_cst_acquire:
3631; RV64IA-ZACAS: # %bb.0:
3632; RV64IA-ZACAS-NEXT: andi a3, a0, -4
3633; RV64IA-ZACAS-NEXT: slli a0, a0, 3
3634; RV64IA-ZACAS-NEXT: lui a4, 16
3635; RV64IA-ZACAS-NEXT: addi a4, a4, -1
3636; RV64IA-ZACAS-NEXT: sllw a5, a4, a0
3637; RV64IA-ZACAS-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3638; RV64IA-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3639; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3640; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
3641; RV64IA-ZACAS-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1
3642; RV64IA-ZACAS-NEXT: lr.w.aqrl a2, (a3)
3643; RV64IA-ZACAS-NEXT: and a4, a2, a5
3644; RV64IA-ZACAS-NEXT: bne a4, a1, .LBB18_3
3645; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB18_1 Depth=1
3646; RV64IA-ZACAS-NEXT: xor a4, a2, a0
3647; RV64IA-ZACAS-NEXT: and a4, a4, a5
3648; RV64IA-ZACAS-NEXT: xor a4, a2, a4
3649; RV64IA-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
3650; RV64IA-ZACAS-NEXT: bnez a4, .LBB18_1
3651; RV64IA-ZACAS-NEXT: .LBB18_3:
3652; RV64IA-ZACAS-NEXT: ret
3653;
3654; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_seq_cst_acquire:
3655; RV64IA-WMO-ZABHA: # %bb.0:
3656; RV64IA-WMO-ZABHA-NEXT: amocas.h.aqrl a1, a2, (a0)
3657; RV64IA-WMO-ZABHA-NEXT: ret
3658;
3659; RV64IA-TSO-LABEL: cmpxchg_i16_seq_cst_acquire:
3660; RV64IA-TSO: # %bb.0:
3661; RV64IA-TSO-NEXT: andi a3, a0, -4
3662; RV64IA-TSO-NEXT: slli a0, a0, 3
3663; RV64IA-TSO-NEXT: lui a4, 16
3664; RV64IA-TSO-NEXT: addi a4, a4, -1
3665; RV64IA-TSO-NEXT: sllw a5, a4, a0
3666; RV64IA-TSO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3667; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3668; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3669; RV64IA-TSO-NEXT: sllw a0, a2, a0
3670; RV64IA-TSO-NEXT: .LBB18_1: # =>This Inner Loop Header: Depth=1
3671; RV64IA-TSO-NEXT: lr.w.aqrl a2, (a3)
3672; RV64IA-TSO-NEXT: and a4, a2, a5
3673; RV64IA-TSO-NEXT: bne a4, a1, .LBB18_3
3674; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB18_1 Depth=1
3675; RV64IA-TSO-NEXT: xor a4, a2, a0
3676; RV64IA-TSO-NEXT: and a4, a4, a5
3677; RV64IA-TSO-NEXT: xor a4, a2, a4
3678; RV64IA-TSO-NEXT: sc.w.rl a4, a4, (a3)
3679; RV64IA-TSO-NEXT: bnez a4, .LBB18_1
3680; RV64IA-TSO-NEXT: .LBB18_3:
3681; RV64IA-TSO-NEXT: ret
3682;
3683; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_seq_cst_acquire:
3684; RV64IA-TSO-ZABHA: # %bb.0:
3685; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
3686; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3687 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3688 ret void
3689}
3690
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3691define void @cmpxchg_i16_seq_cst_seq_cst(ptr %ptr, i16 %cmp, i16 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3692; RV32I-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3693; RV32I: # %bb.0:
3694; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3695; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3696; RV32I-NEXT: sh a1, 10(sp)
3697; RV32I-NEXT: addi a1, sp, 10
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3698; RV32I-NEXT: li a3, 5
3699; RV32I-NEXT: li a4, 5
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3700; RV32I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3701; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3702; RV32I-NEXT: addi sp, sp, 16
3703; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3704;
3705; RV32IA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3706; RV32IA: # %bb.0:
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3707; RV32IA-NEXT: andi a3, a0, -4
3708; RV32IA-NEXT: slli a0, a0, 3
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3709; RV32IA-NEXT: lui a4, 16
3710; RV32IA-NEXT: addi a4, a4, -1
3711; RV32IA-NEXT: sll a5, a4, a0
3712; RV32IA-NEXT: and a1, a1, a4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3713; RV32IA-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3714; RV32IA-NEXT: sll a1, a1, a0
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3715; RV32IA-NEXT: sll a0, a2, a0
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3716; RV32IA-NEXT: .LBB19_1: # =>This Inner Loop Header: Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3717; RV32IA-NEXT: lr.w.aqrl a2, (a3)
3718; RV32IA-NEXT: and a4, a2, a5
3719; RV32IA-NEXT: bne a4, a1, .LBB19_3
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3720; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB19_1 Depth=1
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3721; RV32IA-NEXT: xor a4, a2, a0
3722; RV32IA-NEXT: and a4, a4, a5
3723; RV32IA-NEXT: xor a4, a2, a4
Alex Bradbury5b070592023-03-30 20:47:28 +0100[diff] [blame]3724; RV32IA-NEXT: sc.w.rl a4, a4, (a3)
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]3725; RV32IA-NEXT: bnez a4, .LBB19_1
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3726; RV32IA-NEXT: .LBB19_3:
3727; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3728;
3729; RV64I-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3730; RV64I: # %bb.0:
3731; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3732; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3733; RV64I-NEXT: sh a1, 6(sp)
3734; RV64I-NEXT: addi a1, sp, 6
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3735; RV64I-NEXT: li a3, 5
3736; RV64I-NEXT: li a4, 5
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3737; RV64I-NEXT: call __atomic_compare_exchange_2
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3738; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3739; RV64I-NEXT: addi sp, sp, 16
3740; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]3741;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3742; RV64IA-WMO-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3743; RV64IA-WMO: # %bb.0:
3744; RV64IA-WMO-NEXT: andi a3, a0, -4
3745; RV64IA-WMO-NEXT: slli a0, a0, 3
3746; RV64IA-WMO-NEXT: lui a4, 16
3747; RV64IA-WMO-NEXT: addi a4, a4, -1
3748; RV64IA-WMO-NEXT: sllw a5, a4, a0
3749; RV64IA-WMO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3750; RV64IA-WMO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3751; RV64IA-WMO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3752; RV64IA-WMO-NEXT: sllw a0, a2, a0
3753; RV64IA-WMO-NEXT: .LBB19_1: # =>This Inner Loop Header: Depth=1
3754; RV64IA-WMO-NEXT: lr.w.aqrl a2, (a3)
3755; RV64IA-WMO-NEXT: and a4, a2, a5
3756; RV64IA-WMO-NEXT: bne a4, a1, .LBB19_3
3757; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB19_1 Depth=1
3758; RV64IA-WMO-NEXT: xor a4, a2, a0
3759; RV64IA-WMO-NEXT: and a4, a4, a5
3760; RV64IA-WMO-NEXT: xor a4, a2, a4
3761; RV64IA-WMO-NEXT: sc.w.rl a4, a4, (a3)
3762; RV64IA-WMO-NEXT: bnez a4, .LBB19_1
3763; RV64IA-WMO-NEXT: .LBB19_3:
3764; RV64IA-WMO-NEXT: ret
3765;
3766; RV64IA-ZACAS-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3767; RV64IA-ZACAS: # %bb.0:
3768; RV64IA-ZACAS-NEXT: andi a3, a0, -4
3769; RV64IA-ZACAS-NEXT: slli a0, a0, 3
3770; RV64IA-ZACAS-NEXT: lui a4, 16
3771; RV64IA-ZACAS-NEXT: addi a4, a4, -1
3772; RV64IA-ZACAS-NEXT: sllw a5, a4, a0
3773; RV64IA-ZACAS-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3774; RV64IA-ZACAS-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3775; RV64IA-ZACAS-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3776; RV64IA-ZACAS-NEXT: sllw a0, a2, a0
3777; RV64IA-ZACAS-NEXT: .LBB19_1: # =>This Inner Loop Header: Depth=1
3778; RV64IA-ZACAS-NEXT: lr.w.aqrl a2, (a3)
3779; RV64IA-ZACAS-NEXT: and a4, a2, a5
3780; RV64IA-ZACAS-NEXT: bne a4, a1, .LBB19_3
3781; RV64IA-ZACAS-NEXT: # %bb.2: # in Loop: Header=BB19_1 Depth=1
3782; RV64IA-ZACAS-NEXT: xor a4, a2, a0
3783; RV64IA-ZACAS-NEXT: and a4, a4, a5
3784; RV64IA-ZACAS-NEXT: xor a4, a2, a4
3785; RV64IA-ZACAS-NEXT: sc.w.rl a4, a4, (a3)
3786; RV64IA-ZACAS-NEXT: bnez a4, .LBB19_1
3787; RV64IA-ZACAS-NEXT: .LBB19_3:
3788; RV64IA-ZACAS-NEXT: ret
3789;
3790; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3791; RV64IA-WMO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]3792; RV64IA-WMO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3793; RV64IA-WMO-ZABHA-NEXT: amocas.h.aqrl a1, a2, (a0)
3794; RV64IA-WMO-ZABHA-NEXT: ret
3795;
3796; RV64IA-TSO-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3797; RV64IA-TSO: # %bb.0:
3798; RV64IA-TSO-NEXT: andi a3, a0, -4
3799; RV64IA-TSO-NEXT: slli a0, a0, 3
3800; RV64IA-TSO-NEXT: lui a4, 16
3801; RV64IA-TSO-NEXT: addi a4, a4, -1
3802; RV64IA-TSO-NEXT: sllw a5, a4, a0
3803; RV64IA-TSO-NEXT: and a1, a1, a4
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3804; RV64IA-TSO-NEXT: and a2, a2, a4
Pengcheng Wang9122c522024-11-15 17:53:14 +0800[diff] [blame]3805; RV64IA-TSO-NEXT: sllw a1, a1, a0
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3806; RV64IA-TSO-NEXT: sllw a0, a2, a0
3807; RV64IA-TSO-NEXT: .LBB19_1: # =>This Inner Loop Header: Depth=1
3808; RV64IA-TSO-NEXT: lr.w.aqrl a2, (a3)
3809; RV64IA-TSO-NEXT: and a4, a2, a5
3810; RV64IA-TSO-NEXT: bne a4, a1, .LBB19_3
3811; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB19_1 Depth=1
3812; RV64IA-TSO-NEXT: xor a4, a2, a0
3813; RV64IA-TSO-NEXT: and a4, a4, a5
3814; RV64IA-TSO-NEXT: xor a4, a2, a4
3815; RV64IA-TSO-NEXT: sc.w.rl a4, a4, (a3)
3816; RV64IA-TSO-NEXT: bnez a4, .LBB19_1
3817; RV64IA-TSO-NEXT: .LBB19_3:
3818; RV64IA-TSO-NEXT: ret
3819;
3820; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i16_seq_cst_seq_cst:
3821; RV64IA-TSO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]3822; RV64IA-TSO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3823; RV64IA-TSO-ZABHA-NEXT: amocas.h a1, a2, (a0)
3824; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3825 %res = cmpxchg ptr %ptr, i16 %cmp, i16 %val seq_cst seq_cst
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3826 ret void
3827}
3828
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3829define void @cmpxchg_i32_monotonic_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3830; RV32I-LABEL: cmpxchg_i32_monotonic_monotonic:
3831; RV32I: # %bb.0:
3832; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3833; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3834; RV32I-NEXT: sw a1, 8(sp)
3835; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3836; RV32I-NEXT: li a3, 0
3837; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3838; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3839; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3840; RV32I-NEXT: addi sp, sp, 16
3841; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3842;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3843; RV32IA-WMO-LABEL: cmpxchg_i32_monotonic_monotonic:
3844; RV32IA-WMO: # %bb.0:
3845; RV32IA-WMO-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1
3846; RV32IA-WMO-NEXT: lr.w a3, (a0)
3847; RV32IA-WMO-NEXT: bne a3, a1, .LBB20_3
3848; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB20_1 Depth=1
3849; RV32IA-WMO-NEXT: sc.w a4, a2, (a0)
3850; RV32IA-WMO-NEXT: bnez a4, .LBB20_1
3851; RV32IA-WMO-NEXT: .LBB20_3:
3852; RV32IA-WMO-NEXT: ret
3853;
3854; RV32IA-ZACAS-LABEL: cmpxchg_i32_monotonic_monotonic:
3855; RV32IA-ZACAS: # %bb.0:
3856; RV32IA-ZACAS-NEXT: amocas.w a1, a2, (a0)
3857; RV32IA-ZACAS-NEXT: ret
3858;
3859; RV32IA-TSO-LABEL: cmpxchg_i32_monotonic_monotonic:
3860; RV32IA-TSO: # %bb.0:
3861; RV32IA-TSO-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1
3862; RV32IA-TSO-NEXT: lr.w a3, (a0)
3863; RV32IA-TSO-NEXT: bne a3, a1, .LBB20_3
3864; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB20_1 Depth=1
3865; RV32IA-TSO-NEXT: sc.w a4, a2, (a0)
3866; RV32IA-TSO-NEXT: bnez a4, .LBB20_1
3867; RV32IA-TSO-NEXT: .LBB20_3:
3868; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3869;
3870; RV64I-LABEL: cmpxchg_i32_monotonic_monotonic:
3871; RV64I: # %bb.0:
3872; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3873; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3874; RV64I-NEXT: sw a1, 4(sp)
3875; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3876; RV64I-NEXT: li a3, 0
3877; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3878; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3879; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3880; RV64I-NEXT: addi sp, sp, 16
3881; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]3882;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3883; RV64IA-WMO-LABEL: cmpxchg_i32_monotonic_monotonic:
3884; RV64IA-WMO: # %bb.0:
3885; RV64IA-WMO-NEXT: sext.w a1, a1
3886; RV64IA-WMO-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1
3887; RV64IA-WMO-NEXT: lr.w a3, (a0)
3888; RV64IA-WMO-NEXT: bne a3, a1, .LBB20_3
3889; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB20_1 Depth=1
3890; RV64IA-WMO-NEXT: sc.w a4, a2, (a0)
3891; RV64IA-WMO-NEXT: bnez a4, .LBB20_1
3892; RV64IA-WMO-NEXT: .LBB20_3:
3893; RV64IA-WMO-NEXT: ret
3894;
3895; RV64IA-ZACAS-LABEL: cmpxchg_i32_monotonic_monotonic:
3896; RV64IA-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3897; RV64IA-ZACAS-NEXT: amocas.w a1, a2, (a0)
3898; RV64IA-ZACAS-NEXT: ret
3899;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3900; RV64IA-ZABHA-LABEL: cmpxchg_i32_monotonic_monotonic:
3901; RV64IA-ZABHA: # %bb.0:
3902; RV64IA-ZABHA-NEXT: amocas.w a1, a2, (a0)
3903; RV64IA-ZABHA-NEXT: ret
3904;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3905; RV64IA-TSO-LABEL: cmpxchg_i32_monotonic_monotonic:
3906; RV64IA-TSO: # %bb.0:
3907; RV64IA-TSO-NEXT: sext.w a1, a1
3908; RV64IA-TSO-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1
3909; RV64IA-TSO-NEXT: lr.w a3, (a0)
3910; RV64IA-TSO-NEXT: bne a3, a1, .LBB20_3
3911; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB20_1 Depth=1
3912; RV64IA-TSO-NEXT: sc.w a4, a2, (a0)
3913; RV64IA-TSO-NEXT: bnez a4, .LBB20_1
3914; RV64IA-TSO-NEXT: .LBB20_3:
3915; RV64IA-TSO-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3916 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val monotonic monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3917 ret void
3918}
3919
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]3920define void @cmpxchg_i32_acquire_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3921; RV32I-LABEL: cmpxchg_i32_acquire_monotonic:
3922; RV32I: # %bb.0:
3923; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3924; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3925; RV32I-NEXT: sw a1, 8(sp)
3926; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3927; RV32I-NEXT: li a3, 2
3928; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3929; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3930; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3931; RV32I-NEXT: addi sp, sp, 16
3932; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]3933;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3934; RV32IA-WMO-LABEL: cmpxchg_i32_acquire_monotonic:
3935; RV32IA-WMO: # %bb.0:
3936; RV32IA-WMO-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1
3937; RV32IA-WMO-NEXT: lr.w.aq a3, (a0)
3938; RV32IA-WMO-NEXT: bne a3, a1, .LBB21_3
3939; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB21_1 Depth=1
3940; RV32IA-WMO-NEXT: sc.w a4, a2, (a0)
3941; RV32IA-WMO-NEXT: bnez a4, .LBB21_1
3942; RV32IA-WMO-NEXT: .LBB21_3:
3943; RV32IA-WMO-NEXT: ret
3944;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3945; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_acquire_monotonic:
3946; RV32IA-WMO-ZACAS: # %bb.0:
3947; RV32IA-WMO-ZACAS-NEXT: amocas.w.aq a1, a2, (a0)
3948; RV32IA-WMO-ZACAS-NEXT: ret
3949;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3950; RV32IA-TSO-LABEL: cmpxchg_i32_acquire_monotonic:
3951; RV32IA-TSO: # %bb.0:
3952; RV32IA-TSO-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1
3953; RV32IA-TSO-NEXT: lr.w a3, (a0)
3954; RV32IA-TSO-NEXT: bne a3, a1, .LBB21_3
3955; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB21_1 Depth=1
3956; RV32IA-TSO-NEXT: sc.w a4, a2, (a0)
3957; RV32IA-TSO-NEXT: bnez a4, .LBB21_1
3958; RV32IA-TSO-NEXT: .LBB21_3:
3959; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3960;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3961; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_acquire_monotonic:
3962; RV32IA-TSO-ZACAS: # %bb.0:
3963; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
3964; RV32IA-TSO-ZACAS-NEXT: ret
3965;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3966; RV64I-LABEL: cmpxchg_i32_acquire_monotonic:
3967; RV64I: # %bb.0:
3968; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3969; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3970; RV64I-NEXT: sw a1, 4(sp)
3971; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]3972; RV64I-NEXT: li a3, 2
3973; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]3974; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]3975; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]3976; RV64I-NEXT: addi sp, sp, 16
3977; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]3978;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]3979; RV64IA-WMO-LABEL: cmpxchg_i32_acquire_monotonic:
3980; RV64IA-WMO: # %bb.0:
3981; RV64IA-WMO-NEXT: sext.w a1, a1
3982; RV64IA-WMO-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1
3983; RV64IA-WMO-NEXT: lr.w.aq a3, (a0)
3984; RV64IA-WMO-NEXT: bne a3, a1, .LBB21_3
3985; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB21_1 Depth=1
3986; RV64IA-WMO-NEXT: sc.w a4, a2, (a0)
3987; RV64IA-WMO-NEXT: bnez a4, .LBB21_1
3988; RV64IA-WMO-NEXT: .LBB21_3:
3989; RV64IA-WMO-NEXT: ret
3990;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3991; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_acquire_monotonic:
3992; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]3993; RV64IA-WMO-ZACAS-NEXT: amocas.w.aq a1, a2, (a0)
3994; RV64IA-WMO-ZACAS-NEXT: ret
3995;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]3996; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acquire_monotonic:
3997; RV64IA-WMO-ZABHA: # %bb.0:
3998; RV64IA-WMO-ZABHA-NEXT: amocas.w.aq a1, a2, (a0)
3999; RV64IA-WMO-ZABHA-NEXT: ret
4000;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4001; RV64IA-TSO-LABEL: cmpxchg_i32_acquire_monotonic:
4002; RV64IA-TSO: # %bb.0:
4003; RV64IA-TSO-NEXT: sext.w a1, a1
4004; RV64IA-TSO-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1
4005; RV64IA-TSO-NEXT: lr.w a3, (a0)
4006; RV64IA-TSO-NEXT: bne a3, a1, .LBB21_3
4007; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB21_1 Depth=1
4008; RV64IA-TSO-NEXT: sc.w a4, a2, (a0)
4009; RV64IA-TSO-NEXT: bnez a4, .LBB21_1
4010; RV64IA-TSO-NEXT: .LBB21_3:
4011; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4012;
4013; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_acquire_monotonic:
4014; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4015; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4016; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4017;
4018; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acquire_monotonic:
4019; RV64IA-TSO-ZABHA: # %bb.0:
4020; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4021; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4022 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acquire monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4023 ret void
4024}
4025
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4026define void @cmpxchg_i32_acquire_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4027; RV32I-LABEL: cmpxchg_i32_acquire_acquire:
4028; RV32I: # %bb.0:
4029; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4030; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4031; RV32I-NEXT: sw a1, 8(sp)
4032; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4033; RV32I-NEXT: li a3, 2
4034; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4035; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4036; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4037; RV32I-NEXT: addi sp, sp, 16
4038; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4039;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4040; RV32IA-WMO-LABEL: cmpxchg_i32_acquire_acquire:
4041; RV32IA-WMO: # %bb.0:
4042; RV32IA-WMO-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1
4043; RV32IA-WMO-NEXT: lr.w.aq a3, (a0)
4044; RV32IA-WMO-NEXT: bne a3, a1, .LBB22_3
4045; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB22_1 Depth=1
4046; RV32IA-WMO-NEXT: sc.w a4, a2, (a0)
4047; RV32IA-WMO-NEXT: bnez a4, .LBB22_1
4048; RV32IA-WMO-NEXT: .LBB22_3:
4049; RV32IA-WMO-NEXT: ret
4050;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4051; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_acquire_acquire:
4052; RV32IA-WMO-ZACAS: # %bb.0:
4053; RV32IA-WMO-ZACAS-NEXT: amocas.w.aq a1, a2, (a0)
4054; RV32IA-WMO-ZACAS-NEXT: ret
4055;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4056; RV32IA-TSO-LABEL: cmpxchg_i32_acquire_acquire:
4057; RV32IA-TSO: # %bb.0:
4058; RV32IA-TSO-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1
4059; RV32IA-TSO-NEXT: lr.w a3, (a0)
4060; RV32IA-TSO-NEXT: bne a3, a1, .LBB22_3
4061; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB22_1 Depth=1
4062; RV32IA-TSO-NEXT: sc.w a4, a2, (a0)
4063; RV32IA-TSO-NEXT: bnez a4, .LBB22_1
4064; RV32IA-TSO-NEXT: .LBB22_3:
4065; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4066;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4067; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_acquire_acquire:
4068; RV32IA-TSO-ZACAS: # %bb.0:
4069; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4070; RV32IA-TSO-ZACAS-NEXT: ret
4071;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4072; RV64I-LABEL: cmpxchg_i32_acquire_acquire:
4073; RV64I: # %bb.0:
4074; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4075; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4076; RV64I-NEXT: sw a1, 4(sp)
4077; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4078; RV64I-NEXT: li a3, 2
4079; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4080; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4081; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4082; RV64I-NEXT: addi sp, sp, 16
4083; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4084;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4085; RV64IA-WMO-LABEL: cmpxchg_i32_acquire_acquire:
4086; RV64IA-WMO: # %bb.0:
4087; RV64IA-WMO-NEXT: sext.w a1, a1
4088; RV64IA-WMO-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1
4089; RV64IA-WMO-NEXT: lr.w.aq a3, (a0)
4090; RV64IA-WMO-NEXT: bne a3, a1, .LBB22_3
4091; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB22_1 Depth=1
4092; RV64IA-WMO-NEXT: sc.w a4, a2, (a0)
4093; RV64IA-WMO-NEXT: bnez a4, .LBB22_1
4094; RV64IA-WMO-NEXT: .LBB22_3:
4095; RV64IA-WMO-NEXT: ret
4096;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4097; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_acquire_acquire:
4098; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4099; RV64IA-WMO-ZACAS-NEXT: amocas.w.aq a1, a2, (a0)
4100; RV64IA-WMO-ZACAS-NEXT: ret
4101;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4102; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acquire_acquire:
4103; RV64IA-WMO-ZABHA: # %bb.0:
4104; RV64IA-WMO-ZABHA-NEXT: amocas.w.aq a1, a2, (a0)
4105; RV64IA-WMO-ZABHA-NEXT: ret
4106;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4107; RV64IA-TSO-LABEL: cmpxchg_i32_acquire_acquire:
4108; RV64IA-TSO: # %bb.0:
4109; RV64IA-TSO-NEXT: sext.w a1, a1
4110; RV64IA-TSO-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1
4111; RV64IA-TSO-NEXT: lr.w a3, (a0)
4112; RV64IA-TSO-NEXT: bne a3, a1, .LBB22_3
4113; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB22_1 Depth=1
4114; RV64IA-TSO-NEXT: sc.w a4, a2, (a0)
4115; RV64IA-TSO-NEXT: bnez a4, .LBB22_1
4116; RV64IA-TSO-NEXT: .LBB22_3:
4117; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4118;
4119; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_acquire_acquire:
4120; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4121; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4122; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4123;
4124; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acquire_acquire:
4125; RV64IA-TSO-ZABHA: # %bb.0:
4126; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4127; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4128 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acquire acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4129 ret void
4130}
4131
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4132define void @cmpxchg_i32_release_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4133; RV32I-LABEL: cmpxchg_i32_release_monotonic:
4134; RV32I: # %bb.0:
4135; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4136; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4137; RV32I-NEXT: sw a1, 8(sp)
4138; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4139; RV32I-NEXT: li a3, 3
4140; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4141; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4142; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4143; RV32I-NEXT: addi sp, sp, 16
4144; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4145;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4146; RV32IA-WMO-LABEL: cmpxchg_i32_release_monotonic:
4147; RV32IA-WMO: # %bb.0:
4148; RV32IA-WMO-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1
4149; RV32IA-WMO-NEXT: lr.w a3, (a0)
4150; RV32IA-WMO-NEXT: bne a3, a1, .LBB23_3
4151; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB23_1 Depth=1
4152; RV32IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4153; RV32IA-WMO-NEXT: bnez a4, .LBB23_1
4154; RV32IA-WMO-NEXT: .LBB23_3:
4155; RV32IA-WMO-NEXT: ret
4156;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4157; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_release_monotonic:
4158; RV32IA-WMO-ZACAS: # %bb.0:
4159; RV32IA-WMO-ZACAS-NEXT: amocas.w.rl a1, a2, (a0)
4160; RV32IA-WMO-ZACAS-NEXT: ret
4161;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4162; RV32IA-TSO-LABEL: cmpxchg_i32_release_monotonic:
4163; RV32IA-TSO: # %bb.0:
4164; RV32IA-TSO-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1
4165; RV32IA-TSO-NEXT: lr.w a3, (a0)
4166; RV32IA-TSO-NEXT: bne a3, a1, .LBB23_3
4167; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB23_1 Depth=1
4168; RV32IA-TSO-NEXT: sc.w a4, a2, (a0)
4169; RV32IA-TSO-NEXT: bnez a4, .LBB23_1
4170; RV32IA-TSO-NEXT: .LBB23_3:
4171; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4172;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4173; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_release_monotonic:
4174; RV32IA-TSO-ZACAS: # %bb.0:
4175; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4176; RV32IA-TSO-ZACAS-NEXT: ret
4177;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4178; RV64I-LABEL: cmpxchg_i32_release_monotonic:
4179; RV64I: # %bb.0:
4180; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4181; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4182; RV64I-NEXT: sw a1, 4(sp)
4183; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4184; RV64I-NEXT: li a3, 3
4185; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4186; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4187; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4188; RV64I-NEXT: addi sp, sp, 16
4189; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4190;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4191; RV64IA-WMO-LABEL: cmpxchg_i32_release_monotonic:
4192; RV64IA-WMO: # %bb.0:
4193; RV64IA-WMO-NEXT: sext.w a1, a1
4194; RV64IA-WMO-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1
4195; RV64IA-WMO-NEXT: lr.w a3, (a0)
4196; RV64IA-WMO-NEXT: bne a3, a1, .LBB23_3
4197; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB23_1 Depth=1
4198; RV64IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4199; RV64IA-WMO-NEXT: bnez a4, .LBB23_1
4200; RV64IA-WMO-NEXT: .LBB23_3:
4201; RV64IA-WMO-NEXT: ret
4202;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4203; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_release_monotonic:
4204; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4205; RV64IA-WMO-ZACAS-NEXT: amocas.w.rl a1, a2, (a0)
4206; RV64IA-WMO-ZACAS-NEXT: ret
4207;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4208; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_release_monotonic:
4209; RV64IA-WMO-ZABHA: # %bb.0:
4210; RV64IA-WMO-ZABHA-NEXT: amocas.w.rl a1, a2, (a0)
4211; RV64IA-WMO-ZABHA-NEXT: ret
4212;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4213; RV64IA-TSO-LABEL: cmpxchg_i32_release_monotonic:
4214; RV64IA-TSO: # %bb.0:
4215; RV64IA-TSO-NEXT: sext.w a1, a1
4216; RV64IA-TSO-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1
4217; RV64IA-TSO-NEXT: lr.w a3, (a0)
4218; RV64IA-TSO-NEXT: bne a3, a1, .LBB23_3
4219; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB23_1 Depth=1
4220; RV64IA-TSO-NEXT: sc.w a4, a2, (a0)
4221; RV64IA-TSO-NEXT: bnez a4, .LBB23_1
4222; RV64IA-TSO-NEXT: .LBB23_3:
4223; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4224;
4225; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_release_monotonic:
4226; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4227; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4228; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4229;
4230; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_release_monotonic:
4231; RV64IA-TSO-ZABHA: # %bb.0:
4232; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4233; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4234 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val release monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4235 ret void
4236}
4237
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4238define void @cmpxchg_i32_release_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4239; RV32I-LABEL: cmpxchg_i32_release_acquire:
4240; RV32I: # %bb.0:
4241; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4242; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4243; RV32I-NEXT: sw a1, 8(sp)
4244; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4245; RV32I-NEXT: li a3, 3
4246; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4247; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4248; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4249; RV32I-NEXT: addi sp, sp, 16
4250; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4251;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4252; RV32IA-WMO-LABEL: cmpxchg_i32_release_acquire:
4253; RV32IA-WMO: # %bb.0:
4254; RV32IA-WMO-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1
4255; RV32IA-WMO-NEXT: lr.w.aq a3, (a0)
4256; RV32IA-WMO-NEXT: bne a3, a1, .LBB24_3
4257; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB24_1 Depth=1
4258; RV32IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4259; RV32IA-WMO-NEXT: bnez a4, .LBB24_1
4260; RV32IA-WMO-NEXT: .LBB24_3:
4261; RV32IA-WMO-NEXT: ret
4262;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4263; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_release_acquire:
4264; RV32IA-WMO-ZACAS: # %bb.0:
4265; RV32IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4266; RV32IA-WMO-ZACAS-NEXT: ret
4267;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4268; RV32IA-TSO-LABEL: cmpxchg_i32_release_acquire:
4269; RV32IA-TSO: # %bb.0:
4270; RV32IA-TSO-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1
4271; RV32IA-TSO-NEXT: lr.w a3, (a0)
4272; RV32IA-TSO-NEXT: bne a3, a1, .LBB24_3
4273; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB24_1 Depth=1
4274; RV32IA-TSO-NEXT: sc.w a4, a2, (a0)
4275; RV32IA-TSO-NEXT: bnez a4, .LBB24_1
4276; RV32IA-TSO-NEXT: .LBB24_3:
4277; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4278;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4279; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_release_acquire:
4280; RV32IA-TSO-ZACAS: # %bb.0:
4281; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4282; RV32IA-TSO-ZACAS-NEXT: ret
4283;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4284; RV64I-LABEL: cmpxchg_i32_release_acquire:
4285; RV64I: # %bb.0:
4286; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4287; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4288; RV64I-NEXT: sw a1, 4(sp)
4289; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4290; RV64I-NEXT: li a3, 3
4291; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4292; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4293; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4294; RV64I-NEXT: addi sp, sp, 16
4295; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4296;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4297; RV64IA-WMO-LABEL: cmpxchg_i32_release_acquire:
4298; RV64IA-WMO: # %bb.0:
4299; RV64IA-WMO-NEXT: sext.w a1, a1
4300; RV64IA-WMO-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1
4301; RV64IA-WMO-NEXT: lr.w.aq a3, (a0)
4302; RV64IA-WMO-NEXT: bne a3, a1, .LBB24_3
4303; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB24_1 Depth=1
4304; RV64IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4305; RV64IA-WMO-NEXT: bnez a4, .LBB24_1
4306; RV64IA-WMO-NEXT: .LBB24_3:
4307; RV64IA-WMO-NEXT: ret
4308;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4309; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_release_acquire:
4310; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4311; RV64IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4312; RV64IA-WMO-ZACAS-NEXT: ret
4313;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4314; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_release_acquire:
4315; RV64IA-WMO-ZABHA: # %bb.0:
4316; RV64IA-WMO-ZABHA-NEXT: amocas.w.aqrl a1, a2, (a0)
4317; RV64IA-WMO-ZABHA-NEXT: ret
4318;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4319; RV64IA-TSO-LABEL: cmpxchg_i32_release_acquire:
4320; RV64IA-TSO: # %bb.0:
4321; RV64IA-TSO-NEXT: sext.w a1, a1
4322; RV64IA-TSO-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1
4323; RV64IA-TSO-NEXT: lr.w a3, (a0)
4324; RV64IA-TSO-NEXT: bne a3, a1, .LBB24_3
4325; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB24_1 Depth=1
4326; RV64IA-TSO-NEXT: sc.w a4, a2, (a0)
4327; RV64IA-TSO-NEXT: bnez a4, .LBB24_1
4328; RV64IA-TSO-NEXT: .LBB24_3:
4329; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4330;
4331; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_release_acquire:
4332; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4333; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4334; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4335;
4336; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_release_acquire:
4337; RV64IA-TSO-ZABHA: # %bb.0:
4338; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4339; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4340 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val release acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4341 ret void
4342}
4343
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4344define void @cmpxchg_i32_acq_rel_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4345; RV32I-LABEL: cmpxchg_i32_acq_rel_monotonic:
4346; RV32I: # %bb.0:
4347; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4348; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4349; RV32I-NEXT: sw a1, 8(sp)
4350; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4351; RV32I-NEXT: li a3, 4
4352; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4353; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4354; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4355; RV32I-NEXT: addi sp, sp, 16
4356; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4357;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4358; RV32IA-WMO-LABEL: cmpxchg_i32_acq_rel_monotonic:
4359; RV32IA-WMO: # %bb.0:
4360; RV32IA-WMO-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1
4361; RV32IA-WMO-NEXT: lr.w.aq a3, (a0)
4362; RV32IA-WMO-NEXT: bne a3, a1, .LBB25_3
4363; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB25_1 Depth=1
4364; RV32IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4365; RV32IA-WMO-NEXT: bnez a4, .LBB25_1
4366; RV32IA-WMO-NEXT: .LBB25_3:
4367; RV32IA-WMO-NEXT: ret
4368;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4369; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_acq_rel_monotonic:
4370; RV32IA-WMO-ZACAS: # %bb.0:
4371; RV32IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4372; RV32IA-WMO-ZACAS-NEXT: ret
4373;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4374; RV32IA-TSO-LABEL: cmpxchg_i32_acq_rel_monotonic:
4375; RV32IA-TSO: # %bb.0:
4376; RV32IA-TSO-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1
4377; RV32IA-TSO-NEXT: lr.w a3, (a0)
4378; RV32IA-TSO-NEXT: bne a3, a1, .LBB25_3
4379; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB25_1 Depth=1
4380; RV32IA-TSO-NEXT: sc.w a4, a2, (a0)
4381; RV32IA-TSO-NEXT: bnez a4, .LBB25_1
4382; RV32IA-TSO-NEXT: .LBB25_3:
4383; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4384;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4385; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_acq_rel_monotonic:
4386; RV32IA-TSO-ZACAS: # %bb.0:
4387; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4388; RV32IA-TSO-ZACAS-NEXT: ret
4389;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4390; RV64I-LABEL: cmpxchg_i32_acq_rel_monotonic:
4391; RV64I: # %bb.0:
4392; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4393; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4394; RV64I-NEXT: sw a1, 4(sp)
4395; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4396; RV64I-NEXT: li a3, 4
4397; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4398; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4399; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4400; RV64I-NEXT: addi sp, sp, 16
4401; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4402;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4403; RV64IA-WMO-LABEL: cmpxchg_i32_acq_rel_monotonic:
4404; RV64IA-WMO: # %bb.0:
4405; RV64IA-WMO-NEXT: sext.w a1, a1
4406; RV64IA-WMO-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1
4407; RV64IA-WMO-NEXT: lr.w.aq a3, (a0)
4408; RV64IA-WMO-NEXT: bne a3, a1, .LBB25_3
4409; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB25_1 Depth=1
4410; RV64IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4411; RV64IA-WMO-NEXT: bnez a4, .LBB25_1
4412; RV64IA-WMO-NEXT: .LBB25_3:
4413; RV64IA-WMO-NEXT: ret
4414;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4415; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_acq_rel_monotonic:
4416; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4417; RV64IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4418; RV64IA-WMO-ZACAS-NEXT: ret
4419;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4420; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acq_rel_monotonic:
4421; RV64IA-WMO-ZABHA: # %bb.0:
4422; RV64IA-WMO-ZABHA-NEXT: amocas.w.aqrl a1, a2, (a0)
4423; RV64IA-WMO-ZABHA-NEXT: ret
4424;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4425; RV64IA-TSO-LABEL: cmpxchg_i32_acq_rel_monotonic:
4426; RV64IA-TSO: # %bb.0:
4427; RV64IA-TSO-NEXT: sext.w a1, a1
4428; RV64IA-TSO-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1
4429; RV64IA-TSO-NEXT: lr.w a3, (a0)
4430; RV64IA-TSO-NEXT: bne a3, a1, .LBB25_3
4431; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB25_1 Depth=1
4432; RV64IA-TSO-NEXT: sc.w a4, a2, (a0)
4433; RV64IA-TSO-NEXT: bnez a4, .LBB25_1
4434; RV64IA-TSO-NEXT: .LBB25_3:
4435; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4436;
4437; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_acq_rel_monotonic:
4438; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4439; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4440; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4441;
4442; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acq_rel_monotonic:
4443; RV64IA-TSO-ZABHA: # %bb.0:
4444; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4445; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4446 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acq_rel monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4447 ret void
4448}
4449
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4450define void @cmpxchg_i32_acq_rel_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4451; RV32I-LABEL: cmpxchg_i32_acq_rel_acquire:
4452; RV32I: # %bb.0:
4453; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4454; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4455; RV32I-NEXT: sw a1, 8(sp)
4456; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4457; RV32I-NEXT: li a3, 4
4458; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4459; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4460; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4461; RV32I-NEXT: addi sp, sp, 16
4462; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4463;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4464; RV32IA-WMO-LABEL: cmpxchg_i32_acq_rel_acquire:
4465; RV32IA-WMO: # %bb.0:
4466; RV32IA-WMO-NEXT: .LBB26_1: # =>This Inner Loop Header: Depth=1
4467; RV32IA-WMO-NEXT: lr.w.aq a3, (a0)
4468; RV32IA-WMO-NEXT: bne a3, a1, .LBB26_3
4469; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB26_1 Depth=1
4470; RV32IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4471; RV32IA-WMO-NEXT: bnez a4, .LBB26_1
4472; RV32IA-WMO-NEXT: .LBB26_3:
4473; RV32IA-WMO-NEXT: ret
4474;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4475; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_acq_rel_acquire:
4476; RV32IA-WMO-ZACAS: # %bb.0:
4477; RV32IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4478; RV32IA-WMO-ZACAS-NEXT: ret
4479;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4480; RV32IA-TSO-LABEL: cmpxchg_i32_acq_rel_acquire:
4481; RV32IA-TSO: # %bb.0:
4482; RV32IA-TSO-NEXT: .LBB26_1: # =>This Inner Loop Header: Depth=1
4483; RV32IA-TSO-NEXT: lr.w a3, (a0)
4484; RV32IA-TSO-NEXT: bne a3, a1, .LBB26_3
4485; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB26_1 Depth=1
4486; RV32IA-TSO-NEXT: sc.w a4, a2, (a0)
4487; RV32IA-TSO-NEXT: bnez a4, .LBB26_1
4488; RV32IA-TSO-NEXT: .LBB26_3:
4489; RV32IA-TSO-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4490;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4491; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_acq_rel_acquire:
4492; RV32IA-TSO-ZACAS: # %bb.0:
4493; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4494; RV32IA-TSO-ZACAS-NEXT: ret
4495;
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4496; RV64I-LABEL: cmpxchg_i32_acq_rel_acquire:
4497; RV64I: # %bb.0:
4498; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4499; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4500; RV64I-NEXT: sw a1, 4(sp)
4501; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4502; RV64I-NEXT: li a3, 4
4503; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4504; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4505; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4506; RV64I-NEXT: addi sp, sp, 16
4507; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4508;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4509; RV64IA-WMO-LABEL: cmpxchg_i32_acq_rel_acquire:
4510; RV64IA-WMO: # %bb.0:
4511; RV64IA-WMO-NEXT: sext.w a1, a1
4512; RV64IA-WMO-NEXT: .LBB26_1: # =>This Inner Loop Header: Depth=1
4513; RV64IA-WMO-NEXT: lr.w.aq a3, (a0)
4514; RV64IA-WMO-NEXT: bne a3, a1, .LBB26_3
4515; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB26_1 Depth=1
4516; RV64IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4517; RV64IA-WMO-NEXT: bnez a4, .LBB26_1
4518; RV64IA-WMO-NEXT: .LBB26_3:
4519; RV64IA-WMO-NEXT: ret
4520;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4521; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_acq_rel_acquire:
4522; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4523; RV64IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4524; RV64IA-WMO-ZACAS-NEXT: ret
4525;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4526; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_acq_rel_acquire:
4527; RV64IA-WMO-ZABHA: # %bb.0:
4528; RV64IA-WMO-ZABHA-NEXT: amocas.w.aqrl a1, a2, (a0)
4529; RV64IA-WMO-ZABHA-NEXT: ret
4530;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]4531; RV64IA-TSO-LABEL: cmpxchg_i32_acq_rel_acquire:
4532; RV64IA-TSO: # %bb.0:
4533; RV64IA-TSO-NEXT: sext.w a1, a1
4534; RV64IA-TSO-NEXT: .LBB26_1: # =>This Inner Loop Header: Depth=1
4535; RV64IA-TSO-NEXT: lr.w a3, (a0)
4536; RV64IA-TSO-NEXT: bne a3, a1, .LBB26_3
4537; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB26_1 Depth=1
4538; RV64IA-TSO-NEXT: sc.w a4, a2, (a0)
4539; RV64IA-TSO-NEXT: bnez a4, .LBB26_1
4540; RV64IA-TSO-NEXT: .LBB26_3:
4541; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4542;
4543; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_acq_rel_acquire:
4544; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4545; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4546; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4547;
4548; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_acq_rel_acquire:
4549; RV64IA-TSO-ZABHA: # %bb.0:
4550; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4551; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4552 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val acq_rel acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4553 ret void
4554}
4555
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4556define void @cmpxchg_i32_seq_cst_monotonic(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4557; RV32I-LABEL: cmpxchg_i32_seq_cst_monotonic:
4558; RV32I: # %bb.0:
4559; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4560; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4561; RV32I-NEXT: sw a1, 8(sp)
4562; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4563; RV32I-NEXT: li a3, 5
4564; RV32I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4565; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4566; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4567; RV32I-NEXT: addi sp, sp, 16
4568; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4569;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4570; RV32IA-WMO-LABEL: cmpxchg_i32_seq_cst_monotonic:
4571; RV32IA-WMO: # %bb.0:
4572; RV32IA-WMO-NEXT: .LBB27_1: # =>This Inner Loop Header: Depth=1
4573; RV32IA-WMO-NEXT: lr.w.aqrl a3, (a0)
4574; RV32IA-WMO-NEXT: bne a3, a1, .LBB27_3
4575; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB27_1 Depth=1
4576; RV32IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4577; RV32IA-WMO-NEXT: bnez a4, .LBB27_1
4578; RV32IA-WMO-NEXT: .LBB27_3:
4579; RV32IA-WMO-NEXT: ret
4580;
4581; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_seq_cst_monotonic:
4582; RV32IA-WMO-ZACAS: # %bb.0:
4583; RV32IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4584; RV32IA-WMO-ZACAS-NEXT: ret
4585;
4586; RV32IA-TSO-LABEL: cmpxchg_i32_seq_cst_monotonic:
4587; RV32IA-TSO: # %bb.0:
4588; RV32IA-TSO-NEXT: .LBB27_1: # =>This Inner Loop Header: Depth=1
4589; RV32IA-TSO-NEXT: lr.w.aqrl a3, (a0)
4590; RV32IA-TSO-NEXT: bne a3, a1, .LBB27_3
4591; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB27_1 Depth=1
4592; RV32IA-TSO-NEXT: sc.w.rl a4, a2, (a0)
4593; RV32IA-TSO-NEXT: bnez a4, .LBB27_1
4594; RV32IA-TSO-NEXT: .LBB27_3:
4595; RV32IA-TSO-NEXT: ret
4596;
4597; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_seq_cst_monotonic:
4598; RV32IA-TSO-ZACAS: # %bb.0:
4599; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4600; RV32IA-TSO-ZACAS-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4601;
4602; RV64I-LABEL: cmpxchg_i32_seq_cst_monotonic:
4603; RV64I: # %bb.0:
4604; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4605; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4606; RV64I-NEXT: sw a1, 4(sp)
4607; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4608; RV64I-NEXT: li a3, 5
4609; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4610; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4611; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4612; RV64I-NEXT: addi sp, sp, 16
4613; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4614;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4615; RV64IA-WMO-LABEL: cmpxchg_i32_seq_cst_monotonic:
4616; RV64IA-WMO: # %bb.0:
4617; RV64IA-WMO-NEXT: sext.w a1, a1
4618; RV64IA-WMO-NEXT: .LBB27_1: # =>This Inner Loop Header: Depth=1
4619; RV64IA-WMO-NEXT: lr.w.aqrl a3, (a0)
4620; RV64IA-WMO-NEXT: bne a3, a1, .LBB27_3
4621; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB27_1 Depth=1
4622; RV64IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4623; RV64IA-WMO-NEXT: bnez a4, .LBB27_1
4624; RV64IA-WMO-NEXT: .LBB27_3:
4625; RV64IA-WMO-NEXT: ret
4626;
4627; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_seq_cst_monotonic:
4628; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4629; RV64IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4630; RV64IA-WMO-ZACAS-NEXT: ret
4631;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4632; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_seq_cst_monotonic:
4633; RV64IA-WMO-ZABHA: # %bb.0:
4634; RV64IA-WMO-ZABHA-NEXT: amocas.w.aqrl a1, a2, (a0)
4635; RV64IA-WMO-ZABHA-NEXT: ret
4636;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4637; RV64IA-TSO-LABEL: cmpxchg_i32_seq_cst_monotonic:
4638; RV64IA-TSO: # %bb.0:
4639; RV64IA-TSO-NEXT: sext.w a1, a1
4640; RV64IA-TSO-NEXT: .LBB27_1: # =>This Inner Loop Header: Depth=1
4641; RV64IA-TSO-NEXT: lr.w.aqrl a3, (a0)
4642; RV64IA-TSO-NEXT: bne a3, a1, .LBB27_3
4643; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB27_1 Depth=1
4644; RV64IA-TSO-NEXT: sc.w.rl a4, a2, (a0)
4645; RV64IA-TSO-NEXT: bnez a4, .LBB27_1
4646; RV64IA-TSO-NEXT: .LBB27_3:
4647; RV64IA-TSO-NEXT: ret
4648;
4649; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_seq_cst_monotonic:
4650; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4651; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4652; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4653;
4654; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_seq_cst_monotonic:
4655; RV64IA-TSO-ZABHA: # %bb.0:
4656; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4657; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4658 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4659 ret void
4660}
4661
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4662define void @cmpxchg_i32_seq_cst_acquire(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4663; RV32I-LABEL: cmpxchg_i32_seq_cst_acquire:
4664; RV32I: # %bb.0:
4665; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4666; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4667; RV32I-NEXT: sw a1, 8(sp)
4668; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4669; RV32I-NEXT: li a3, 5
4670; RV32I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4671; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4672; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4673; RV32I-NEXT: addi sp, sp, 16
4674; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4675;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4676; RV32IA-WMO-LABEL: cmpxchg_i32_seq_cst_acquire:
4677; RV32IA-WMO: # %bb.0:
4678; RV32IA-WMO-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1
4679; RV32IA-WMO-NEXT: lr.w.aqrl a3, (a0)
4680; RV32IA-WMO-NEXT: bne a3, a1, .LBB28_3
4681; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB28_1 Depth=1
4682; RV32IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4683; RV32IA-WMO-NEXT: bnez a4, .LBB28_1
4684; RV32IA-WMO-NEXT: .LBB28_3:
4685; RV32IA-WMO-NEXT: ret
4686;
4687; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_seq_cst_acquire:
4688; RV32IA-WMO-ZACAS: # %bb.0:
4689; RV32IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4690; RV32IA-WMO-ZACAS-NEXT: ret
4691;
4692; RV32IA-TSO-LABEL: cmpxchg_i32_seq_cst_acquire:
4693; RV32IA-TSO: # %bb.0:
4694; RV32IA-TSO-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1
4695; RV32IA-TSO-NEXT: lr.w.aqrl a3, (a0)
4696; RV32IA-TSO-NEXT: bne a3, a1, .LBB28_3
4697; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB28_1 Depth=1
4698; RV32IA-TSO-NEXT: sc.w.rl a4, a2, (a0)
4699; RV32IA-TSO-NEXT: bnez a4, .LBB28_1
4700; RV32IA-TSO-NEXT: .LBB28_3:
4701; RV32IA-TSO-NEXT: ret
4702;
4703; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_seq_cst_acquire:
4704; RV32IA-TSO-ZACAS: # %bb.0:
4705; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4706; RV32IA-TSO-ZACAS-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4707;
4708; RV64I-LABEL: cmpxchg_i32_seq_cst_acquire:
4709; RV64I: # %bb.0:
4710; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4711; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4712; RV64I-NEXT: sw a1, 4(sp)
4713; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4714; RV64I-NEXT: li a3, 5
4715; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4716; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4717; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4718; RV64I-NEXT: addi sp, sp, 16
4719; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4720;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4721; RV64IA-WMO-LABEL: cmpxchg_i32_seq_cst_acquire:
4722; RV64IA-WMO: # %bb.0:
4723; RV64IA-WMO-NEXT: sext.w a1, a1
4724; RV64IA-WMO-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1
4725; RV64IA-WMO-NEXT: lr.w.aqrl a3, (a0)
4726; RV64IA-WMO-NEXT: bne a3, a1, .LBB28_3
4727; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB28_1 Depth=1
4728; RV64IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4729; RV64IA-WMO-NEXT: bnez a4, .LBB28_1
4730; RV64IA-WMO-NEXT: .LBB28_3:
4731; RV64IA-WMO-NEXT: ret
4732;
4733; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_seq_cst_acquire:
4734; RV64IA-WMO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4735; RV64IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4736; RV64IA-WMO-ZACAS-NEXT: ret
4737;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4738; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_seq_cst_acquire:
4739; RV64IA-WMO-ZABHA: # %bb.0:
4740; RV64IA-WMO-ZABHA-NEXT: amocas.w.aqrl a1, a2, (a0)
4741; RV64IA-WMO-ZABHA-NEXT: ret
4742;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4743; RV64IA-TSO-LABEL: cmpxchg_i32_seq_cst_acquire:
4744; RV64IA-TSO: # %bb.0:
4745; RV64IA-TSO-NEXT: sext.w a1, a1
4746; RV64IA-TSO-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1
4747; RV64IA-TSO-NEXT: lr.w.aqrl a3, (a0)
4748; RV64IA-TSO-NEXT: bne a3, a1, .LBB28_3
4749; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB28_1 Depth=1
4750; RV64IA-TSO-NEXT: sc.w.rl a4, a2, (a0)
4751; RV64IA-TSO-NEXT: bnez a4, .LBB28_1
4752; RV64IA-TSO-NEXT: .LBB28_3:
4753; RV64IA-TSO-NEXT: ret
4754;
4755; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_seq_cst_acquire:
4756; RV64IA-TSO-ZACAS: # %bb.0:
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4757; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4758; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4759;
4760; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_seq_cst_acquire:
4761; RV64IA-TSO-ZABHA: # %bb.0:
4762; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4763; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4764 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4765 ret void
4766}
4767
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4768define void @cmpxchg_i32_seq_cst_seq_cst(ptr %ptr, i32 %cmp, i32 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4769; RV32I-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4770; RV32I: # %bb.0:
4771; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4772; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4773; RV32I-NEXT: sw a1, 8(sp)
4774; RV32I-NEXT: addi a1, sp, 8
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4775; RV32I-NEXT: li a3, 5
4776; RV32I-NEXT: li a4, 5
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4777; RV32I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4778; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4779; RV32I-NEXT: addi sp, sp, 16
4780; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4781;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4782; RV32IA-WMO-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4783; RV32IA-WMO: # %bb.0:
4784; RV32IA-WMO-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1
4785; RV32IA-WMO-NEXT: lr.w.aqrl a3, (a0)
4786; RV32IA-WMO-NEXT: bne a3, a1, .LBB29_3
4787; RV32IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB29_1 Depth=1
4788; RV32IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4789; RV32IA-WMO-NEXT: bnez a4, .LBB29_1
4790; RV32IA-WMO-NEXT: .LBB29_3:
4791; RV32IA-WMO-NEXT: ret
4792;
4793; RV32IA-WMO-ZACAS-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4794; RV32IA-WMO-ZACAS: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]4795; RV32IA-WMO-ZACAS-NEXT: fence rw, rw
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4796; RV32IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4797; RV32IA-WMO-ZACAS-NEXT: ret
4798;
4799; RV32IA-TSO-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4800; RV32IA-TSO: # %bb.0:
4801; RV32IA-TSO-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1
4802; RV32IA-TSO-NEXT: lr.w.aqrl a3, (a0)
4803; RV32IA-TSO-NEXT: bne a3, a1, .LBB29_3
4804; RV32IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB29_1 Depth=1
4805; RV32IA-TSO-NEXT: sc.w.rl a4, a2, (a0)
4806; RV32IA-TSO-NEXT: bnez a4, .LBB29_1
4807; RV32IA-TSO-NEXT: .LBB29_3:
4808; RV32IA-TSO-NEXT: ret
4809;
4810; RV32IA-TSO-ZACAS-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4811; RV32IA-TSO-ZACAS: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]4812; RV32IA-TSO-ZACAS-NEXT: fence rw, rw
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4813; RV32IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4814; RV32IA-TSO-ZACAS-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4815;
4816; RV64I-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4817; RV64I: # %bb.0:
4818; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4819; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4820; RV64I-NEXT: sw a1, 4(sp)
4821; RV64I-NEXT: addi a1, sp, 4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4822; RV64I-NEXT: li a3, 5
4823; RV64I-NEXT: li a4, 5
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4824; RV64I-NEXT: call __atomic_compare_exchange_4
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4825; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4826; RV64I-NEXT: addi sp, sp, 16
4827; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4828;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4829; RV64IA-WMO-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4830; RV64IA-WMO: # %bb.0:
4831; RV64IA-WMO-NEXT: sext.w a1, a1
4832; RV64IA-WMO-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1
4833; RV64IA-WMO-NEXT: lr.w.aqrl a3, (a0)
4834; RV64IA-WMO-NEXT: bne a3, a1, .LBB29_3
4835; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB29_1 Depth=1
4836; RV64IA-WMO-NEXT: sc.w.rl a4, a2, (a0)
4837; RV64IA-WMO-NEXT: bnez a4, .LBB29_1
4838; RV64IA-WMO-NEXT: .LBB29_3:
4839; RV64IA-WMO-NEXT: ret
4840;
4841; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4842; RV64IA-WMO-ZACAS: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]4843; RV64IA-WMO-ZACAS-NEXT: fence rw, rw
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4844; RV64IA-WMO-ZACAS-NEXT: amocas.w.aqrl a1, a2, (a0)
4845; RV64IA-WMO-ZACAS-NEXT: ret
4846;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4847; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4848; RV64IA-WMO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]4849; RV64IA-WMO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4850; RV64IA-WMO-ZABHA-NEXT: amocas.w.aqrl a1, a2, (a0)
4851; RV64IA-WMO-ZABHA-NEXT: ret
4852;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4853; RV64IA-TSO-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4854; RV64IA-TSO: # %bb.0:
4855; RV64IA-TSO-NEXT: sext.w a1, a1
4856; RV64IA-TSO-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1
4857; RV64IA-TSO-NEXT: lr.w.aqrl a3, (a0)
4858; RV64IA-TSO-NEXT: bne a3, a1, .LBB29_3
4859; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB29_1 Depth=1
4860; RV64IA-TSO-NEXT: sc.w.rl a4, a2, (a0)
4861; RV64IA-TSO-NEXT: bnez a4, .LBB29_1
4862; RV64IA-TSO-NEXT: .LBB29_3:
4863; RV64IA-TSO-NEXT: ret
4864;
4865; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4866; RV64IA-TSO-ZACAS: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]4867; RV64IA-TSO-ZACAS-NEXT: fence rw, rw
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4868; RV64IA-TSO-ZACAS-NEXT: amocas.w a1, a2, (a0)
4869; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4870;
4871; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i32_seq_cst_seq_cst:
4872; RV64IA-TSO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]4873; RV64IA-TSO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4874; RV64IA-TSO-ZABHA-NEXT: amocas.w a1, a2, (a0)
4875; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4876 %res = cmpxchg ptr %ptr, i32 %cmp, i32 %val seq_cst seq_cst
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4877 ret void
4878}
4879
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4880define void @cmpxchg_i64_monotonic_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4881; RV32I-LABEL: cmpxchg_i64_monotonic_monotonic:
4882; RV32I: # %bb.0:
4883; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4884; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4885; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]4886; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4887; RV32I-NEXT: mv a1, sp
4888; RV32I-NEXT: mv a2, a3
4889; RV32I-NEXT: mv a3, a4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4890; RV32I-NEXT: li a4, 0
4891; RV32I-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4892; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4893; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4894; RV32I-NEXT: addi sp, sp, 16
4895; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4896;
4897; RV32IA-LABEL: cmpxchg_i64_monotonic_monotonic:
4898; RV32IA: # %bb.0:
4899; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4900; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4901; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]4902; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4903; RV32IA-NEXT: mv a1, sp
4904; RV32IA-NEXT: mv a2, a3
4905; RV32IA-NEXT: mv a3, a4
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4906; RV32IA-NEXT: li a4, 0
4907; RV32IA-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4908; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4909; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4910; RV32IA-NEXT: addi sp, sp, 16
4911; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4912;
4913; RV64I-LABEL: cmpxchg_i64_monotonic_monotonic:
4914; RV64I: # %bb.0:
4915; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4916; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4917; RV64I-NEXT: sd a1, 0(sp)
4918; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4919; RV64I-NEXT: li a3, 0
4920; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4921; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4922; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4923; RV64I-NEXT: addi sp, sp, 16
4924; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]4925;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4926; RV64IA-WMO-LABEL: cmpxchg_i64_monotonic_monotonic:
4927; RV64IA-WMO: # %bb.0:
4928; RV64IA-WMO-NEXT: .LBB30_1: # =>This Inner Loop Header: Depth=1
4929; RV64IA-WMO-NEXT: lr.d a3, (a0)
4930; RV64IA-WMO-NEXT: bne a3, a1, .LBB30_3
4931; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB30_1 Depth=1
4932; RV64IA-WMO-NEXT: sc.d a4, a2, (a0)
4933; RV64IA-WMO-NEXT: bnez a4, .LBB30_1
4934; RV64IA-WMO-NEXT: .LBB30_3:
4935; RV64IA-WMO-NEXT: ret
4936;
4937; RV64IA-ZACAS-LABEL: cmpxchg_i64_monotonic_monotonic:
4938; RV64IA-ZACAS: # %bb.0:
4939; RV64IA-ZACAS-NEXT: amocas.d a1, a2, (a0)
4940; RV64IA-ZACAS-NEXT: ret
4941;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]4942; RV64IA-ZABHA-LABEL: cmpxchg_i64_monotonic_monotonic:
4943; RV64IA-ZABHA: # %bb.0:
4944; RV64IA-ZABHA-NEXT: amocas.d a1, a2, (a0)
4945; RV64IA-ZABHA-NEXT: ret
4946;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]4947; RV64IA-TSO-LABEL: cmpxchg_i64_monotonic_monotonic:
4948; RV64IA-TSO: # %bb.0:
4949; RV64IA-TSO-NEXT: .LBB30_1: # =>This Inner Loop Header: Depth=1
4950; RV64IA-TSO-NEXT: lr.d a3, (a0)
4951; RV64IA-TSO-NEXT: bne a3, a1, .LBB30_3
4952; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB30_1 Depth=1
4953; RV64IA-TSO-NEXT: sc.d a4, a2, (a0)
4954; RV64IA-TSO-NEXT: bnez a4, .LBB30_1
4955; RV64IA-TSO-NEXT: .LBB30_3:
4956; RV64IA-TSO-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4957 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val monotonic monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4958 ret void
4959}
4960
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]4961define void @cmpxchg_i64_acquire_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4962; RV32I-LABEL: cmpxchg_i64_acquire_monotonic:
4963; RV32I: # %bb.0:
4964; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4965; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]4966; RV32I-NEXT: mv a5, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4967; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]4968; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4969; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4970; RV32I-NEXT: li a4, 2
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4971; RV32I-NEXT: mv a2, a3
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]4972; RV32I-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4973; RV32I-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4974; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4975; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4976; RV32I-NEXT: addi sp, sp, 16
4977; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4978;
4979; RV32IA-LABEL: cmpxchg_i64_acquire_monotonic:
4980; RV32IA: # %bb.0:
4981; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4982; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]4983; RV32IA-NEXT: mv a5, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4984; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]4985; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4986; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4987; RV32IA-NEXT: li a4, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]4988; RV32IA-NEXT: mv a2, a3
4989; RV32IA-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]4990; RV32IA-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]4991; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4992; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]4993; RV32IA-NEXT: addi sp, sp, 16
4994; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]4995;
4996; RV64I-LABEL: cmpxchg_i64_acquire_monotonic:
4997; RV64I: # %bb.0:
4998; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]4999; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5000; RV64I-NEXT: sd a1, 0(sp)
5001; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5002; RV64I-NEXT: li a3, 2
5003; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5004; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5005; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5006; RV64I-NEXT: addi sp, sp, 16
5007; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5008;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5009; RV64IA-WMO-LABEL: cmpxchg_i64_acquire_monotonic:
5010; RV64IA-WMO: # %bb.0:
5011; RV64IA-WMO-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1
5012; RV64IA-WMO-NEXT: lr.d.aq a3, (a0)
5013; RV64IA-WMO-NEXT: bne a3, a1, .LBB31_3
5014; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB31_1 Depth=1
5015; RV64IA-WMO-NEXT: sc.d a4, a2, (a0)
5016; RV64IA-WMO-NEXT: bnez a4, .LBB31_1
5017; RV64IA-WMO-NEXT: .LBB31_3:
5018; RV64IA-WMO-NEXT: ret
5019;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5020; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_acquire_monotonic:
5021; RV64IA-WMO-ZACAS: # %bb.0:
5022; RV64IA-WMO-ZACAS-NEXT: amocas.d.aq a1, a2, (a0)
5023; RV64IA-WMO-ZACAS-NEXT: ret
5024;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5025; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acquire_monotonic:
5026; RV64IA-WMO-ZABHA: # %bb.0:
5027; RV64IA-WMO-ZABHA-NEXT: amocas.d.aq a1, a2, (a0)
5028; RV64IA-WMO-ZABHA-NEXT: ret
5029;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5030; RV64IA-TSO-LABEL: cmpxchg_i64_acquire_monotonic:
5031; RV64IA-TSO: # %bb.0:
5032; RV64IA-TSO-NEXT: .LBB31_1: # =>This Inner Loop Header: Depth=1
5033; RV64IA-TSO-NEXT: lr.d a3, (a0)
5034; RV64IA-TSO-NEXT: bne a3, a1, .LBB31_3
5035; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB31_1 Depth=1
5036; RV64IA-TSO-NEXT: sc.d a4, a2, (a0)
5037; RV64IA-TSO-NEXT: bnez a4, .LBB31_1
5038; RV64IA-TSO-NEXT: .LBB31_3:
5039; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5040;
5041; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_acquire_monotonic:
5042; RV64IA-TSO-ZACAS: # %bb.0:
5043; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5044; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5045;
5046; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acquire_monotonic:
5047; RV64IA-TSO-ZABHA: # %bb.0:
5048; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5049; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5050 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acquire monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5051 ret void
5052}
5053
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5054define void @cmpxchg_i64_acquire_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5055; RV32I-LABEL: cmpxchg_i64_acquire_acquire:
5056; RV32I: # %bb.0:
5057; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5058; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5059; RV32I-NEXT: mv a6, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5060; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5061; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5062; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5063; RV32I-NEXT: li a4, 2
5064; RV32I-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5065; RV32I-NEXT: mv a2, a3
5066; RV32I-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5067; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5068; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5069; RV32I-NEXT: addi sp, sp, 16
5070; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5071;
5072; RV32IA-LABEL: cmpxchg_i64_acquire_acquire:
5073; RV32IA: # %bb.0:
5074; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5075; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5076; RV32IA-NEXT: mv a6, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5077; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5078; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5079; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5080; RV32IA-NEXT: li a4, 2
5081; RV32IA-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5082; RV32IA-NEXT: mv a2, a3
5083; RV32IA-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5084; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5085; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5086; RV32IA-NEXT: addi sp, sp, 16
5087; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5088;
5089; RV64I-LABEL: cmpxchg_i64_acquire_acquire:
5090; RV64I: # %bb.0:
5091; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5092; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5093; RV64I-NEXT: sd a1, 0(sp)
5094; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5095; RV64I-NEXT: li a3, 2
5096; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5097; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5098; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5099; RV64I-NEXT: addi sp, sp, 16
5100; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5101;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5102; RV64IA-WMO-LABEL: cmpxchg_i64_acquire_acquire:
5103; RV64IA-WMO: # %bb.0:
5104; RV64IA-WMO-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1
5105; RV64IA-WMO-NEXT: lr.d.aq a3, (a0)
5106; RV64IA-WMO-NEXT: bne a3, a1, .LBB32_3
5107; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB32_1 Depth=1
5108; RV64IA-WMO-NEXT: sc.d a4, a2, (a0)
5109; RV64IA-WMO-NEXT: bnez a4, .LBB32_1
5110; RV64IA-WMO-NEXT: .LBB32_3:
5111; RV64IA-WMO-NEXT: ret
5112;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5113; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_acquire_acquire:
5114; RV64IA-WMO-ZACAS: # %bb.0:
5115; RV64IA-WMO-ZACAS-NEXT: amocas.d.aq a1, a2, (a0)
5116; RV64IA-WMO-ZACAS-NEXT: ret
5117;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5118; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acquire_acquire:
5119; RV64IA-WMO-ZABHA: # %bb.0:
5120; RV64IA-WMO-ZABHA-NEXT: amocas.d.aq a1, a2, (a0)
5121; RV64IA-WMO-ZABHA-NEXT: ret
5122;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5123; RV64IA-TSO-LABEL: cmpxchg_i64_acquire_acquire:
5124; RV64IA-TSO: # %bb.0:
5125; RV64IA-TSO-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1
5126; RV64IA-TSO-NEXT: lr.d a3, (a0)
5127; RV64IA-TSO-NEXT: bne a3, a1, .LBB32_3
5128; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB32_1 Depth=1
5129; RV64IA-TSO-NEXT: sc.d a4, a2, (a0)
5130; RV64IA-TSO-NEXT: bnez a4, .LBB32_1
5131; RV64IA-TSO-NEXT: .LBB32_3:
5132; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5133;
5134; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_acquire_acquire:
5135; RV64IA-TSO-ZACAS: # %bb.0:
5136; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5137; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5138;
5139; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acquire_acquire:
5140; RV64IA-TSO-ZABHA: # %bb.0:
5141; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5142; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5143 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acquire acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5144 ret void
5145}
5146
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5147define void @cmpxchg_i64_release_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5148; RV32I-LABEL: cmpxchg_i64_release_monotonic:
5149; RV32I: # %bb.0:
5150; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5151; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5152; RV32I-NEXT: mv a5, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5153; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5154; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5155; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5156; RV32I-NEXT: li a4, 3
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5157; RV32I-NEXT: mv a2, a3
5158; RV32I-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5159; RV32I-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5160; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5161; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5162; RV32I-NEXT: addi sp, sp, 16
5163; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5164;
5165; RV32IA-LABEL: cmpxchg_i64_release_monotonic:
5166; RV32IA: # %bb.0:
5167; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5168; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5169; RV32IA-NEXT: mv a5, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5170; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5171; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5172; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5173; RV32IA-NEXT: li a4, 3
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5174; RV32IA-NEXT: mv a2, a3
5175; RV32IA-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5176; RV32IA-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5177; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5178; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5179; RV32IA-NEXT: addi sp, sp, 16
5180; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5181;
5182; RV64I-LABEL: cmpxchg_i64_release_monotonic:
5183; RV64I: # %bb.0:
5184; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5185; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5186; RV64I-NEXT: sd a1, 0(sp)
5187; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5188; RV64I-NEXT: li a3, 3
5189; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5190; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5191; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5192; RV64I-NEXT: addi sp, sp, 16
5193; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5194;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5195; RV64IA-WMO-LABEL: cmpxchg_i64_release_monotonic:
5196; RV64IA-WMO: # %bb.0:
5197; RV64IA-WMO-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1
5198; RV64IA-WMO-NEXT: lr.d a3, (a0)
5199; RV64IA-WMO-NEXT: bne a3, a1, .LBB33_3
5200; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB33_1 Depth=1
5201; RV64IA-WMO-NEXT: sc.d.rl a4, a2, (a0)
5202; RV64IA-WMO-NEXT: bnez a4, .LBB33_1
5203; RV64IA-WMO-NEXT: .LBB33_3:
5204; RV64IA-WMO-NEXT: ret
5205;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5206; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_release_monotonic:
5207; RV64IA-WMO-ZACAS: # %bb.0:
5208; RV64IA-WMO-ZACAS-NEXT: amocas.d.rl a1, a2, (a0)
5209; RV64IA-WMO-ZACAS-NEXT: ret
5210;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5211; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_release_monotonic:
5212; RV64IA-WMO-ZABHA: # %bb.0:
5213; RV64IA-WMO-ZABHA-NEXT: amocas.d.rl a1, a2, (a0)
5214; RV64IA-WMO-ZABHA-NEXT: ret
5215;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5216; RV64IA-TSO-LABEL: cmpxchg_i64_release_monotonic:
5217; RV64IA-TSO: # %bb.0:
5218; RV64IA-TSO-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1
5219; RV64IA-TSO-NEXT: lr.d a3, (a0)
5220; RV64IA-TSO-NEXT: bne a3, a1, .LBB33_3
5221; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB33_1 Depth=1
5222; RV64IA-TSO-NEXT: sc.d a4, a2, (a0)
5223; RV64IA-TSO-NEXT: bnez a4, .LBB33_1
5224; RV64IA-TSO-NEXT: .LBB33_3:
5225; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5226;
5227; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_release_monotonic:
5228; RV64IA-TSO-ZACAS: # %bb.0:
5229; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5230; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5231;
5232; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_release_monotonic:
5233; RV64IA-TSO-ZABHA: # %bb.0:
5234; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5235; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5236 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val release monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5237 ret void
5238}
5239
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5240define void @cmpxchg_i64_release_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5241; RV32I-LABEL: cmpxchg_i64_release_acquire:
5242; RV32I: # %bb.0:
5243; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5244; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5245; RV32I-NEXT: mv a6, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5246; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5247; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5248; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5249; RV32I-NEXT: li a4, 3
5250; RV32I-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5251; RV32I-NEXT: mv a2, a3
5252; RV32I-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5253; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5254; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5255; RV32I-NEXT: addi sp, sp, 16
5256; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5257;
5258; RV32IA-LABEL: cmpxchg_i64_release_acquire:
5259; RV32IA: # %bb.0:
5260; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5261; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5262; RV32IA-NEXT: mv a6, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5263; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5264; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5265; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5266; RV32IA-NEXT: li a4, 3
5267; RV32IA-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5268; RV32IA-NEXT: mv a2, a3
5269; RV32IA-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5270; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5271; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5272; RV32IA-NEXT: addi sp, sp, 16
5273; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5274;
5275; RV64I-LABEL: cmpxchg_i64_release_acquire:
5276; RV64I: # %bb.0:
5277; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5278; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5279; RV64I-NEXT: sd a1, 0(sp)
5280; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5281; RV64I-NEXT: li a3, 3
5282; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5283; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5284; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5285; RV64I-NEXT: addi sp, sp, 16
5286; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5287;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5288; RV64IA-WMO-LABEL: cmpxchg_i64_release_acquire:
5289; RV64IA-WMO: # %bb.0:
5290; RV64IA-WMO-NEXT: .LBB34_1: # =>This Inner Loop Header: Depth=1
5291; RV64IA-WMO-NEXT: lr.d.aq a3, (a0)
5292; RV64IA-WMO-NEXT: bne a3, a1, .LBB34_3
5293; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB34_1 Depth=1
5294; RV64IA-WMO-NEXT: sc.d.rl a4, a2, (a0)
5295; RV64IA-WMO-NEXT: bnez a4, .LBB34_1
5296; RV64IA-WMO-NEXT: .LBB34_3:
5297; RV64IA-WMO-NEXT: ret
5298;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5299; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_release_acquire:
5300; RV64IA-WMO-ZACAS: # %bb.0:
5301; RV64IA-WMO-ZACAS-NEXT: amocas.d.aqrl a1, a2, (a0)
5302; RV64IA-WMO-ZACAS-NEXT: ret
5303;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5304; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_release_acquire:
5305; RV64IA-WMO-ZABHA: # %bb.0:
5306; RV64IA-WMO-ZABHA-NEXT: amocas.d.aqrl a1, a2, (a0)
5307; RV64IA-WMO-ZABHA-NEXT: ret
5308;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5309; RV64IA-TSO-LABEL: cmpxchg_i64_release_acquire:
5310; RV64IA-TSO: # %bb.0:
5311; RV64IA-TSO-NEXT: .LBB34_1: # =>This Inner Loop Header: Depth=1
5312; RV64IA-TSO-NEXT: lr.d a3, (a0)
5313; RV64IA-TSO-NEXT: bne a3, a1, .LBB34_3
5314; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB34_1 Depth=1
5315; RV64IA-TSO-NEXT: sc.d a4, a2, (a0)
5316; RV64IA-TSO-NEXT: bnez a4, .LBB34_1
5317; RV64IA-TSO-NEXT: .LBB34_3:
5318; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5319;
5320; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_release_acquire:
5321; RV64IA-TSO-ZACAS: # %bb.0:
5322; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5323; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5324;
5325; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_release_acquire:
5326; RV64IA-TSO-ZABHA: # %bb.0:
5327; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5328; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5329 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val release acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5330 ret void
5331}
5332
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5333define void @cmpxchg_i64_acq_rel_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5334; RV32I-LABEL: cmpxchg_i64_acq_rel_monotonic:
5335; RV32I: # %bb.0:
5336; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5337; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5338; RV32I-NEXT: mv a5, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5339; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5340; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5341; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5342; RV32I-NEXT: li a4, 4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5343; RV32I-NEXT: mv a2, a3
5344; RV32I-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5345; RV32I-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5346; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5347; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5348; RV32I-NEXT: addi sp, sp, 16
5349; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5350;
5351; RV32IA-LABEL: cmpxchg_i64_acq_rel_monotonic:
5352; RV32IA: # %bb.0:
5353; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5354; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5355; RV32IA-NEXT: mv a5, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5356; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5357; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5358; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5359; RV32IA-NEXT: li a4, 4
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5360; RV32IA-NEXT: mv a2, a3
5361; RV32IA-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5362; RV32IA-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5363; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5364; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5365; RV32IA-NEXT: addi sp, sp, 16
5366; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5367;
5368; RV64I-LABEL: cmpxchg_i64_acq_rel_monotonic:
5369; RV64I: # %bb.0:
5370; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5371; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5372; RV64I-NEXT: sd a1, 0(sp)
5373; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5374; RV64I-NEXT: li a3, 4
5375; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5376; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5377; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5378; RV64I-NEXT: addi sp, sp, 16
5379; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5380;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5381; RV64IA-WMO-LABEL: cmpxchg_i64_acq_rel_monotonic:
5382; RV64IA-WMO: # %bb.0:
5383; RV64IA-WMO-NEXT: .LBB35_1: # =>This Inner Loop Header: Depth=1
5384; RV64IA-WMO-NEXT: lr.d.aq a3, (a0)
5385; RV64IA-WMO-NEXT: bne a3, a1, .LBB35_3
5386; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB35_1 Depth=1
5387; RV64IA-WMO-NEXT: sc.d.rl a4, a2, (a0)
5388; RV64IA-WMO-NEXT: bnez a4, .LBB35_1
5389; RV64IA-WMO-NEXT: .LBB35_3:
5390; RV64IA-WMO-NEXT: ret
5391;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5392; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_acq_rel_monotonic:
5393; RV64IA-WMO-ZACAS: # %bb.0:
5394; RV64IA-WMO-ZACAS-NEXT: amocas.d.aqrl a1, a2, (a0)
5395; RV64IA-WMO-ZACAS-NEXT: ret
5396;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5397; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acq_rel_monotonic:
5398; RV64IA-WMO-ZABHA: # %bb.0:
5399; RV64IA-WMO-ZABHA-NEXT: amocas.d.aqrl a1, a2, (a0)
5400; RV64IA-WMO-ZABHA-NEXT: ret
5401;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5402; RV64IA-TSO-LABEL: cmpxchg_i64_acq_rel_monotonic:
5403; RV64IA-TSO: # %bb.0:
5404; RV64IA-TSO-NEXT: .LBB35_1: # =>This Inner Loop Header: Depth=1
5405; RV64IA-TSO-NEXT: lr.d a3, (a0)
5406; RV64IA-TSO-NEXT: bne a3, a1, .LBB35_3
5407; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB35_1 Depth=1
5408; RV64IA-TSO-NEXT: sc.d a4, a2, (a0)
5409; RV64IA-TSO-NEXT: bnez a4, .LBB35_1
5410; RV64IA-TSO-NEXT: .LBB35_3:
5411; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5412;
5413; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_acq_rel_monotonic:
5414; RV64IA-TSO-ZACAS: # %bb.0:
5415; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5416; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5417;
5418; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acq_rel_monotonic:
5419; RV64IA-TSO-ZABHA: # %bb.0:
5420; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5421; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5422 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acq_rel monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5423 ret void
5424}
5425
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5426define void @cmpxchg_i64_acq_rel_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5427; RV32I-LABEL: cmpxchg_i64_acq_rel_acquire:
5428; RV32I: # %bb.0:
5429; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5430; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5431; RV32I-NEXT: mv a6, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5432; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5433; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5434; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5435; RV32I-NEXT: li a4, 4
5436; RV32I-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5437; RV32I-NEXT: mv a2, a3
5438; RV32I-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5439; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5440; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5441; RV32I-NEXT: addi sp, sp, 16
5442; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5443;
5444; RV32IA-LABEL: cmpxchg_i64_acq_rel_acquire:
5445; RV32IA: # %bb.0:
5446; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5447; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5448; RV32IA-NEXT: mv a6, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5449; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5450; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5451; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5452; RV32IA-NEXT: li a4, 4
5453; RV32IA-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5454; RV32IA-NEXT: mv a2, a3
5455; RV32IA-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5456; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5457; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5458; RV32IA-NEXT: addi sp, sp, 16
5459; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5460;
5461; RV64I-LABEL: cmpxchg_i64_acq_rel_acquire:
5462; RV64I: # %bb.0:
5463; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5464; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5465; RV64I-NEXT: sd a1, 0(sp)
5466; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5467; RV64I-NEXT: li a3, 4
5468; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5469; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5470; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5471; RV64I-NEXT: addi sp, sp, 16
5472; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5473;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5474; RV64IA-WMO-LABEL: cmpxchg_i64_acq_rel_acquire:
5475; RV64IA-WMO: # %bb.0:
5476; RV64IA-WMO-NEXT: .LBB36_1: # =>This Inner Loop Header: Depth=1
5477; RV64IA-WMO-NEXT: lr.d.aq a3, (a0)
5478; RV64IA-WMO-NEXT: bne a3, a1, .LBB36_3
5479; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB36_1 Depth=1
5480; RV64IA-WMO-NEXT: sc.d.rl a4, a2, (a0)
5481; RV64IA-WMO-NEXT: bnez a4, .LBB36_1
5482; RV64IA-WMO-NEXT: .LBB36_3:
5483; RV64IA-WMO-NEXT: ret
5484;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5485; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_acq_rel_acquire:
5486; RV64IA-WMO-ZACAS: # %bb.0:
5487; RV64IA-WMO-ZACAS-NEXT: amocas.d.aqrl a1, a2, (a0)
5488; RV64IA-WMO-ZACAS-NEXT: ret
5489;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5490; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_acq_rel_acquire:
5491; RV64IA-WMO-ZABHA: # %bb.0:
5492; RV64IA-WMO-ZABHA-NEXT: amocas.d.aqrl a1, a2, (a0)
5493; RV64IA-WMO-ZABHA-NEXT: ret
5494;
Patrick O'Neillfcad2bb2023-08-10 15:58:19 +0100[diff] [blame]5495; RV64IA-TSO-LABEL: cmpxchg_i64_acq_rel_acquire:
5496; RV64IA-TSO: # %bb.0:
5497; RV64IA-TSO-NEXT: .LBB36_1: # =>This Inner Loop Header: Depth=1
5498; RV64IA-TSO-NEXT: lr.d a3, (a0)
5499; RV64IA-TSO-NEXT: bne a3, a1, .LBB36_3
5500; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB36_1 Depth=1
5501; RV64IA-TSO-NEXT: sc.d a4, a2, (a0)
5502; RV64IA-TSO-NEXT: bnez a4, .LBB36_1
5503; RV64IA-TSO-NEXT: .LBB36_3:
5504; RV64IA-TSO-NEXT: ret
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5505;
5506; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_acq_rel_acquire:
5507; RV64IA-TSO-ZACAS: # %bb.0:
5508; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5509; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5510;
5511; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_acq_rel_acquire:
5512; RV64IA-TSO-ZABHA: # %bb.0:
5513; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5514; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5515 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val acq_rel acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5516 ret void
5517}
5518
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5519define void @cmpxchg_i64_seq_cst_monotonic(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5520; RV32I-LABEL: cmpxchg_i64_seq_cst_monotonic:
5521; RV32I: # %bb.0:
5522; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5523; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5524; RV32I-NEXT: mv a5, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5525; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5526; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5527; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5528; RV32I-NEXT: li a4, 5
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5529; RV32I-NEXT: mv a2, a3
5530; RV32I-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5531; RV32I-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5532; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5533; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5534; RV32I-NEXT: addi sp, sp, 16
5535; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5536;
5537; RV32IA-LABEL: cmpxchg_i64_seq_cst_monotonic:
5538; RV32IA: # %bb.0:
5539; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5540; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5541; RV32IA-NEXT: mv a5, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5542; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5543; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5544; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5545; RV32IA-NEXT: li a4, 5
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5546; RV32IA-NEXT: mv a2, a3
5547; RV32IA-NEXT: mv a3, a5
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5548; RV32IA-NEXT: li a5, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5549; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5550; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5551; RV32IA-NEXT: addi sp, sp, 16
5552; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5553;
5554; RV64I-LABEL: cmpxchg_i64_seq_cst_monotonic:
5555; RV64I: # %bb.0:
5556; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5557; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5558; RV64I-NEXT: sd a1, 0(sp)
5559; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5560; RV64I-NEXT: li a3, 5
5561; RV64I-NEXT: li a4, 0
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5562; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5563; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5564; RV64I-NEXT: addi sp, sp, 16
5565; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5566;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5567; RV64IA-WMO-LABEL: cmpxchg_i64_seq_cst_monotonic:
5568; RV64IA-WMO: # %bb.0:
5569; RV64IA-WMO-NEXT: .LBB37_1: # =>This Inner Loop Header: Depth=1
5570; RV64IA-WMO-NEXT: lr.d.aqrl a3, (a0)
5571; RV64IA-WMO-NEXT: bne a3, a1, .LBB37_3
5572; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB37_1 Depth=1
5573; RV64IA-WMO-NEXT: sc.d.rl a4, a2, (a0)
5574; RV64IA-WMO-NEXT: bnez a4, .LBB37_1
5575; RV64IA-WMO-NEXT: .LBB37_3:
5576; RV64IA-WMO-NEXT: ret
5577;
5578; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_seq_cst_monotonic:
5579; RV64IA-WMO-ZACAS: # %bb.0:
5580; RV64IA-WMO-ZACAS-NEXT: amocas.d.aqrl a1, a2, (a0)
5581; RV64IA-WMO-ZACAS-NEXT: ret
5582;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5583; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_seq_cst_monotonic:
5584; RV64IA-WMO-ZABHA: # %bb.0:
5585; RV64IA-WMO-ZABHA-NEXT: amocas.d.aqrl a1, a2, (a0)
5586; RV64IA-WMO-ZABHA-NEXT: ret
5587;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5588; RV64IA-TSO-LABEL: cmpxchg_i64_seq_cst_monotonic:
5589; RV64IA-TSO: # %bb.0:
5590; RV64IA-TSO-NEXT: .LBB37_1: # =>This Inner Loop Header: Depth=1
5591; RV64IA-TSO-NEXT: lr.d.aqrl a3, (a0)
5592; RV64IA-TSO-NEXT: bne a3, a1, .LBB37_3
5593; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB37_1 Depth=1
5594; RV64IA-TSO-NEXT: sc.d.rl a4, a2, (a0)
5595; RV64IA-TSO-NEXT: bnez a4, .LBB37_1
5596; RV64IA-TSO-NEXT: .LBB37_3:
5597; RV64IA-TSO-NEXT: ret
5598;
5599; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_seq_cst_monotonic:
5600; RV64IA-TSO-ZACAS: # %bb.0:
5601; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5602; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5603;
5604; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_seq_cst_monotonic:
5605; RV64IA-TSO-ZABHA: # %bb.0:
5606; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5607; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5608 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst monotonic
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5609 ret void
5610}
5611
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5612define void @cmpxchg_i64_seq_cst_acquire(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5613; RV32I-LABEL: cmpxchg_i64_seq_cst_acquire:
5614; RV32I: # %bb.0:
5615; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5616; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5617; RV32I-NEXT: mv a6, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5618; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5619; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5620; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5621; RV32I-NEXT: li a4, 5
5622; RV32I-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5623; RV32I-NEXT: mv a2, a3
5624; RV32I-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5625; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5626; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5627; RV32I-NEXT: addi sp, sp, 16
5628; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5629;
5630; RV32IA-LABEL: cmpxchg_i64_seq_cst_acquire:
5631; RV32IA: # %bb.0:
5632; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5633; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5634; RV32IA-NEXT: mv a6, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5635; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5636; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5637; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5638; RV32IA-NEXT: li a4, 5
5639; RV32IA-NEXT: li a5, 2
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5640; RV32IA-NEXT: mv a2, a3
5641; RV32IA-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5642; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5643; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5644; RV32IA-NEXT: addi sp, sp, 16
5645; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5646;
5647; RV64I-LABEL: cmpxchg_i64_seq_cst_acquire:
5648; RV64I: # %bb.0:
5649; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5650; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5651; RV64I-NEXT: sd a1, 0(sp)
5652; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5653; RV64I-NEXT: li a3, 5
5654; RV64I-NEXT: li a4, 2
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5655; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5656; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5657; RV64I-NEXT: addi sp, sp, 16
5658; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5659;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5660; RV64IA-WMO-LABEL: cmpxchg_i64_seq_cst_acquire:
5661; RV64IA-WMO: # %bb.0:
5662; RV64IA-WMO-NEXT: .LBB38_1: # =>This Inner Loop Header: Depth=1
5663; RV64IA-WMO-NEXT: lr.d.aqrl a3, (a0)
5664; RV64IA-WMO-NEXT: bne a3, a1, .LBB38_3
5665; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB38_1 Depth=1
5666; RV64IA-WMO-NEXT: sc.d.rl a4, a2, (a0)
5667; RV64IA-WMO-NEXT: bnez a4, .LBB38_1
5668; RV64IA-WMO-NEXT: .LBB38_3:
5669; RV64IA-WMO-NEXT: ret
5670;
5671; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_seq_cst_acquire:
5672; RV64IA-WMO-ZACAS: # %bb.0:
5673; RV64IA-WMO-ZACAS-NEXT: amocas.d.aqrl a1, a2, (a0)
5674; RV64IA-WMO-ZACAS-NEXT: ret
5675;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5676; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_seq_cst_acquire:
5677; RV64IA-WMO-ZABHA: # %bb.0:
5678; RV64IA-WMO-ZABHA-NEXT: amocas.d.aqrl a1, a2, (a0)
5679; RV64IA-WMO-ZABHA-NEXT: ret
5680;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5681; RV64IA-TSO-LABEL: cmpxchg_i64_seq_cst_acquire:
5682; RV64IA-TSO: # %bb.0:
5683; RV64IA-TSO-NEXT: .LBB38_1: # =>This Inner Loop Header: Depth=1
5684; RV64IA-TSO-NEXT: lr.d.aqrl a3, (a0)
5685; RV64IA-TSO-NEXT: bne a3, a1, .LBB38_3
5686; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB38_1 Depth=1
5687; RV64IA-TSO-NEXT: sc.d.rl a4, a2, (a0)
5688; RV64IA-TSO-NEXT: bnez a4, .LBB38_1
5689; RV64IA-TSO-NEXT: .LBB38_3:
5690; RV64IA-TSO-NEXT: ret
5691;
5692; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_seq_cst_acquire:
5693; RV64IA-TSO-ZACAS: # %bb.0:
5694; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5695; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5696;
5697; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_seq_cst_acquire:
5698; RV64IA-TSO-ZABHA: # %bb.0:
5699; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5700; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5701 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst acquire
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5702 ret void
5703}
5704
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5705define void @cmpxchg_i64_seq_cst_seq_cst(ptr %ptr, i64 %cmp, i64 %val) nounwind {
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5706; RV32I-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5707; RV32I: # %bb.0:
5708; RV32I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5709; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5710; RV32I-NEXT: mv a6, a4
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5711; RV32I-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5712; RV32I-NEXT: sw a2, 4(sp)
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5713; RV32I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5714; RV32I-NEXT: li a4, 5
5715; RV32I-NEXT: li a5, 5
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5716; RV32I-NEXT: mv a2, a3
5717; RV32I-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5718; RV32I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5719; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5720; RV32I-NEXT: addi sp, sp, 16
5721; RV32I-NEXT: ret
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5722;
5723; RV32IA-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5724; RV32IA: # %bb.0:
5725; RV32IA-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5726; RV32IA-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5727; RV32IA-NEXT: mv a6, a4
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5728; RV32IA-NEXT: sw a1, 0(sp)
Alex Bradbury2967e5f2024-10-11 20:25:53 +0100[diff] [blame]5729; RV32IA-NEXT: sw a2, 4(sp)
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5730; RV32IA-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5731; RV32IA-NEXT: li a4, 5
5732; RV32IA-NEXT: li a5, 5
Luis Marques3d0fbaf2019-09-17 11:15:35 +0000[diff] [blame]5733; RV32IA-NEXT: mv a2, a3
5734; RV32IA-NEXT: mv a3, a6
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5735; RV32IA-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5736; RV32IA-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
Alex Bradbury66d9a752018-11-29 20:43:42 +0000[diff] [blame]5737; RV32IA-NEXT: addi sp, sp, 16
5738; RV32IA-NEXT: ret
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5739;
5740; RV64I-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5741; RV64I: # %bb.0:
5742; RV64I-NEXT: addi sp, sp, -16
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5743; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5744; RV64I-NEXT: sd a1, 0(sp)
5745; RV64I-NEXT: mv a1, sp
wangpcaf0ecfc2021-11-22 14:01:37 +0800[diff] [blame]5746; RV64I-NEXT: li a3, 5
5747; RV64I-NEXT: li a4, 5
Fangrui Songeabaee02024-01-07 12:09:44 -0800[diff] [blame]5748; RV64I-NEXT: call __atomic_compare_exchange_8
Michael Mundaye28b6a62020-12-09 19:41:19 +0000[diff] [blame]5749; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
Alex Bradburyeea0b072019-01-11 19:46:48 +0000[diff] [blame]5750; RV64I-NEXT: addi sp, sp, 16
5751; RV64I-NEXT: ret
Alex Bradbury07f1c622019-01-17 10:04:39 +0000[diff] [blame]5752;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5753; RV64IA-WMO-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5754; RV64IA-WMO: # %bb.0:
5755; RV64IA-WMO-NEXT: .LBB39_1: # =>This Inner Loop Header: Depth=1
5756; RV64IA-WMO-NEXT: lr.d.aqrl a3, (a0)
5757; RV64IA-WMO-NEXT: bne a3, a1, .LBB39_3
5758; RV64IA-WMO-NEXT: # %bb.2: # in Loop: Header=BB39_1 Depth=1
5759; RV64IA-WMO-NEXT: sc.d.rl a4, a2, (a0)
5760; RV64IA-WMO-NEXT: bnez a4, .LBB39_1
5761; RV64IA-WMO-NEXT: .LBB39_3:
5762; RV64IA-WMO-NEXT: ret
5763;
5764; RV64IA-WMO-ZACAS-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5765; RV64IA-WMO-ZACAS: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]5766; RV64IA-WMO-ZACAS-NEXT: fence rw, rw
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5767; RV64IA-WMO-ZACAS-NEXT: amocas.d.aqrl a1, a2, (a0)
5768; RV64IA-WMO-ZACAS-NEXT: ret
5769;
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5770; RV64IA-WMO-ZABHA-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5771; RV64IA-WMO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]5772; RV64IA-WMO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5773; RV64IA-WMO-ZABHA-NEXT: amocas.d.aqrl a1, a2, (a0)
5774; RV64IA-WMO-ZABHA-NEXT: ret
5775;
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5776; RV64IA-TSO-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5777; RV64IA-TSO: # %bb.0:
5778; RV64IA-TSO-NEXT: .LBB39_1: # =>This Inner Loop Header: Depth=1
5779; RV64IA-TSO-NEXT: lr.d.aqrl a3, (a0)
5780; RV64IA-TSO-NEXT: bne a3, a1, .LBB39_3
5781; RV64IA-TSO-NEXT: # %bb.2: # in Loop: Header=BB39_1 Depth=1
5782; RV64IA-TSO-NEXT: sc.d.rl a4, a2, (a0)
5783; RV64IA-TSO-NEXT: bnez a4, .LBB39_1
5784; RV64IA-TSO-NEXT: .LBB39_3:
5785; RV64IA-TSO-NEXT: ret
5786;
5787; RV64IA-TSO-ZACAS-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5788; RV64IA-TSO-ZACAS: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]5789; RV64IA-TSO-ZACAS-NEXT: fence rw, rw
Craig Topper0a1b0662024-01-10 12:00:40 -0800[diff] [blame]5790; RV64IA-TSO-ZACAS-NEXT: amocas.d a1, a2, (a0)
5791; RV64IA-TSO-ZACAS-NEXT: ret
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5792;
5793; RV64IA-TSO-ZABHA-LABEL: cmpxchg_i64_seq_cst_seq_cst:
5794; RV64IA-TSO-ZABHA: # %bb.0:
Alex Bradbury0ee10e92024-09-19 13:39:56 +0100[diff] [blame]5795; RV64IA-TSO-ZABHA-NEXT: fence rw, rw
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5796; RV64IA-TSO-ZABHA-NEXT: amocas.d a1, a2, (a0)
5797; RV64IA-TSO-ZABHA-NEXT: ret
Nikita Popov1456b682022-12-19 13:00:01 +0100[diff] [blame]5798 %res = cmpxchg ptr %ptr, i64 %cmp, i64 %val seq_cst seq_cst
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5799 ret void
5800}
Yingwei Zhenga300a1a2024-02-16 15:35:09 +0800[diff] [blame]5801;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
5802; RV64IA: {{.*}}