test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir

# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s

--- |

  declare void @foo(i32)

  define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) {
  entry:
    %add = add nsw i32 %b, %a
    %add1 = add nsw i32 %add, %c
    %add2 = add nsw i32 %add1, %d
    tail call void @foo(i32 %add2)
    %add6 = add nsw i32 %add2, %add2
    ret i32 %add6
  }

...
---
name:            test
tracksRegLiveness: true
frameInfo:
  stackSize:       8
  adjustsStack:    true
  hasCalls:        true
fixedStack:
  - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 }
body: |
  bb.0.entry:
    PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
    CFI_INSTRUCTION def_cfa_offset 16
    ; CHECK: [[@LINE+1]]:28: expected a cfi register
    CFI_INSTRUCTION offset %0, -16
    %ebx = COPY %edi, implicit-def %rbx
    %ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
    %ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags
    %ebx = ADD32rr %ebx, killed %ecx, implicit-def dead %eflags
    %edi = COPY %ebx
    CALL64pcrel32 @foo, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp
    %eax = LEA64_32r killed %rbx, 1, %rbx, 0, _
    %rbx = POP64r implicit-def %rsp, implicit %rsp
    RETQ %eax
...