test/CodeGen/AArch64/GlobalISel/select-bswap.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s

--- |
  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

  define void @bswap_s32() { ret void }
  define void @bswap_s64() { ret void }
...

---
name:            bswap_s32
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }

body:             |
  bb.0:
    liveins: %w0

    ; CHECK-LABEL: name: bswap_s32
    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY %w0
    ; CHECK: [[REVWr:%[0-9]+]]:gpr32 = REVWr [[COPY]]
    ; CHECK: %w0 = COPY [[REVWr]]
    %0(s32) = COPY %w0
    %1(s32) = G_BSWAP %0
    %w0 = COPY %1
...

---
name:            bswap_s64
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }

body:             |
  bb.0:
    liveins: %x0

    ; CHECK-LABEL: name: bswap_s64
    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %x0
    ; CHECK: [[REVXr:%[0-9]+]]:gpr64 = REVXr [[COPY]]
    ; CHECK: %x0 = COPY [[REVXr]]
    %0(s64) = COPY %x0
    %1(s64) = G_BSWAP %0
    %x0 = COPY %1
...