test/CodeGen/AArch64/GlobalISel/regbankselect-reg_sequence.mir

# RUN: llc %s -mtriple aarch64-- -o - -run-pass regbankselect | FileCheck %s
--- |
  define void @foo() { ret void }
...
---
# CHECK-LABEL: foo
# Check that we produce a valid mapping for REG_SEQUENCE.
# This used to fail the RegisterBankInfo verify because
# we were using the exclusively the type of the definition
# whereas since REG_SEQUENCE are kind of target opcode
# their definition may not have a type.
#
# CHECK: id: 0, class: dd
name: foo
legalized: true
tracksRegLiveness: true
registers:
  - { id: 0, class: dd }
body: |
  bb.0:
    liveins: %d0, %d1

    %0 = REG_SEQUENCE %d0, %subreg.dsub0, %d1, %subreg.dsub1

...