test/CodeGen/AArch64/GlobalISel/legalize-simple.mir

# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s

--- |
  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
  target triple = "aarch64--"
  define void @test_simple() {
  entry:
    ret void
  next:
    ret void
  }
  define void @bitcast128() {
    ret void
  }
...

---
name:            test_simple
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
  - { id: 4, class: _ }
  - { id: 5, class: _ }
  - { id: 6, class: _ }
  - { id: 7, class: _ }
  - { id: 8, class: _ }
  - { id: 9, class: _ }
  - { id: 10, class: _ }
  - { id: 11, class: _ }
  - { id: 12, class: _ }
  - { id: 13, class: _ }
  - { id: 14, class: _ }
  - { id: 15, class: _ }
  - { id: 16, class: _ }
body: |
  bb.0.entry:
    liveins: %x0, %x1, %x2, %x3
    %0(s64) = COPY %x0

    %1(s1) = G_TRUNC %0
    %2(s8) = G_TRUNC %0
    %3(s16) = G_TRUNC %0
    %4(s32) = G_TRUNC %0

    ; CHECK-LABEL: name: test_simple
    ; CHECK: %5:_(p0) = G_INTTOPTR %0
    ; CHECK: %6:_(s64) = G_PTRTOINT %5
    %5(p0) = G_INTTOPTR %0
    %6(s64) = G_PTRTOINT %5

    ; CHECK: G_BRCOND %1(s1), %bb.1.next
    G_BRCOND %1, %bb.1.next

  bb.1.next:

    ; CHECK: [[LHS:%[0-9]+]]:_(s32) = G_TRUNC %0
    ; CHECK: [[RHS:%[0-9]+]]:_(s32) = G_TRUNC %0
    ; CHECK: [[RES:%[0-9]+]]:_(s32) = G_SELECT %1(s1), [[LHS]], [[RHS]]
    ; CHECK: %7:_(s1) = G_TRUNC [[RES]](s32)
    %7(s1) = G_SELECT %1, %1, %1

    ; CHECK: [[LHS:%[0-9]+]]:_(s32) = G_TRUNC %0
    ; CHECK: [[RHS:%[0-9]+]]:_(s32) = G_TRUNC %0
    ; CHECK: [[RES:%[0-9]+]]:_(s32) = G_SELECT %1(s1), [[LHS]], [[RHS]]
    ; CHECK: %8:_(s8) = G_TRUNC [[RES]](s32)
    %8(s8) = G_SELECT %1, %2, %2

    ; CHECK: [[LHS:%[0-9]+]]:_(s32) = G_TRUNC %0
    ; CHECK: [[RHS:%[0-9]+]]:_(s32) = G_TRUNC %0
    ; CHECK: [[RES:%[0-9]+]]:_(s32) = G_SELECT %1(s1), [[LHS]], [[RHS]]
    ; CHECK: %9:_(s16) = G_TRUNC [[RES]](s32)
    %9(s16) = G_SELECT %1, %3, %3

    %10(s32) = G_SELECT %1, %4, %4
    %11(s64) = G_SELECT %1, %0, %0

    ; CHECK: %12:_(<2 x s32>) = G_BITCAST %0
    ; CHECK: %13:_(s64) = G_BITCAST %12
    ; CHECK: %14:_(s32) = G_BITCAST %10
    ; CHECK: %15:_(<4 x s8>) = G_BITCAST %0
    ; CHECK: %16:_(<2 x s16>) = G_BITCAST %0
    %12(<2 x s32>) = G_BITCAST %0
    %13(s64) = G_BITCAST %12
    %14(s32) = G_BITCAST %10
    %15(<4 x s8>) = G_BITCAST %0
    %16(<2 x s16>) = G_BITCAST %0
...

---
name:            bitcast128
tracksRegLiveness: true
registers:
  - { id: 0, class: _}
  - { id: 1, class: _}
  - { id: 2, class: _}
  - { id: 3, class: _}
body:             |
  bb.1:
    liveins: %x0, %x1
    ; CHECK-LABEL: bitcast128
    ; This is legal and shouldn't be changed.
    ; CHECK: %2:_(<2 x s64>) = G_BITCAST %3(s128)
    %0(s64) = COPY %x0
    %1(s64) = COPY %x1
    %3(s128) = G_MERGE_VALUES %0(s64), %1(s64)
    %2(<2 x s64>) = G_BITCAST %3(s128)
    %q0 = COPY %2(<2 x s64>)
    RET_ReallyLR implicit %q0

...