test/CodeGen/X86/GlobalISel/select-ext-x86-64.mir

# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64

--- |
  define i64 @test_zext_i1(i8 %a) {
    %val = trunc i8 %a to i1
    %r = zext i1 %val to i64
    ret i64 %r
  }

  define i64 @test_sext_i8(i8 %val) {
    %r = sext i8 %val to i64
    ret i64 %r
  }

  define i64 @test_sext_i16(i16 %val) {
    %r = sext i16 %val to i64
    ret i64 %r
  }

...
---
name:            test_zext_i1
# ALL-LABEL: name:  test_zext_i1
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 2, class: gr64, preferred-register: '' }
# ALL-NEXT:   - { id: 3, class: gr64, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
# ALL:          %0 = COPY %dil
# ALL-NEXT:     %1 = COPY %0
# ALL-NEXT:     %3 = SUBREG_TO_REG 0, %1, 1
# ALL-NEXT:     %2 = AND64ri8 %3, 1, implicit-def %eflags
# ALL-NEXT:     %rax = COPY %2
# ALL-NEXT:     RET 0, implicit %rax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s1) = G_TRUNC %0(s8)
    %2(s64) = G_ZEXT %1(s1)
    %rax = COPY %2(s64)
    RET 0, implicit %rax

...
---
name:            test_sext_i8
# ALL-LABEL: name:  test_sext_i8
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr64, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
# ALL:          %0 = COPY %dil
# ALL-NEXT:     %1 = MOVSX64rr8 %0
# ALL-NEXT:     %rax = COPY %1
# ALL-NEXT:     RET 0, implicit %rax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s64) = G_SEXT %0(s8)
    %rax = COPY %1(s64)
    RET 0, implicit %rax

...
---
name:            test_sext_i16
# ALL-LABEL: name:  test_sext_i16
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr16, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr64, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
# ALL:          %0 = COPY %di
# ALL-NEXT:     %1 = MOVSX64rr16 %0
# ALL-NEXT:     %rax = COPY %1
# ALL-NEXT:     RET 0, implicit %rax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s16) = COPY %edi
    %1(s64) = G_SEXT %0(s16)
    %rax = COPY %1(s64)
    RET 0, implicit %rax

...