test/CodeGen/X86/GlobalISel/legalize-ext.mir

# RUN: llc -mtriple=i386-linux-gnu   -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
--- |

  define i8 @test_zext_i1toi8(i1 %a) {
    %r = zext i1 %a to i8
    ret i8 %r
  }

  define i16 @test_zext_i1toi16(i1 %a) {
    %r = zext i1 %a to i16
    ret i16 %r
  }

  define i32 @test_zext_i1(i8 %a) {
    %val = trunc i8 %a to i1
    %r = zext i1 %val to i32
    ret i32 %r
  }

  define i16 @test_zext_i8toi16(i8 %val) {
    %r = zext i8 %val to i16
    ret i16 %r
  }

  define i32 @test_zext_i8(i8 %val) {
    %r = zext i8 %val to i32
    ret i32 %r
  }

  define i32 @test_zext_i16(i16 %val) {
    %r = zext i16 %val to i32
    ret i32 %r
  }

  define i8 @test_sext_i1toi8(i1 %a) {
    %r = sext i1 %a to i8
    ret i8 %r
  }

  define i16 @test_sext_i1toi16(i1 %a) {
    %r = sext i1 %a to i16
    ret i16 %r
  }

  define i32 @test_sext_i1(i8 %a) {
    %val = trunc i8 %a to i1
    %r = sext i1 %val to i32
    ret i32 %r
  }

  define i16 @test_sext_i8toi16(i8 %val) {
    %r = sext i8 %val to i16
    ret i16 %r
  }

  define i32 @test_sext_i8(i8 %val) {
    %r = sext i8 %val to i32
    ret i32 %r
  }

  define i32 @test_sext_i16(i16 %val) {
    %r = sext i16 %val to i32
    ret i32 %r
  }

...
---
name:            test_zext_i1toi8
# ALL-LABEL: name:  test_zext_i1toi8
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
# ALL:          %0(s1) = COPY %edi
# ALL-NEXT:     %1(s8) = G_ZEXT %0(s1)
# ALL-NEXT:     %al = COPY %1(s8)
# ALL-NEXT:     RET 0, implicit %al
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s1) = COPY %edi
    %1(s8) = G_ZEXT %0(s1)
    %al = COPY %1(s8)
    RET 0, implicit %al

...
---
name:            test_zext_i1toi16
# ALL-LABEL: name:  test_zext_i1toi16
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
# ALL:          %0(s1) = COPY %edi
# ALL-NEXT:     %1(s16) = G_ZEXT %0(s1)
# ALL-NEXT:     %ax = COPY %1(s16)
# ALL-NEXT:     RET 0, implicit %ax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s1) = COPY %edi
    %1(s16) = G_ZEXT %0(s1)
    %ax = COPY %1(s16)
    RET 0, implicit %ax

...
---
name:            test_zext_i1
# ALL-LABEL: name:  test_zext_i1
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
# ALL:          %0(s8) = COPY %edi
# ALL-NEXT:     %1(s1) = G_TRUNC %0(s8)
# ALL-NEXT:     %2(s32) = G_ZEXT %1(s1)
# ALL-NEXT:     %eax = COPY %2(s32)
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s1) = G_TRUNC %0(s8)
    %2(s32) = G_ZEXT %1(s1)
    %eax = COPY %2(s32)
    RET 0, implicit %eax

...
---
name:            test_zext_i8toi16
# ALL-LABEL: name:  test_zext_i8toi16
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
# ALL:          %0(s8) = COPY %edi
# ALL-NEXT:     %1(s16) = G_ZEXT %0(s8)
# ALL-NEXT:     %ax = COPY %1(s16)
# ALL-NEXT:     RET 0, implicit %ax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s16) = G_ZEXT %0(s8)
    %ax = COPY %1(s16)
    RET 0, implicit %ax

...
---
name:            test_zext_i8
# ALL-LABEL: name:  test_zext_i8
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
# ALL:          %0(s8) = COPY %edi
# ALL-NEXT:     %1(s32) = G_ZEXT %0(s8)
# ALL-NEXT:     %eax = COPY %1(s32)
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s32) = G_ZEXT %0(s8)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...
---
name:            test_zext_i16
# ALL-LABEL: name:  test_zext_i16
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
# ALL:          %0(s16) = COPY %edi
# ALL-NEXT:     %1(s32) = G_ZEXT %0(s16)
# ALL-NEXT:     %eax = COPY %1(s32)
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s16) = COPY %edi
    %1(s32) = G_ZEXT %0(s16)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...
---
name:            test_sext_i1toi8
# ALL-LABEL: name:  test_sext_i1toi8
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
# ALL:          %0(s1) = COPY %edi
# ALL-NEXT:     %1(s8) = G_SEXT %0(s1)
# ALL-NEXT:     %al = COPY %1(s8)
# ALL-NEXT:     RET 0, implicit %al
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s1) = COPY %edi
    %1(s8) = G_SEXT %0(s1)
    %al = COPY %1(s8)
    RET 0, implicit %al

...
---
name:            test_sext_i1toi16
# ALL-LABEL: name:  test_sext_i1toi16
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
# ALL:          %0(s1) = COPY %edi
# ALL-NEXT:     %1(s16) = G_SEXT %0(s1)
# ALL-NEXT:     %ax = COPY %1(s16)
# ALL-NEXT:     RET 0, implicit %ax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s1) = COPY %edi
    %1(s16) = G_SEXT %0(s1)
    %ax = COPY %1(s16)
    RET 0, implicit %ax

...
---
name:            test_sext_i1
# ALL-LABEL: name:  test_sext_i1
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
# ALL:          %0(s8) = COPY %edi
# ALL-NEXT:     %1(s1) = G_TRUNC %0(s8)
# ALL-NEXT:     %2(s32) = G_SEXT %1(s1)
# ALL-NEXT:     %eax = COPY %2(s32)
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s1) = G_TRUNC %0(s8)
    %2(s32) = G_SEXT %1(s1)
    %eax = COPY %2(s32)
    RET 0, implicit %eax

...
---
name:            test_sext_i8toi16
# ALL-LABEL: name:  test_sext_i8toi16
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _, preferred-register: '' }
  - { id: 1, class: _, preferred-register: '' }
# ALL:          %0(s8) = COPY %edi
# ALL-NEXT:     %1(s16) = G_SEXT %0(s8)
# ALL-NEXT:     %ax = COPY %1(s16)
# ALL-NEXT:     RET 0, implicit %ax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s16) = G_SEXT %0(s8)
    %ax = COPY %1(s16)
    RET 0, implicit %ax

...
---
name:            test_sext_i8
# ALL-LABEL: name:  test_sext_i8
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
# ALL:          %0(s8) = COPY %edi
# ALL-NEXT:     %1(s32) = G_SEXT %0(s8)
# ALL-NEXT:     %eax = COPY %1(s32)
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s32) = G_SEXT %0(s8)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...
---
name:            test_sext_i16
# ALL-LABEL: name:  test_sext_i16
alignment:       4
legalized:       false
regBankSelected: false
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
# ALL:          %0(s16) = COPY %edi
# ALL-NEXT:     %1(s32) = G_SEXT %0(s16)
# ALL-NEXT:     %eax = COPY %1(s32)
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s16) = COPY %edi
    %1(s32) = G_SEXT %0(s16)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...