test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir

# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s

--- |
  define void @test_constant() {
  entry:
    ret void
  }

  define void @test_fconstant() {
  entry:
    ret void
  }

  declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1

  attributes #1 = { nounwind }

...

---
name:            test_constant
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
body: |
  bb.0.entry:
    ; CHECK-LABEL: name: test_constant
    ; CHECK: %0(s32) = G_CONSTANT i32 5
    ; CHECK: %1(s1) = G_CONSTANT i1 false

    %0(s32) = G_CONSTANT i32 5
    %1(s1) = G_CONSTANT i1 0
    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.f32), %0, %0, %0, %0, %0, %0, %1, %1;
...

---
name:            test_fconstant
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
body: |
  bb.0.entry:
    ; CHECK-LABEL: name: test_fconstant
    ; CHECK: %0(s32) = G_FCONSTANT  float 1.000000e+00
    ; CHECK: %1(s32) = G_FCONSTANT  float 7.5

    %0(s32) = G_FCONSTANT float 1.0
    %1(s32) = G_FCONSTANT float 7.5
...