| //===-- HexagonIntrinsics.td - Instruction intrinsics ------*- tablegen -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file is distributed under the University of Illinois Open Source |
| // License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| // This is populated based on the following specs: |
| // Hexagon V2 Architecture |
| // Application-Level Specification |
| // 80-V9418-8 Rev. B |
| // March 4, 2008 |
| //===----------------------------------------------------------------------===// |
| |
| // |
| // ALU 32 types. |
| // |
| |
| class qi_ALU32_sisi<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class qi_ALU32_sis10<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, s10Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class qi_ALU32_sis8<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class qi_ALU32_siu8<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, u8Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class qi_ALU32_siu9<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, u9Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class si_ALU32_qisisi<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, $src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2, |
| IntRegs:$src3))]>; |
| |
| class si_ALU32_qis8si<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2, $src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2, |
| IntRegs:$src3))]>; |
| |
| class si_ALU32_qisis8<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2, |
| s8Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2, |
| imm:$src3))]>; |
| |
| class si_ALU32_qis8s8<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2, s8Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2, imm:$src3))]>; |
| |
| class si_ALU32_sisi<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU32_sisi_sat<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU32_sisi_rnd<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU32_sis16<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, s16Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class si_ALU32_sis10<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, s10Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class si_ALU32_s10si<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins s10Imm:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "(#$src1, $src2)")), |
| [(set IntRegs:$dst, (IntID imm:$src1, IntRegs:$src2))]>; |
| |
| class si_lo_ALU32_siu16<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u16Imm:$src2), |
| !strconcat("$dst.l = ", !strconcat(opc , "#$src2")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class si_hi_ALU32_siu16<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, u16Imm:$src2), |
| !strconcat("$dst.h = ", !strconcat(opc , "#$src2")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class si_ALU32_s16<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins s16Imm:$src1), |
| !strconcat("$dst = ", !strconcat(opc , "#$src1")), |
| [(set IntRegs:$dst, (IntID imm:$src1))]>; |
| |
| class di_ALU32_s8<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs DoubleRegs:$dst), (ins s8Imm:$src1), |
| !strconcat("$dst = ", !strconcat(opc , "#$src1")), |
| [(set DoubleRegs:$dst, (IntID imm:$src1))]>; |
| |
| class di_ALU64_di<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "$src")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src))]>; |
| |
| class si_ALU32_si<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class si_ALU32_si_tfr<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "$src")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| // |
| // ALU 64 types. |
| // |
| |
| class si_ALU64_si_sat<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class si_ALU64_didi<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>; |
| |
| class di_ALU64_sidi<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins IntRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, DoubleRegs:$src2))]>; |
| |
| class di_ALU64_didi<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_ALU64_qididi<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins IntRegs:$src1, DoubleRegs:$src2, |
| DoubleRegs:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, $src3)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, DoubleRegs:$src2, |
| DoubleRegs:$src3))]>; |
| |
| class di_ALU64_sisi<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_ALU64_didi_sat<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_ALU64_didi_rnd<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):rnd")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_ALU64_didi_crnd<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):crnd")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_ALU64_didi_rnd_sat<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):rnd:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_ALU64_didi_crnd_sat<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):crnd:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class qi_ALU64_didi<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs PredRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set PredRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>; |
| |
| class si_ALU64_sisi<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_sat_lh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_sat_hh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_sat_lh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_sat_hl<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_sat_ll<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_hh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_hl<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_lh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_l16_ll<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_sat_hh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.H):sat:<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_sat_lh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.H):sat:<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_sat_hl<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.L):sat:<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_sat_ll<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.L):sat:<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_hh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H):<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_hl<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L):<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_lh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H):<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_h16_ll<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L):<<16")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_lh<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_ll<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_ALU64_sisi_sat<string opc, Intrinsic IntID> |
| : ALU64_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| // |
| // SInst classes. |
| // |
| |
| class qi_SInst_qi<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class qi_SInst_qi_pxfer<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "$src")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class qi_SInst_qiqi<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class qi_SInst_qiqi_neg<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, !$src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_SInst_di<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src))]>; |
| |
| class di_SInst_di_sat<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src))]>; |
| |
| class si_SInst_di<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src)")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src))]>; |
| |
| class si_SInst_di_sat<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src):sat")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src))]>; |
| |
| class di_SInst_disi<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_SInst_didi<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>; |
| |
| class di_SInst_si<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1), |
| !strconcat("$dst = ", !strconcat(opc , "($src1)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1))]>; |
| |
| class si_SInst_sisiu3<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2, u3Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2, |
| imm:$src3))]>; |
| |
| class si_SInst_diu5<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, u5Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>; |
| |
| class si_SInst_disi<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_SInst_sidi<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, DoubleRegs:$src2))]>; |
| |
| class di_SInst_disisi<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, IntRegs:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, $src3)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, IntRegs:$src2, |
| IntRegs:$src3))]>; |
| |
| class di_SInst_sisi<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class qi_SInst_siu5<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class qi_SInst_siu6<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src1, u6Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class qi_SInst_sisi<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_SInst_si<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class si_SInst_si_sat<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class di_SInst_qi<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "($src)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class si_SInst_qi<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "$src")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class si_SInst_qiqi<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class qi_SInst_si<string opc, Intrinsic IntID> |
| : SInst<(outs PredRegs:$dst), (ins IntRegs:$src), |
| !strconcat("$dst = ", !strconcat(opc , "$src")), |
| [(set PredRegs:$dst, (IntID IntRegs:$src))]>; |
| |
| class si_SInst_sisi<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_SInst_diu6<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, u6Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>; |
| |
| class si_SInst_siu5<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class si_SInst_siu5_rnd<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2):rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>; |
| |
| class si_SInst_siu5u5<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2, u5Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, imm:$src2, imm:$src3))]>; |
| |
| class si_SInst_sisisi_acc<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisisi_nac<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didisi_acc<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didisi_nac<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisiu5u5<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| u5Imm:$src2, u5Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, #$src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| imm:$src2, imm:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisidi<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didiu6u6<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| u6Imm:$src2, u6Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, #$src2, #$src3)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1, |
| imm:$src2, imm:$src3))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_dididi<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_diu6u6<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, u6Imm:$src2, |
| u6Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2, #$src3)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2, |
| imm:$src3))]>; |
| |
| class di_SInst_didisi<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, $src3)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2, |
| IntRegs:$src3))]>; |
| |
| class di_SInst_didiqi<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, $src3)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2, |
| IntRegs:$src3))]>; |
| |
| class di_SInst_didiu3<string opc, Intrinsic IntID> |
| : SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2, |
| u3Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, #$src3)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2, |
| imm:$src3))]>; |
| |
| class di_SInst_didisi_or<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst |= ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didisi_and<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst &= ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didiu6_and<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| u6Imm:$src2), |
| !strconcat("$dst &= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didiu6_or<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| u6Imm:$src2), |
| !strconcat("$dst |= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didiu6_xor<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| u6Imm:$src2), |
| !strconcat("$dst ^= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisisi_and<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst &= ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisisi_or<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst |= ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| |
| class si_SInst_sisiu5_and<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| u5Imm:$src2), |
| !strconcat("$dst &= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisiu5_or<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| u5Imm:$src2), |
| !strconcat("$dst |= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisiu5_xor<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| u5Imm:$src2), |
| !strconcat("$dst ^= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisiu5_acc<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| u5Imm:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_SInst_sisiu5_nac<string opc, Intrinsic IntID> |
| : SInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| u5Imm:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didiu6_acc<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| u5Imm:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, #$src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, imm:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_SInst_didiu6_nac<string opc, Intrinsic IntID> |
| : SInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| u5Imm:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1, #$src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1, |
| imm:$src2))], |
| "$dst2 = $dst">; |
| |
| |
| // |
| // MInst classes. |
| // |
| |
| class di_MInst_sisi_rnd_hh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1:rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_rnd_hh<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.H):rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_rnd_hl_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.L):<<1:rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_rnd_hl<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.L):rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_rnd_lh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.H):<<1:rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_rnd_lh<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.H):rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_rnd_ll_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.L):<<1:rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_rnd_ll<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.L):rnd")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_disisi_acc<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_sat_conj<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2*):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_sat_conj<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1, $src2*):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1, $src2):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_s1_sat_conj<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1, $src2*):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_s1_sat_conj<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1, $src2*):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_s8s8<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins s8Imm:$src1, s8Imm:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "(#$src1, #$src2)")), |
| [(set DoubleRegs:$dst, (IntID imm:$src1, imm:$src2))]>; |
| |
| class si_MInst_sisi<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_hh<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_hh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H):<<1")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_lh<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_lh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H):<<1")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_hl<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_hl_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L):<<1")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_ll<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_ll_s1<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L):<<1")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| |
| class si_MInst_sisi_hh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_hh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_lh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_lh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_hl<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_hl_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_ll<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_ll_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_up<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_didi<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_MInst_didi_conj<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2*)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_MInst_sisi_s1_sat_conj<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2*):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_didi_s1_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2):<<1:rnd:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_MInst_didi_sat<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class di_MInst_didi_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2):rnd:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class si_SInst_sisi_sat<string opc, Intrinsic IntID> |
| : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_s1_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_l_s1_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2.L):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_h_s1_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2.H):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_sat_conj<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2*):rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_s1_rnd_sat_conj<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2*):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2):rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisisi_xacc<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst ^= ", !strconcat(opc , "($src2, $src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src2, |
| IntRegs:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst += ", !strconcat(opc , "($src2, $src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src2, |
| IntRegs:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src2, |
| IntRegs:$src3), |
| !strconcat("$dst -= ", !strconcat(opc , "($src2, $src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src2, |
| IntRegs:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisis8_acc<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src2, |
| s8Imm:$src3), |
| !strconcat("$dst += ", !strconcat(opc , "($src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src2, |
| imm:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisis8_nac<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src2, |
| s8Imm:$src3), |
| !strconcat("$dst -= ", !strconcat(opc , "($src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src2, |
| imm:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisiu4u5<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| u4Imm:$src2, u5Imm:$src3), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, #$src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| imm:$src2, imm:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisiu8_acc<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src2, |
| u8Imm:$src3), |
| !strconcat("$dst += ", !strconcat(opc , "($src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src2, |
| imm:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisiu8_nac<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src2, |
| u8Imm:$src3), |
| !strconcat("$dst -= ", !strconcat(opc , "($src2, #$src3)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src2, |
| imm:$src3))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_hh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.H, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_lh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.L, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_lh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.L, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_hh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.H, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_hh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_hh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.H, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_hh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_hh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_hl_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_hl<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_lh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_lh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_ll_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_sat_ll<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_hl<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.H, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_hl_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.H, $src2.L):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hl<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.H, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hl_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.L):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_lh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_lh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.L, $src2.H):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_lh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_lh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.H):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_ll<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_ll_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.L, $src2.L):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_ll_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.L, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_hl_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.H, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_ll<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.L, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_acc_sat_hl<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , |
| "($src1.H, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_ll<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_ll_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.L):<<1")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hh_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hh_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hl_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_hl_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.H, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_lh_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_lh_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_ll_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_sisisi_nac_ll_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , |
| "($src1.L, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_ALU32_sisi<string opc, Intrinsic IntID> |
| : ALU32_rr<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_sat<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_sat_conj<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2*):sat")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_sisi_s1_sat<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_didi_s1_sat<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, |
| DoubleRegs:$src2))]>; |
| |
| class si_MInst_didi_s1_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1, $src2):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>; |
| |
| class si_MInst_didi_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):rnd:sat")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_hh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_hh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_hl<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.H, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_hl_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_lh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.H):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_lh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.H):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_ll<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1.L, $src2.L):sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_ll_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.L, $src2.L):<<1:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_hh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.H):rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_hh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.H):rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_hh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , |
| "($src1.H, $src2.H):<<1:rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_hh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , |
| "($src1.H, $src2.H):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_hl<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.H, $src2.L):rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_hl_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.H, $src2.L):<<1:rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_hl<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.H, $src2.L):rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_hl_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.H, $src2.L):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_lh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.H):rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_lh<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.H):rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_lh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.H):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_lh_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.H):<<1:rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_ll<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.L):rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_sat_rnd_ll_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.L):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_ll<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.L):rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_sisi_rnd_ll_s1<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1.L, $src2.L):<<1:rnd")), |
| [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_dididi_acc_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, |
| DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2):sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_dididi_acc_rnd_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| DoubleRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1, $src2):rnd:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_dididi_acc_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1, $src2):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_dididi_acc_s1_rnd_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| DoubleRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1, $src2):<<1:rnd:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_dididi_acc<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| DoubleRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_dididi_acc_conj<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| DoubleRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1, $src2*)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| DoubleRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_hh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.H, $src2.H)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_hl<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.H, $src2.L)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_lh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_ll<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_hh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1.H, $src2.H):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_hl_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1.H, $src2.L):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_lh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1.L, $src2.H):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_ll_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1.L, $src2.L):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_hh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.H, $src2.H)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_hl<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.H, $src2.L)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_lh<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.L, $src2.H)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_ll<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", !strconcat(opc , "($src1.L, $src2.L)")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_hh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", |
| !strconcat(opc , "($src1.H, $src2.H):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_hl_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", |
| !strconcat(opc , "($src1.H, $src2.L):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_lh_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", |
| !strconcat(opc , "($src1.L, $src2.H):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_nac_ll_s1<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst -= ", |
| !strconcat(opc , "($src1.L, $src2.L):<<1")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disisi_acc_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1, $src2):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, IntRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class di_MInst_disi_s1_sat<string opc, Intrinsic IntID> |
| : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, IntRegs:$src2))]>; |
| |
| class di_MInst_didisi_acc_s1_sat<string opc, Intrinsic IntID> |
| : MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1, |
| IntRegs:$src2), |
| !strconcat("$dst += ", |
| !strconcat(opc , "($src1, $src2):<<1:sat")), |
| [(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, |
| DoubleRegs:$src1, |
| IntRegs:$src2))], |
| "$dst2 = $dst">; |
| |
| class si_MInst_disi_s1_rnd_sat<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, IntRegs:$src2), |
| !strconcat("$dst = ", |
| !strconcat(opc , "($src1, $src2):<<1:rnd:sat")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src1, IntRegs:$src2))]>; |
| |
| class si_MInst_didi<string opc, Intrinsic IntID> |
| : MInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2), |
| !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")), |
| [(set IntRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>; |
| |
| |
| /******************************************************************** |
| * ALU32/ALU * |
| *********************************************************************/ |
| |
| // ALU32 / ALU / Add. |
| def Hexagon_A2_add: |
| si_ALU32_sisi <"add", int_hexagon_A2_add>; |
| def Hexagon_A2_addi: |
| si_ALU32_sis16 <"add", int_hexagon_A2_addi>; |
| |
| // ALU32 / ALU / Logical operations. |
| def Hexagon_A2_and: |
| si_ALU32_sisi <"and", int_hexagon_A2_and>; |
| def Hexagon_A2_andir: |
| si_ALU32_sis10 <"and", int_hexagon_A2_andir>; |
| def Hexagon_A2_not: |
| si_ALU32_si <"not", int_hexagon_A2_not>; |
| def Hexagon_A2_or: |
| si_ALU32_sisi <"or", int_hexagon_A2_or>; |
| def Hexagon_A2_orir: |
| si_ALU32_sis10 <"or", int_hexagon_A2_orir>; |
| def Hexagon_A2_xor: |
| si_ALU32_sisi <"xor", int_hexagon_A2_xor>; |
| |
| // ALU32 / ALU / Negate. |
| def Hexagon_A2_neg: |
| si_ALU32_si <"neg", int_hexagon_A2_neg>; |
| |
| // ALU32 / ALU / Subtract. |
| def Hexagon_A2_sub: |
| si_ALU32_sisi <"sub", int_hexagon_A2_sub>; |
| def Hexagon_A2_subri: |
| si_ALU32_s10si <"sub", int_hexagon_A2_subri>; |
| |
| // ALU32 / ALU / Transfer Immediate. |
| def Hexagon_A2_tfril: |
| si_lo_ALU32_siu16 <"", int_hexagon_A2_tfril>; |
| def Hexagon_A2_tfrih: |
| si_hi_ALU32_siu16 <"", int_hexagon_A2_tfrih>; |
| def Hexagon_A2_tfrsi: |
| si_ALU32_s16 <"", int_hexagon_A2_tfrsi>; |
| def Hexagon_A2_tfrpi: |
| di_ALU32_s8 <"", int_hexagon_A2_tfrpi>; |
| |
| // ALU32 / ALU / Transfer Register. |
| def Hexagon_A2_tfr: |
| si_ALU32_si_tfr <"", int_hexagon_A2_tfr>; |
| |
| /******************************************************************** |
| * ALU32/PERM * |
| *********************************************************************/ |
| |
| // ALU32 / PERM / Combine. |
| def Hexagon_A2_combinew: |
| di_ALU32_sisi <"combine", int_hexagon_A2_combinew>; |
| def Hexagon_A2_combine_hh: |
| si_MInst_sisi_hh <"combine", int_hexagon_A2_combine_hh>; |
| def Hexagon_A2_combine_lh: |
| si_MInst_sisi_lh <"combine", int_hexagon_A2_combine_lh>; |
| def Hexagon_A2_combine_hl: |
| si_MInst_sisi_hl <"combine", int_hexagon_A2_combine_hl>; |
| def Hexagon_A2_combine_ll: |
| si_MInst_sisi_ll <"combine", int_hexagon_A2_combine_ll>; |
| def Hexagon_A2_combineii: |
| di_MInst_s8s8 <"combine", int_hexagon_A2_combineii>; |
| |
| // ALU32 / PERM / Mux. |
| def Hexagon_C2_mux: |
| si_ALU32_qisisi <"mux", int_hexagon_C2_mux>; |
| def Hexagon_C2_muxri: |
| si_ALU32_qis8si <"mux", int_hexagon_C2_muxri>; |
| def Hexagon_C2_muxir: |
| si_ALU32_qisis8 <"mux", int_hexagon_C2_muxir>; |
| def Hexagon_C2_muxii: |
| si_ALU32_qis8s8 <"mux", int_hexagon_C2_muxii>; |
| |
| // ALU32 / PERM / Shift halfword. |
| def Hexagon_A2_aslh: |
| si_ALU32_si <"aslh", int_hexagon_A2_aslh>; |
| def Hexagon_A2_asrh: |
| si_ALU32_si <"asrh", int_hexagon_A2_asrh>; |
| def SI_to_SXTHI_asrh: |
| si_ALU32_si <"asrh", int_hexagon_SI_to_SXTHI_asrh>; |
| |
| // ALU32 / PERM / Sign/zero extend. |
| def Hexagon_A2_sxth: |
| si_ALU32_si <"sxth", int_hexagon_A2_sxth>; |
| def Hexagon_A2_sxtb: |
| si_ALU32_si <"sxtb", int_hexagon_A2_sxtb>; |
| def Hexagon_A2_zxth: |
| si_ALU32_si <"zxth", int_hexagon_A2_zxth>; |
| def Hexagon_A2_zxtb: |
| si_ALU32_si <"zxtb", int_hexagon_A2_zxtb>; |
| |
| /******************************************************************** |
| * ALU32/PRED * |
| *********************************************************************/ |
| |
| // ALU32 / PRED / Compare. |
| def Hexagon_C2_cmpeq: |
| qi_ALU32_sisi <"cmp.eq", int_hexagon_C2_cmpeq>; |
| def Hexagon_C2_cmpeqi: |
| qi_ALU32_sis10 <"cmp.eq", int_hexagon_C2_cmpeqi>; |
| def Hexagon_C2_cmpgei: |
| qi_ALU32_sis8 <"cmp.ge", int_hexagon_C2_cmpgei>; |
| def Hexagon_C2_cmpgeui: |
| qi_ALU32_siu8 <"cmp.geu", int_hexagon_C2_cmpgeui>; |
| def Hexagon_C2_cmpgt: |
| qi_ALU32_sisi <"cmp.gt", int_hexagon_C2_cmpgt>; |
| def Hexagon_C2_cmpgti: |
| qi_ALU32_sis10 <"cmp.gt", int_hexagon_C2_cmpgti>; |
| def Hexagon_C2_cmpgtu: |
| qi_ALU32_sisi <"cmp.gtu", int_hexagon_C2_cmpgtu>; |
| def Hexagon_C2_cmpgtui: |
| qi_ALU32_siu9 <"cmp.gtu", int_hexagon_C2_cmpgtui>; |
| def Hexagon_C2_cmplt: |
| qi_ALU32_sisi <"cmp.lt", int_hexagon_C2_cmplt>; |
| def Hexagon_C2_cmpltu: |
| qi_ALU32_sisi <"cmp.ltu", int_hexagon_C2_cmpltu>; |
| |
| /******************************************************************** |
| * ALU32/VH * |
| *********************************************************************/ |
| |
| // ALU32 / VH / Vector add halfwords. |
| // Rd32=vadd[u]h(Rs32,Rt32:sat] |
| def Hexagon_A2_svaddh: |
| si_ALU32_sisi <"vaddh", int_hexagon_A2_svaddh>; |
| def Hexagon_A2_svaddhs: |
| si_ALU32_sisi_sat <"vaddh", int_hexagon_A2_svaddhs>; |
| def Hexagon_A2_svadduhs: |
| si_ALU32_sisi_sat <"vadduh", int_hexagon_A2_svadduhs>; |
| |
| // ALU32 / VH / Vector average halfwords. |
| def Hexagon_A2_svavgh: |
| si_ALU32_sisi <"vavgh", int_hexagon_A2_svavgh>; |
| def Hexagon_A2_svavghs: |
| si_ALU32_sisi_rnd <"vavgh", int_hexagon_A2_svavghs>; |
| def Hexagon_A2_svnavgh: |
| si_ALU32_sisi <"vnavgh", int_hexagon_A2_svnavgh>; |
| |
| // ALU32 / VH / Vector subtract halfwords. |
| def Hexagon_A2_svsubh: |
| si_ALU32_sisi <"vsubh", int_hexagon_A2_svsubh>; |
| def Hexagon_A2_svsubhs: |
| si_ALU32_sisi_sat <"vsubh", int_hexagon_A2_svsubhs>; |
| def Hexagon_A2_svsubuhs: |
| si_ALU32_sisi_sat <"vsubuh", int_hexagon_A2_svsubuhs>; |
| |
| /******************************************************************** |
| * ALU64/ALU * |
| *********************************************************************/ |
| |
| // ALU64 / ALU / Add. |
| def Hexagon_A2_addp: |
| di_ALU64_didi <"add", int_hexagon_A2_addp>; |
| def Hexagon_A2_addsat: |
| si_ALU64_sisi_sat <"add", int_hexagon_A2_addsat>; |
| |
| // ALU64 / ALU / Add halfword. |
| // Even though the definition says hl, it should be lh - |
| //so DON'T change the class " si_ALU64_sisi_l16_lh " it inherits. |
| def Hexagon_A2_addh_l16_hl: |
| si_ALU64_sisi_l16_lh <"add", int_hexagon_A2_addh_l16_hl>; |
| def Hexagon_A2_addh_l16_ll: |
| si_ALU64_sisi_l16_ll <"add", int_hexagon_A2_addh_l16_ll>; |
| |
| def Hexagon_A2_addh_l16_sat_hl: |
| si_ALU64_sisi_l16_sat_lh <"add", int_hexagon_A2_addh_l16_sat_hl>; |
| def Hexagon_A2_addh_l16_sat_ll: |
| si_ALU64_sisi_l16_sat_ll <"add", int_hexagon_A2_addh_l16_sat_ll>; |
| |
| def Hexagon_A2_addh_h16_hh: |
| si_ALU64_sisi_h16_hh <"add", int_hexagon_A2_addh_h16_hh>; |
| def Hexagon_A2_addh_h16_hl: |
| si_ALU64_sisi_h16_hl <"add", int_hexagon_A2_addh_h16_hl>; |
| def Hexagon_A2_addh_h16_lh: |
| si_ALU64_sisi_h16_lh <"add", int_hexagon_A2_addh_h16_lh>; |
| def Hexagon_A2_addh_h16_ll: |
| si_ALU64_sisi_h16_ll <"add", int_hexagon_A2_addh_h16_ll>; |
| |
| def Hexagon_A2_addh_h16_sat_hh: |
| si_ALU64_sisi_h16_sat_hh <"add", int_hexagon_A2_addh_h16_sat_hh>; |
| def Hexagon_A2_addh_h16_sat_hl: |
| si_ALU64_sisi_h16_sat_hl <"add", int_hexagon_A2_addh_h16_sat_hl>; |
| def Hexagon_A2_addh_h16_sat_lh: |
| si_ALU64_sisi_h16_sat_lh <"add", int_hexagon_A2_addh_h16_sat_lh>; |
| def Hexagon_A2_addh_h16_sat_ll: |
| si_ALU64_sisi_h16_sat_ll <"add", int_hexagon_A2_addh_h16_sat_ll>; |
| |
| // ALU64 / ALU / Compare. |
| def Hexagon_C2_cmpeqp: |
| qi_ALU64_didi <"cmp.eq", int_hexagon_C2_cmpeqp>; |
| def Hexagon_C2_cmpgtp: |
| qi_ALU64_didi <"cmp.gt", int_hexagon_C2_cmpgtp>; |
| def Hexagon_C2_cmpgtup: |
| qi_ALU64_didi <"cmp.gtu", int_hexagon_C2_cmpgtup>; |
| |
| // ALU64 / ALU / Logical operations. |
| def Hexagon_A2_andp: |
| di_ALU64_didi <"and", int_hexagon_A2_andp>; |
| def Hexagon_A2_orp: |
| di_ALU64_didi <"or", int_hexagon_A2_orp>; |
| def Hexagon_A2_xorp: |
| di_ALU64_didi <"xor", int_hexagon_A2_xorp>; |
| |
| // ALU64 / ALU / Maximum. |
| def Hexagon_A2_max: |
| si_ALU64_sisi <"max", int_hexagon_A2_max>; |
| def Hexagon_A2_maxu: |
| si_ALU64_sisi <"maxu", int_hexagon_A2_maxu>; |
| |
| // ALU64 / ALU / Minimum. |
| def Hexagon_A2_min: |
| si_ALU64_sisi <"min", int_hexagon_A2_min>; |
| def Hexagon_A2_minu: |
| si_ALU64_sisi <"minu", int_hexagon_A2_minu>; |
| |
| // ALU64 / ALU / Subtract. |
| def Hexagon_A2_subp: |
| di_ALU64_didi <"sub", int_hexagon_A2_subp>; |
| def Hexagon_A2_subsat: |
| si_ALU64_sisi_sat <"sub", int_hexagon_A2_subsat>; |
| |
| // ALU64 / ALU / Subtract halfword. |
| // Even though the definition says hl, it should be lh - |
| //so DON'T change the class " si_ALU64_sisi_l16_lh " it inherits. |
| def Hexagon_A2_subh_l16_hl: |
| si_ALU64_sisi_l16_lh <"sub", int_hexagon_A2_subh_l16_hl>; |
| def Hexagon_A2_subh_l16_ll: |
| si_ALU64_sisi_l16_ll <"sub", int_hexagon_A2_subh_l16_ll>; |
| |
| def Hexagon_A2_subh_l16_sat_hl: |
| si_ALU64_sisi_l16_sat_lh <"sub", int_hexagon_A2_subh_l16_sat_hl>; |
| def Hexagon_A2_subh_l16_sat_ll: |
| si_ALU64_sisi_l16_sat_ll <"sub", int_hexagon_A2_subh_l16_sat_ll>; |
| |
| def Hexagon_A2_subh_h16_hh: |
| si_ALU64_sisi_h16_hh <"sub", int_hexagon_A2_subh_h16_hh>; |
| def Hexagon_A2_subh_h16_hl: |
| si_ALU64_sisi_h16_hl <"sub", int_hexagon_A2_subh_h16_hl>; |
| def Hexagon_A2_subh_h16_lh: |
| si_ALU64_sisi_h16_lh <"sub", int_hexagon_A2_subh_h16_lh>; |
| def Hexagon_A2_subh_h16_ll: |
| si_ALU64_sisi_h16_ll <"sub", int_hexagon_A2_subh_h16_ll>; |
| |
| def Hexagon_A2_subh_h16_sat_hh: |
| si_ALU64_sisi_h16_sat_hh <"sub", int_hexagon_A2_subh_h16_sat_hh>; |
| def Hexagon_A2_subh_h16_sat_hl: |
| si_ALU64_sisi_h16_sat_hl <"sub", int_hexagon_A2_subh_h16_sat_hl>; |
| def Hexagon_A2_subh_h16_sat_lh: |
| si_ALU64_sisi_h16_sat_lh <"sub", int_hexagon_A2_subh_h16_sat_lh>; |
| def Hexagon_A2_subh_h16_sat_ll: |
| si_ALU64_sisi_h16_sat_ll <"sub", int_hexagon_A2_subh_h16_sat_ll>; |
| |
| // ALU64 / ALU / Transfer register. |
| def Hexagon_A2_tfrp: |
| di_ALU64_di <"", int_hexagon_A2_tfrp>; |
| |
| /******************************************************************** |
| * ALU64/BIT * |
| *********************************************************************/ |
| |
| // ALU64 / BIT / Masked parity. |
| def Hexagon_S2_parityp: |
| si_ALU64_didi <"parity", int_hexagon_S2_parityp>; |
| |
| /******************************************************************** |
| * ALU64/PERM * |
| *********************************************************************/ |
| |
| // ALU64 / PERM / Vector pack high and low halfwords. |
| def Hexagon_S2_packhl: |
| di_ALU64_sisi <"packhl", int_hexagon_S2_packhl>; |
| |
| /******************************************************************** |
| * ALU64/VB * |
| *********************************************************************/ |
| |
| // ALU64 / VB / Vector add unsigned bytes. |
| def Hexagon_A2_vaddub: |
| di_ALU64_didi <"vaddub", int_hexagon_A2_vaddub>; |
| def Hexagon_A2_vaddubs: |
| di_ALU64_didi_sat <"vaddub", int_hexagon_A2_vaddubs>; |
| |
| // ALU64 / VB / Vector average unsigned bytes. |
| def Hexagon_A2_vavgub: |
| di_ALU64_didi <"vavgub", int_hexagon_A2_vavgub>; |
| def Hexagon_A2_vavgubr: |
| di_ALU64_didi_rnd <"vavgub", int_hexagon_A2_vavgubr>; |
| |
| // ALU64 / VB / Vector compare unsigned bytes. |
| def Hexagon_A2_vcmpbeq: |
| qi_ALU64_didi <"vcmpb.eq", int_hexagon_A2_vcmpbeq>; |
| def Hexagon_A2_vcmpbgtu: |
| qi_ALU64_didi <"vcmpb.gtu",int_hexagon_A2_vcmpbgtu>; |
| |
| // ALU64 / VB / Vector maximum/minimum unsigned bytes. |
| def Hexagon_A2_vmaxub: |
| di_ALU64_didi <"vmaxub", int_hexagon_A2_vmaxub>; |
| def Hexagon_A2_vminub: |
| di_ALU64_didi <"vminub", int_hexagon_A2_vminub>; |
| |
| // ALU64 / VB / Vector subtract unsigned bytes. |
| def Hexagon_A2_vsubub: |
| di_ALU64_didi <"vsubub", int_hexagon_A2_vsubub>; |
| def Hexagon_A2_vsububs: |
| di_ALU64_didi_sat <"vsubub", int_hexagon_A2_vsububs>; |
| |
| // ALU64 / VB / Vector mux. |
| def Hexagon_C2_vmux: |
| di_ALU64_qididi <"vmux", int_hexagon_C2_vmux>; |
| |
| |
| /******************************************************************** |
| * ALU64/VH * |
| *********************************************************************/ |
| |
| // ALU64 / VH / Vector add halfwords. |
| // Rdd64=vadd[u]h(Rss64,Rtt64:sat] |
| def Hexagon_A2_vaddh: |
| di_ALU64_didi <"vaddh", int_hexagon_A2_vaddh>; |
| def Hexagon_A2_vaddhs: |
| di_ALU64_didi_sat <"vaddh", int_hexagon_A2_vaddhs>; |
| def Hexagon_A2_vadduhs: |
| di_ALU64_didi_sat <"vadduh", int_hexagon_A2_va
|