| //===- IA64RegisterInfo.h - IA64 Register Information Impl ------*- C++ -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file is distributed under the University of Illinois Open Source |
| // License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file contains the IA64 implementation of the TargetRegisterInfo class. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #ifndef IA64REGISTERINFO_H |
| #define IA64REGISTERINFO_H |
| |
| #include "llvm/Target/TargetRegisterInfo.h" |
| #include "IA64GenRegisterInfo.h.inc" |
| |
| namespace llvm { |
| |
| class TargetInstrInfo; |
| |
| struct IA64RegisterInfo : public IA64GenRegisterInfo { |
| const TargetInstrInfo &TII; |
| |
| IA64RegisterInfo(const TargetInstrInfo &tii); |
| |
| /// Code Generation virtual methods... |
| const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const; |
| |
| const TargetRegisterClass* const* getCalleeSavedRegClasses( |
| const MachineFunction *MF = 0) const; |
| |
| BitVector getReservedRegs(const MachineFunction &MF) const; |
| |
| bool hasFP(const MachineFunction &MF) const; |
| |
| void eliminateCallFramePseudoInstr(MachineFunction &MF, |
| MachineBasicBlock &MBB, |
| MachineBasicBlock::iterator MI) const; |
| |
| void eliminateFrameIndex(MachineBasicBlock::iterator MI, |
| int SPAdj, RegScavenger *RS = NULL) const; |
| |
| void emitPrologue(MachineFunction &MF) const; |
| void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; |
| |
| // Debug information queries. |
| unsigned getRARegister() const; |
| unsigned getFrameRegister(MachineFunction &MF) const; |
| |
| // Exception handling queries. |
| unsigned getEHExceptionRegister() const; |
| unsigned getEHHandlerRegister() const; |
| |
| int getDwarfRegNum(unsigned RegNum, bool isEH) const; |
| }; |
| |
| } // End llvm namespace |
| |
| #endif |
| |