| //===-- X86InstrFoldTables.cpp - X86 Instruction Folding Tables -----------===// |
| // |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| // See https://llvm.org/LICENSE.txt for license information. |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file contains the X86 memory folding tables. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #include "X86InstrFoldTables.h" |
| #include "X86InstrInfo.h" |
| #include "llvm/ADT/STLExtras.h" |
| #include <vector> |
| |
| using namespace llvm; |
| |
| // These tables are sorted by their RegOp value allowing them to be binary |
| // searched at runtime without the need for additional storage. The enum values |
| // are currently emitted in X86GenInstrInfo.inc in alphabetical order. Which |
| // makes sorting these tables a simple matter of alphabetizing the table. |
| // |
| // We also have a tablegen emitter that tries to autogenerate these tables |
| // by comparing encoding information. This can be enabled by passing |
| // X86_GEN_FOLD_TABLES=ON to cmake which fill produce X86GenFoldTables.inc |
| // in the build area. There are currently some bugs in the autogenerated table |
| // that require a manual review to copy them from the autogenerated table into |
| // this table. It is unclear if we will ever be able to fully automate this |
| // because as new instruction are added into holes in the X86 opcode map they |
| // potentially pair up with old instructions and create new entries in the |
| // tables that would be incorrect. The manual review process allows us a chance |
| // to catch these before they become observable bugs. |
| static const X86MemoryFoldTableEntry MemoryFoldTable2Addr[] = { |
| { X86::ADD16ri8_DB, X86::ADD16mi8, TB_NO_REVERSE }, |
| { X86::ADD16ri_DB, X86::ADD16mi, TB_NO_REVERSE }, |
| { X86::ADD16rr_DB, X86::ADD16mr, TB_NO_REVERSE }, |
| { X86::ADD32ri8_DB, X86::ADD32mi8, TB_NO_REVERSE }, |
| { X86::ADD32ri_DB, X86::ADD32mi, TB_NO_REVERSE }, |
| { X86::ADD32rr_DB, X86::ADD32mr, TB_NO_REVERSE }, |
| { X86::ADD64ri32_DB,X86::ADD64mi32, TB_NO_REVERSE }, |
| { X86::ADD64ri8_DB, X86::ADD64mi8, TB_NO_REVERSE }, |
| { X86::ADD64rr_DB, X86::ADD64mr, TB_NO_REVERSE }, |
| { X86::ADD8ri_DB, X86::ADD8mi, TB_NO_REVERSE }, |
| { X86::ADD8rr_DB, X86::ADD8mr, TB_NO_REVERSE }, |
| { X86::ADC16ri, X86::ADC16mi, 0 }, |
| { X86::ADC16ri8, X86::ADC16mi8, 0 }, |
| { X86::ADC16rr, X86::ADC16mr, 0 }, |
| { X86::ADC32ri, X86::ADC32mi, 0 }, |
| { X86::ADC32ri8, X86::ADC32mi8, 0 }, |
| { X86::ADC32rr, X86::ADC32mr, 0 }, |
| { X86::ADC64ri32, X86::ADC64mi32, 0 }, |
| { X86::ADC64ri8, X86::ADC64mi8, 0 }, |
| { X86::ADC64rr, X86::ADC64mr, 0 }, |
| { X86::ADC8ri, X86::ADC8mi, 0 }, |
| { X86::ADC8ri8, X86::ADC8mi8, 0 }, |
| { X86::ADC8rr, X86::ADC8mr, 0 }, |
| { X86::ADD16ri, X86::ADD16mi, 0 }, |
| { X86::ADD16ri8, X86::ADD16mi8, 0 }, |
| { X86::ADD16rr, X86::ADD16mr, 0 }, |
| { X86::ADD32ri, X86::ADD32mi, 0 }, |
| { X86::ADD32ri8, X86::ADD32mi8, 0 }, |
| { X86::ADD32rr, X86::ADD32mr, 0 }, |
| { X86::ADD64ri32, X86::ADD64mi32, 0 }, |
| { X86::ADD64ri8, X86::ADD64mi8, 0 }, |
| { X86::ADD64rr, X86::ADD64mr, 0 }, |
| { X86::ADD8ri, X86::ADD8mi, 0 }, |
| { X86::ADD8ri8, X86::ADD8mi8, 0 }, |
| { X86::ADD8rr, X86::ADD8mr, 0 }, |
| { X86::AND16ri, X86::AND16mi, 0 }, |
| { X86::AND16ri8, X86::AND16mi8, 0 }, |
| { X86::AND16rr, X86::AND16mr, 0 }, |
| { X86::AND32ri, X86::AND32mi, 0 }, |
| { X86::AND32ri8, X86::AND32mi8, 0 }, |
| { X86::AND32rr, X86::AND32mr, 0 }, |
| { X86::AND64ri32, X86::AND64mi32, 0 }, |
| { X86::AND64ri8, X86::AND64mi8, 0 }, |
| { X86::AND64rr, X86::AND64mr, 0 }, |
| { X86::AND8ri, X86::AND8mi, 0 }, |
| { X86::AND8ri8, X86::AND8mi8, 0 }, |
| { X86::AND8rr, X86::AND8mr, 0 }, |
| { X86::BTC16ri8, X86::BTC16mi8, 0 }, |
| { X86::BTC32ri8, X86::BTC32mi8, 0 }, |
| { X86::BTC64ri8, X86::BTC64mi8, 0 }, |
| { X86::BTR16ri8, X86::BTR16mi8, 0 }, |
| { X86::BTR32ri8, X86::BTR32mi8, 0 }, |
| { X86::BTR64ri8, X86::BTR64mi8, 0 }, |
| { X86::BTS16ri8, X86::BTS16mi8, 0 }, |
| { X86::BTS32ri8, X86::BTS32mi8, 0 }, |
| { X86::BTS64ri8, X86::BTS64mi8, 0 }, |
| { X86::DEC16r, X86::DEC16m, 0 }, |
| { X86::DEC32r, X86::DEC32m, 0 }, |
| { X86::DEC64r, X86::DEC64m, 0 }, |
| { X86::DEC8r, X86::DEC8m, 0 }, |
| { X86::INC16r, X86::INC16m, 0 }, |
| { X86::INC32r, X86::INC32m, 0 }, |
| { X86::INC64r, X86::INC64m, 0 }, |
| { X86::INC8r, X86::INC8m, 0 }, |
| { X86::NEG16r, X86::NEG16m, 0 }, |
| { X86::NEG32r, X86::NEG32m, 0 }, |
| { X86::NEG64r, X86::NEG64m, 0 }, |
| { X86::NEG8r, X86::NEG8m, 0 }, |
| { X86::NOT16r, X86::NOT16m, 0 }, |
| { X86::NOT32r, X86::NOT32m, 0 }, |
| { X86::NOT64r, X86::NOT64m, 0 }, |
| { X86::NOT8r, X86::NOT8m, 0 }, |
| { X86::OR16ri, X86::OR16mi, 0 }, |
| { X86::OR16ri8, X86::OR16mi8, 0 }, |
| { X86::OR16rr, X86::OR16mr, 0 }, |
| { X86::OR32ri, X86::OR32mi, 0 }, |
| { X86::OR32ri8, X86::OR32mi8, 0 }, |
| { X86::OR32rr, X86::OR32mr, 0 }, |
| { X86::OR64ri32, X86::OR64mi32, 0 }, |
| { X86::OR64ri8, X86::OR64mi8, 0 }, |
| { X86::OR64rr, X86::OR64mr, 0 }, |
| { X86::OR8ri, X86::OR8mi, 0 }, |
| { X86::OR8ri8, X86::OR8mi8, 0 }, |
| { X86::OR8rr, X86::OR8mr, 0 }, |
| { X86::RCL16r1, X86::RCL16m1, 0 }, |
| { X86::RCL16rCL, X86::RCL16mCL, 0 }, |
| { X86::RCL16ri, X86::RCL16mi, 0 }, |
| { X86::RCL32r1, X86::RCL32m1, 0 }, |
| { X86::RCL32rCL, X86::RCL32mCL, 0 }, |
| { X86::RCL32ri, X86::RCL32mi, 0 }, |
| { X86::RCL64r1, X86::RCL64m1, 0 }, |
| { X86::RCL64rCL, X86::RCL64mCL, 0 }, |
| { X86::RCL64ri, X86::RCL64mi, 0 }, |
| { X86::RCL8r1, X86::RCL8m1, 0 }, |
| { X86::RCL8rCL, X86::RCL8mCL, 0 }, |
| { X86::RCL8ri, X86::RCL8mi, 0 }, |
| { X86::RCR16r1, X86::RCR16m1, 0 }, |
| { X86::RCR16rCL, X86::RCR16mCL, 0 }, |
| { X86::RCR16ri, X86::RCR16mi, 0 }, |
| { X86::RCR32r1, X86::RCR32m1, 0 }, |
| { X86::RCR32rCL, X86::RCR32mCL, 0 }, |
| { X86::RCR32ri, X86::RCR32mi, 0 }, |
| { X86::RCR64r1, X86::RCR64m1, 0 }, |
| { X86::RCR64rCL, X86::RCR64mCL, 0 }, |
| { X86::RCR64ri, X86::RCR64mi, 0 }, |
| { X86::RCR8r1, X86::RCR8m1, 0 }, |
| { X86::RCR8rCL, X86::RCR8mCL, 0 }, |
| { X86::RCR8ri, X86::RCR8mi, 0 }, |
| { X86::ROL16r1, X86::ROL16m1, 0 }, |
| { X86::ROL16rCL, X86::ROL16mCL, 0 }, |
| { X86::ROL16ri, X86::ROL16mi, 0 }, |
| { X86::ROL32r1, X86::ROL32m1, 0 }, |
| { X86::ROL32rCL, X86::ROL32mCL, 0 }, |
| { X86::ROL32ri, X86::ROL32mi, 0 }, |
| { X86::ROL64r1, X86::ROL64m1, 0 }, |
| { X86::ROL64rCL, X86::ROL64mCL, 0 }, |
| { X86::ROL64ri, X86::ROL64mi, 0 }, |
| { X86::ROL8r1, X86::ROL8m1, 0 }, |
| { X86::ROL8rCL, X86::ROL8mCL, 0 }, |
| { X86::ROL8ri, X86::ROL8mi, 0 }, |
| { X86::ROR16r1, X86::ROR16m1, 0 }, |
| { X86::ROR16rCL, X86::ROR16mCL, 0 }, |
| { X86::ROR16ri, X86::ROR16mi, 0 }, |
| { X86::ROR32r1, X86::ROR32m1, 0 }, |
| { X86::ROR32rCL, X86::ROR32mCL, 0 }, |
| { X86::ROR32ri, X86::ROR32mi, 0 }, |
| { X86::ROR64r1, X86::ROR64m1, 0 }, |
| { X86::ROR64rCL, X86::ROR64mCL, 0 }, |
| { X86::ROR64ri, X86::ROR64mi, 0 }, |
| { X86::ROR8r1, X86::ROR8m1, 0 }, |
| { X86::ROR8rCL, X86::ROR8mCL, 0 }, |
| { X86::ROR8ri, X86::ROR8mi, 0 }, |
| { X86::SAR16r1, X86::SAR16m1, 0 }, |
| { X86::SAR16rCL, X86::SAR16mCL, 0 }, |
| { X86::SAR16ri, X86::SAR16mi, 0 }, |
| { X86::SAR32r1, X86::SAR32m1, 0 }, |
| { X86::SAR32rCL, X86::SAR32mCL, 0 }, |
| { X86::SAR32ri, X86::SAR32mi, 0 }, |
| { X86::SAR64r1, X86::SAR64m1, 0 }, |
| { X86::SAR64rCL, X86::SAR64mCL, 0 }, |
| { X86::SAR64ri, X86::SAR64mi, 0 }, |
| { X86::SAR8r1, X86::SAR8m1, 0 }, |
| { X86::SAR8rCL, X86::SAR8mCL, 0 }, |
| { X86::SAR8ri, X86::SAR8mi, 0 }, |
| { X86::SBB16ri, X86::SBB16mi, 0 }, |
| { X86::SBB16ri8, X86::SBB16mi8, 0 }, |
| { X86::SBB16rr, X86::SBB16mr, 0 }, |
| { X86::SBB32ri, X86::SBB32mi, 0 }, |
| { X86::SBB32ri8, X86::SBB32mi8, 0 }, |
| { X86::SBB32rr, X86::SBB32mr, 0 }, |
| { X86::SBB64ri32, X86::SBB64mi32, 0 }, |
| { X86::SBB64ri8, X86::SBB64mi8, 0 }, |
| { X86::SBB64rr, X86::SBB64mr, 0 }, |
| { X86::SBB8ri, X86::SBB8mi, 0 }, |
| { X86::SBB8ri8, X86::SBB8mi8, 0 }, |
| { X86::SBB8rr, X86::SBB8mr, 0 }, |
| { X86::SHL16r1, X86::SHL16m1, 0 }, |
| { X86::SHL16rCL, X86::SHL16mCL, 0 }, |
| { X86::SHL16ri, X86::SHL16mi, 0 }, |
| { X86::SHL32r1, X86::SHL32m1, 0 }, |
| { X86::SHL32rCL, X86::SHL32mCL, 0 }, |
| { X86::SHL32ri, X86::SHL32mi, 0 }, |
| { X86::SHL64r1, X86::SHL64m1, 0 }, |
| { X86::SHL64rCL, X86::SHL64mCL, 0 }, |
| { X86::SHL64ri, X86::SHL64mi, 0 }, |
| { X86::SHL8r1, X86::SHL8m1, 0 }, |
| { X86::SHL8rCL, X86::SHL8mCL, 0 }, |
| { X86::SHL8ri, X86::SHL8mi, 0 }, |
| { X86::SHLD16rrCL, X86::SHLD16mrCL, 0 }, |
| { X86::SHLD16rri8, X86::SHLD16mri8, 0 }, |
| { X86::SHLD32rrCL, X86::SHLD32mrCL, 0 }, |
| { X86::SHLD32rri8, X86::SHLD32mri8, 0 }, |
| { X86::SHLD64rrCL, X86::SHLD64mrCL, 0 }, |
| { X86::SHLD64rri8, X86::SHLD64mri8, 0 }, |
| { X86::SHR16r1, X86::SHR16m1, 0 }, |
| { X86::SHR16rCL, X86::SHR16mCL, 0 }, |
| { X86::SHR16ri, X86::SHR16mi, 0 }, |
| { X86::SHR32r1, X86::SHR32m1, 0 }, |
| { X86::SHR32rCL, X86::SHR32mCL, 0 }, |
| { X86::SHR32ri, X86::SHR32mi, 0 }, |
| { X86::SHR64r1, X86::SHR64m1, 0 }, |
| { X86::SHR64rCL, X86::SHR64mCL, 0 }, |
| { X86::SHR64ri, X86::SHR64mi, 0 }, |
| { X86::SHR8r1, X86::SHR8m1, 0 }, |
| { X86::SHR8rCL, X86::SHR8mCL, 0 }, |
| { X86::SHR8ri, X86::SHR8mi, 0 }, |
| { X86::SHRD16rrCL, X86::SHRD16mrCL, 0 }, |
| { X86::SHRD16rri8, X86::SHRD16mri8, 0 }, |
| { X86::SHRD32rrCL, X86::SHRD32mrCL, 0 }, |
| { X86::SHRD32rri8, X86::SHRD32mri8, 0 }, |
| { X86::SHRD64rrCL, X86::SHRD64mrCL, 0 }, |
| { X86::SHRD64rri8, X86::SHRD64mri8, 0 }, |
| { X86::SUB16ri, X86::SUB16mi, 0 }, |
| { X86::SUB16ri8, X86::SUB16mi8, 0 }, |
| { X86::SUB16rr, X86::SUB16mr, 0 }, |
| { X86::SUB32ri, X86::SUB32mi, 0 }, |
| { X86::SUB32ri8, X86::SUB32mi8, 0 }, |
| { X86::SUB32rr, X86::SUB32mr, 0 }, |
| { X86::SUB64ri32, X86::SUB64mi32, 0 }, |
| { X86::SUB64ri8, X86::SUB64mi8, 0 }, |
| { X86::SUB64rr, X86::SUB64mr, 0 }, |
| { X86::SUB8ri, X86::SUB8mi, 0 }, |
| { X86::SUB8ri8, X86::SUB8mi8, 0 }, |
| { X86::SUB8rr, X86::SUB8mr, 0 }, |
| { X86::XOR16ri, X86::XOR16mi, 0 }, |
| { X86::XOR16ri8, X86::XOR16mi8, 0 }, |
| { X86::XOR16rr, X86::XOR16mr, 0 }, |
| { X86::XOR32ri, X86::XOR32mi, 0 }, |
| { X86::XOR32ri8, X86::XOR32mi8, 0 }, |
| { X86::XOR32rr, X86::XOR32mr, 0 }, |
| { X86::XOR64ri32, X86::XOR64mi32, 0 }, |
| { X86::XOR64ri8, X86::XOR64mi8, 0 }, |
| { X86::XOR64rr, X86::XOR64mr, 0 }, |
| { X86::XOR8ri, X86::XOR8mi, 0 }, |
| { X86::XOR8ri8, X86::XOR8mi8, 0 }, |
| { X86::XOR8rr, X86::XOR8mr, 0 }, |
| }; |
| |
| static const X86MemoryFoldTableEntry MemoryFoldTable0[] = { |
| { X86::BT16ri8, X86::BT16mi8, TB_FOLDED_LOAD }, |
| { X86::BT32ri8, X86::BT32mi8, TB_FOLDED_LOAD }, |
| { X86::BT64ri8, X86::BT64mi8, TB_FOLDED_LOAD }, |
| { X86::CALL16r, X86::CALL16m, TB_FOLDED_LOAD }, |
| { X86::CALL16r_NT, X86::CALL16m_NT, TB_FOLDED_LOAD }, |
| { X86::CALL32r, X86::CALL32m, TB_FOLDED_LOAD }, |
| { X86::CALL32r_NT, X86::CALL32m_NT, TB_FOLDED_LOAD }, |
| { X86::CALL64r, X86::CALL64m, TB_FOLDED_LOAD }, |
| { X86::CALL64r_NT, X86::CALL64m_NT, TB_FOLDED_LOAD }, |
| { X86::CMP16ri, X86::CMP16mi, TB_FOLDED_LOAD }, |
| { X86::CMP16ri8, X86::CMP16mi8, TB_FOLDED_LOAD }, |
| { X86::CMP16rr, X86::CMP16mr, TB_FOLDED_LOAD }, |
| { X86::CMP32ri, X86::CMP32mi, TB_FOLDED_LOAD }, |
| { X86::CMP32ri8, X86::CMP32mi8, TB_FOLDED_LOAD }, |
| { X86::CMP32rr, X86::CMP32mr, TB_FOLDED_LOAD }, |
| { X86::CMP64ri32, X86::CMP64mi32, TB_FOLDED_LOAD }, |
| { X86::CMP64ri8, X86::CMP64mi8, TB_FOLDED_LOAD }, |
| { X86::CMP64rr, X86::CMP64mr, TB_FOLDED_LOAD }, |
| { X86::CMP8ri, X86::CMP8mi, TB_FOLDED_LOAD }, |
| { X86::CMP8ri8, X86::CMP8mi8, TB_FOLDED_LOAD }, |
| { X86::CMP8rr, X86::CMP8mr, TB_FOLDED_LOAD }, |
| { X86::DIV16r, X86::DIV16m, TB_FOLDED_LOAD }, |
| { X86::DIV32r, X86::DIV32m, TB_FOLDED_LOAD }, |
| { X86::DIV64r, X86::DIV64m, TB_FOLDED_LOAD }, |
| { X86::DIV8r, X86::DIV8m, TB_FOLDED_LOAD }, |
| { X86::EXTRACTPSrr, X86::EXTRACTPSmr, TB_FOLDED_STORE }, |
| { X86::IDIV16r, X86::IDIV16m, TB_FOLDED_LOAD }, |
| { X86::IDIV32r, X86::IDIV32m, TB_FOLDED_LOAD }, |
| { X86::IDIV64r, X86::IDIV64m, TB_FOLDED_LOAD }, |
| { X86::IDIV8r, X86::IDIV8m, TB_FOLDED_LOAD }, |
| { X86::IMUL16r, X86::IMUL16m, TB_FOLDED_LOAD }, |
| { X86::IMUL32r, X86::IMUL32m, TB_FOLDED_LOAD }, |
| { X86::IMUL64r, X86::IMUL64m, TB_FOLDED_LOAD }, |
| { X86::IMUL8r, X86::IMUL8m, TB_FOLDED_LOAD }, |
| { X86::JMP16r, X86::JMP16m, TB_FOLDED_LOAD }, |
| { X86::JMP16r_NT, X86::JMP16m_NT, TB_FOLDED_LOAD }, |
| { X86::JMP32r, X86::JMP32m, TB_FOLDED_LOAD }, |
| { X86::JMP32r_NT, X86::JMP32m_NT, TB_FOLDED_LOAD }, |
| { X86::JMP64r, X86::JMP64m, TB_FOLDED_LOAD }, |
| { X86::JMP64r_NT, X86::JMP64m_NT, TB_FOLDED_LOAD }, |
| { X86::MMX_MOVD64from64rr, X86::MMX_MOVD64from64rm, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::MMX_MOVD64grr, X86::MMX_MOVD64mr, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::MOV16ri, X86::MOV16mi, TB_FOLDED_STORE }, |
| { X86::MOV16rr, X86::MOV16mr, TB_FOLDED_STORE }, |
| { X86::MOV32ri, X86::MOV32mi, TB_FOLDED_STORE }, |
| { X86::MOV32rr, X86::MOV32mr, TB_FOLDED_STORE }, |
| { X86::MOV64ri32, X86::MOV64mi32, TB_FOLDED_STORE }, |
| { X86::MOV64rr, X86::MOV64mr, TB_FOLDED_STORE }, |
| { X86::MOV8ri, X86::MOV8mi, TB_FOLDED_STORE }, |
| { X86::MOV8rr, X86::MOV8mr, TB_FOLDED_STORE }, |
| { X86::MOV8rr_NOREX, X86::MOV8mr_NOREX, TB_FOLDED_STORE }, |
| { X86::MOVAPDrr, X86::MOVAPDmr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::MOVAPSrr, X86::MOVAPSmr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::MOVDQArr, X86::MOVDQAmr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::MOVDQUrr, X86::MOVDQUmr, TB_FOLDED_STORE }, |
| { X86::MOVPDI2DIrr, X86::MOVPDI2DImr, TB_FOLDED_STORE }, |
| { X86::MOVPQIto64rr, X86::MOVPQI2QImr, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::MOVSDto64rr, X86::MOVSDmr, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::MOVSS2DIrr, X86::MOVSSmr, TB_FOLDED_STORE }, |
| { X86::MOVUPDrr, X86::MOVUPDmr, TB_FOLDED_STORE }, |
| { X86::MOVUPSrr, X86::MOVUPSmr, TB_FOLDED_STORE }, |
| { X86::MUL16r, X86::MUL16m, TB_FOLDED_LOAD }, |
| { X86::MUL32r, X86::MUL32m, TB_FOLDED_LOAD }, |
| { X86::MUL64r, X86::MUL64m, TB_FOLDED_LOAD }, |
| { X86::MUL8r, X86::MUL8m, TB_FOLDED_LOAD }, |
| { X86::PEXTRDrr, X86::PEXTRDmr, TB_FOLDED_STORE }, |
| { X86::PEXTRQrr, X86::PEXTRQmr, TB_FOLDED_STORE }, |
| { X86::PTWRITE64r, X86::PTWRITE64m, TB_FOLDED_LOAD }, |
| { X86::PTWRITEr, X86::PTWRITEm, TB_FOLDED_LOAD }, |
| { X86::PUSH16r, X86::PUSH16rmm, TB_FOLDED_LOAD }, |
| { X86::PUSH32r, X86::PUSH32rmm, TB_FOLDED_LOAD }, |
| { X86::PUSH64r, X86::PUSH64rmm, TB_FOLDED_LOAD }, |
| { X86::SETCCr, X86::SETCCm, TB_FOLDED_STORE }, |
| { X86::TAILJMPr, X86::TAILJMPm, TB_FOLDED_LOAD }, |
| { X86::TAILJMPr64, X86::TAILJMPm64, TB_FOLDED_LOAD }, |
| { X86::TAILJMPr64_REX, X86::TAILJMPm64_REX, TB_FOLDED_LOAD }, |
| { X86::TCRETURNri, X86::TCRETURNmi, TB_FOLDED_LOAD | TB_NO_FORWARD }, |
| { X86::TCRETURNri64, X86::TCRETURNmi64, TB_FOLDED_LOAD | TB_NO_FORWARD }, |
| { X86::TEST16ri, X86::TEST16mi, TB_FOLDED_LOAD }, |
| { X86::TEST16rr, X86::TEST16mr, TB_FOLDED_LOAD }, |
| { X86::TEST32ri, X86::TEST32mi, TB_FOLDED_LOAD }, |
| { X86::TEST32rr, X86::TEST32mr, TB_FOLDED_LOAD }, |
| { X86::TEST64ri32, X86::TEST64mi32, TB_FOLDED_LOAD }, |
| { X86::TEST64rr, X86::TEST64mr, TB_FOLDED_LOAD }, |
| { X86::TEST8ri, X86::TEST8mi, TB_FOLDED_LOAD }, |
| { X86::TEST8rr, X86::TEST8mr, TB_FOLDED_LOAD }, |
| { X86::VCVTPS2PHYrr, X86::VCVTPS2PHYmr, TB_FOLDED_STORE }, |
| { X86::VCVTPS2PHZ256rr, X86::VCVTPS2PHZ256mr, TB_FOLDED_STORE }, |
| { X86::VCVTPS2PHZrr, X86::VCVTPS2PHZmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTF128rr, X86::VEXTRACTF128mr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTF32x4Z256rr, X86::VEXTRACTF32x4Z256mr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTF32x4Zrr, X86::VEXTRACTF32x4Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTF32x8Zrr, X86::VEXTRACTF32x8Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTF64x2Z256rr, X86::VEXTRACTF64x2Z256mr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTF64x2Zrr, X86::VEXTRACTF64x2Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTF64x4Zrr, X86::VEXTRACTF64x4Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTI128rr, X86::VEXTRACTI128mr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTI32x4Z256rr, X86::VEXTRACTI32x4Z256mr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTI32x4Zrr, X86::VEXTRACTI32x4Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTI32x8Zrr, X86::VEXTRACTI32x8Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTI64x2Z256rr, X86::VEXTRACTI64x2Z256mr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTI64x2Zrr, X86::VEXTRACTI64x2Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTI64x4Zrr, X86::VEXTRACTI64x4Zmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTPSZrr, X86::VEXTRACTPSZmr, TB_FOLDED_STORE }, |
| { X86::VEXTRACTPSrr, X86::VEXTRACTPSmr, TB_FOLDED_STORE }, |
| { X86::VMOVAPDYrr, X86::VMOVAPDYmr, TB_FOLDED_STORE | TB_ALIGN_32 }, |
| { X86::VMOVAPDZ128rr, X86::VMOVAPDZ128mr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::VMOVAPDZ256rr, X86::VMOVAPDZ256mr, TB_FOLDED_STORE | TB_ALIGN_32 }, |
| { X86::VMOVAPDZrr, X86::VMOVAPDZmr, TB_FOLDED_STORE | TB_ALIGN_64 }, |
| { X86::VMOVAPDrr, X86::VMOVAPDmr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::VMOVAPSYrr, X86::VMOVAPSYmr, TB_FOLDED_STORE | TB_ALIGN_32 }, |
| { X86::VMOVAPSZ128rr, X86::VMOVAPSZ128mr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::VMOVAPSZ256rr, X86::VMOVAPSZ256mr, TB_FOLDED_STORE | TB_ALIGN_32 }, |
| { X86::VMOVAPSZrr, X86::VMOVAPSZmr, TB_FOLDED_STORE | TB_ALIGN_64 }, |
| { X86::VMOVAPSrr, X86::VMOVAPSmr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::VMOVDQA32Z128rr, X86::VMOVDQA32Z128mr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::VMOVDQA32Z256rr, X86::VMOVDQA32Z256mr, TB_FOLDED_STORE | TB_ALIGN_32 }, |
| { X86::VMOVDQA32Zrr, X86::VMOVDQA32Zmr, TB_FOLDED_STORE | TB_ALIGN_64 }, |
| { X86::VMOVDQA64Z128rr, X86::VMOVDQA64Z128mr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::VMOVDQA64Z256rr, X86::VMOVDQA64Z256mr, TB_FOLDED_STORE | TB_ALIGN_32 }, |
| { X86::VMOVDQA64Zrr, X86::VMOVDQA64Zmr, TB_FOLDED_STORE | TB_ALIGN_64 }, |
| { X86::VMOVDQAYrr, X86::VMOVDQAYmr, TB_FOLDED_STORE | TB_ALIGN_32 }, |
| { X86::VMOVDQArr, X86::VMOVDQAmr, TB_FOLDED_STORE | TB_ALIGN_16 }, |
| { X86::VMOVDQU16Z128rr, X86::VMOVDQU16Z128mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU16Z256rr, X86::VMOVDQU16Z256mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU16Zrr, X86::VMOVDQU16Zmr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU32Z128rr, X86::VMOVDQU32Z128mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU32Z256rr, X86::VMOVDQU32Z256mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU32Zrr, X86::VMOVDQU32Zmr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU64Z128rr, X86::VMOVDQU64Z128mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU64Z256rr, X86::VMOVDQU64Z256mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU64Zrr, X86::VMOVDQU64Zmr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU8Z128rr, X86::VMOVDQU8Z128mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU8Z256rr, X86::VMOVDQU8Z256mr, TB_FOLDED_STORE }, |
| { X86::VMOVDQU8Zrr, X86::VMOVDQU8Zmr, TB_FOLDED_STORE }, |
| { X86::VMOVDQUYrr, X86::VMOVDQUYmr, TB_FOLDED_STORE }, |
| { X86::VMOVDQUrr, X86::VMOVDQUmr, TB_FOLDED_STORE }, |
| { X86::VMOVPDI2DIZrr, X86::VMOVPDI2DIZmr, TB_FOLDED_STORE }, |
| { X86::VMOVPDI2DIrr, X86::VMOVPDI2DImr, TB_FOLDED_STORE }, |
| { X86::VMOVPQIto64Zrr, X86::VMOVPQI2QIZmr, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::VMOVPQIto64rr, X86::VMOVPQI2QImr, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::VMOVSDto64Zrr, X86::VMOVSDZmr, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::VMOVSDto64rr, X86::VMOVSDmr, TB_FOLDED_STORE | TB_NO_REVERSE }, |
| { X86::VMOVSS2DIZrr, X86::VMOVSSZmr, TB_FOLDED_STORE }, |
| { X86::VMOVSS2DIrr, X86::VMOVSSmr, TB_FOLDED_STORE }, |
| { X86::VMOVUPDYrr, X86::VMOVUPDYmr, TB_FOLDED_STORE }, |
| { X86::VMOVUPDZ128rr, X86::VMOVUPDZ128mr, TB_FOLDED_STORE }, |
| { X86::VMOVUPDZ256rr, X86::VMOVUPDZ256mr, TB_FOLDED_STORE }, |
| { X86::VMOVUPDZrr, X86::VMOVUPDZmr, TB_FOLDED_STORE }, |
| { X86::VMOVUPDrr, X86::VMOVUPDmr, TB_FOLDED_STORE }, |
| { X86::VMOVUPSYrr, X86::VMOVUPSYmr, TB_FOLDED_STORE }, |
| { X86::VMOVUPSZ128rr, X86::VMOVUPSZ128mr, TB_FOLDED_STORE }, |
| { X86::VMOVUPSZ256rr, X86::VMOVUPSZ256mr, TB_FOLDED_STORE }, |
| { X86::VMOVUPSZrr, X86::VMOVUPSZmr, TB_FOLDED_STORE }, |
| { X86::VMOVUPSrr, X86::VMOVUPSmr, TB_FOLDED_STORE }, |
| { X86::VPEXTRDZrr, X86::VPEXTRDZmr, TB_FOLDED_STORE }, |
| { X86::VPEXTRDrr, X86::VPEXTRDmr, TB_FOLDED_STORE }, |
| { X86::VPEXTRQZrr, X86::VPEXTRQZmr, TB_FOLDED_STORE }, |
| { X86::VPEXTRQrr, X86::VPEXTRQmr, TB_FOLDED_STORE }, |
| { X86::VPMOVDBZrr, X86::VPMOVDBZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVDWZ256rr, X86::VPMOVDWZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVDWZrr, X86::VPMOVDWZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVQDZ256rr, X86::VPMOVQDZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVQDZrr, X86::VPMOVQDZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVQWZrr, X86::VPMOVQWZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVSDBZrr, X86::VPMOVSDBZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVSDWZ256rr, X86::VPMOVSDWZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVSDWZrr, X86::VPMOVSDWZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVSQDZ256rr, X86::VPMOVSQDZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVSQDZrr, X86::VPMOVSQDZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVSQWZrr, X86::VPMOVSQWZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVSWBZ256rr, X86::VPMOVSWBZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVSWBZrr, X86::VPMOVSWBZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSDBZrr, X86::VPMOVUSDBZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSDWZ256rr, X86::VPMOVUSDWZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSDWZrr, X86::VPMOVUSDWZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSQDZ256rr, X86::VPMOVUSQDZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSQDZrr, X86::VPMOVUSQDZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSQWZrr, X86::VPMOVUSQWZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSWBZ256rr, X86::VPMOVUSWBZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVUSWBZrr, X86::VPMOVUSWBZmr, TB_FOLDED_STORE }, |
| { X86::VPMOVWBZ256rr, X86::VPMOVWBZ256mr, TB_FOLDED_STORE }, |
| { X86::VPMOVWBZrr, X86::VPMOVWBZmr, TB_FOLDED_STORE }, |
| }; |
| |
| static const X86MemoryFoldTableEntry MemoryFoldTable1[] = { |
| { X86::AESIMCrr, X86::AESIMCrm, TB_ALIGN_16 }, |
| { X86::AESKEYGENASSIST128rr, X86::AESKEYGENASSIST128rm, TB_ALIGN_16 }, |
| { X86::BEXTR32rr, X86::BEXTR32rm, 0 }, |
| { X86::BEXTR64rr, X86::BEXTR64rm, 0 }, |
| { X86::BEXTRI32ri, X86::BEXTRI32mi, 0 }, |
| { X86::BEXTRI64ri, X86::BEXTRI64mi, 0 }, |
| { X86::BLCFILL32rr, X86::BLCFILL32rm, 0 }, |
| { X86::BLCFILL64rr, X86::BLCFILL64rm, 0 }, |
| { X86::BLCI32rr, X86::BLCI32rm, 0 }, |
| { X86::BLCI64rr, X86::BLCI64rm, 0 }, |
| { X86::BLCIC32rr, X86::BLCIC32rm, 0 }, |
| { X86::BLCIC64rr, X86::BLCIC64rm, 0 }, |
| { X86::BLCMSK32rr, X86::BLCMSK32rm, 0 }, |
| { X86::BLCMSK64rr, X86::BLCMSK64rm, 0 }, |
| { X86::BLCS32rr, X86::BLCS32rm, 0 }, |
| { X86::BLCS64rr, X86::BLCS64rm, 0 }, |
| { X86::BLSFILL32rr, X86::BLSFILL32rm, 0 }, |
| { X86::BLSFILL64rr, X86::BLSFILL64rm, 0 }, |
| { X86::BLSI32rr, X86::BLSI32rm, 0 }, |
| { X86::BLSI64rr, X86::BLSI64rm, 0 }, |
| { X86::BLSIC32rr, X86::BLSIC32rm, 0 }, |
| { X86::BLSIC64rr, X86::BLSIC64rm, 0 }, |
| { X86::BLSMSK32rr, X86::BLSMSK32rm, 0 }, |
| { X86::BLSMSK64rr, X86::BLSMSK64rm, 0 }, |
| { X86::BLSR32rr, X86::BLSR32rm, 0 }, |
| { X86::BLSR64rr, X86::BLSR64rm, 0 }, |
| { X86::BSF16rr, X86::BSF16rm, 0 }, |
| { X86::BSF32rr, X86::BSF32rm, 0 }, |
| { X86::BSF64rr, X86::BSF64rm, 0 }, |
| { X86::BSR16rr, X86::BSR16rm, 0 }, |
| { X86::BSR32rr, X86::BSR32rm, 0 }, |
| { X86::BSR64rr, X86::BSR64rm, 0 }, |
| { X86::BZHI32rr, X86::BZHI32rm, 0 }, |
| { X86::BZHI64rr, X86::BZHI64rm, 0 }, |
| { X86::CMP16rr, X86::CMP16rm, 0 }, |
| { X86::CMP32rr, X86::CMP32rm, 0 }, |
| { X86::CMP64rr, X86::CMP64rm, 0 }, |
| { X86::CMP8rr, X86::CMP8rm, 0 }, |
| { X86::COMISDrr, X86::COMISDrm, 0 }, |
| { X86::COMISDrr_Int, X86::COMISDrm_Int, TB_NO_REVERSE }, |
| { X86::COMISSrr, X86::COMISSrm, 0 }, |
| { X86::COMISSrr_Int, X86::COMISSrm_Int, TB_NO_REVERSE }, |
| { X86::CVTDQ2PDrr, X86::CVTDQ2PDrm, TB_NO_REVERSE }, |
| { X86::CVTDQ2PSrr, X86::CVTDQ2PSrm, TB_ALIGN_16 }, |
| { X86::CVTPD2DQrr, X86::CVTPD2DQrm, TB_ALIGN_16 }, |
| { X86::CVTPD2PSrr, X86::CVTPD2PSrm, TB_ALIGN_16 }, |
| { X86::CVTPS2DQrr, X86::CVTPS2DQrm, TB_ALIGN_16 }, |
| { X86::CVTPS2PDrr, X86::CVTPS2PDrm, TB_NO_REVERSE }, |
| { X86::CVTSD2SI64rr_Int, X86::CVTSD2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::CVTSD2SIrr_Int, X86::CVTSD2SIrm_Int, TB_NO_REVERSE }, |
| { X86::CVTSD2SSrr, X86::CVTSD2SSrm, 0 }, |
| { X86::CVTSI2SDrr, X86::CVTSI2SDrm, 0 }, |
| { X86::CVTSI2SSrr, X86::CVTSI2SSrm, 0 }, |
| { X86::CVTSI642SDrr, X86::CVTSI642SDrm, 0 }, |
| { X86::CVTSI642SSrr, X86::CVTSI642SSrm, 0 }, |
| { X86::CVTSS2SDrr, X86::CVTSS2SDrm, 0 }, |
| { X86::CVTSS2SI64rr_Int, X86::CVTSS2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::CVTSS2SIrr_Int, X86::CVTSS2SIrm_Int, TB_NO_REVERSE }, |
| { X86::CVTTPD2DQrr, X86::CVTTPD2DQrm, TB_ALIGN_16 }, |
| { X86::CVTTPS2DQrr, X86::CVTTPS2DQrm, TB_ALIGN_16 }, |
| { X86::CVTTSD2SI64rr, X86::CVTTSD2SI64rm, 0 }, |
| { X86::CVTTSD2SI64rr_Int, X86::CVTTSD2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::CVTTSD2SIrr, X86::CVTTSD2SIrm, 0 }, |
| { X86::CVTTSD2SIrr_Int, X86::CVTTSD2SIrm_Int, TB_NO_REVERSE }, |
| { X86::CVTTSS2SI64rr, X86::CVTTSS2SI64rm, 0 }, |
| { X86::CVTTSS2SI64rr_Int, X86::CVTTSS2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::CVTTSS2SIrr, X86::CVTTSS2SIrm, 0 }, |
| { X86::CVTTSS2SIrr_Int, X86::CVTTSS2SIrm_Int, TB_NO_REVERSE }, |
| { X86::IMUL16rri, X86::IMUL16rmi, 0 }, |
| { X86::IMUL16rri8, X86::IMUL16rmi8, 0 }, |
| { X86::IMUL32rri, X86::IMUL32rmi, 0 }, |
| { X86::IMUL32rri8, X86::IMUL32rmi8, 0 }, |
| { X86::IMUL64rri32, X86::IMUL64rmi32, 0 }, |
| { X86::IMUL64rri8, X86::IMUL64rmi8, 0 }, |
| { X86::LWPINS32rri, X86::LWPINS32rmi, 0 }, |
| { X86::LWPINS64rri, X86::LWPINS64rmi, 0 }, |
| { X86::LWPVAL32rri, X86::LWPVAL32rmi, 0 }, |
| { X86::LWPVAL64rri, X86::LWPVAL64rmi, 0 }, |
| { X86::LZCNT16rr, X86::LZCNT16rm, 0 }, |
| { X86::LZCNT32rr, X86::LZCNT32rm, 0 }, |
| { X86::LZCNT64rr, X86::LZCNT64rm, 0 }, |
| { X86::MMX_CVTPD2PIirr, X86::MMX_CVTPD2PIirm, TB_ALIGN_16 }, |
| { X86::MMX_CVTPI2PDirr, X86::MMX_CVTPI2PDirm, 0 }, |
| { X86::MMX_CVTPS2PIirr, X86::MMX_CVTPS2PIirm, TB_NO_REVERSE }, |
| { X86::MMX_CVTTPD2PIirr, X86::MMX_CVTTPD2PIirm, TB_ALIGN_16 }, |
| { X86::MMX_CVTTPS2PIirr, X86::MMX_CVTTPS2PIirm, TB_NO_REVERSE }, |
| { X86::MMX_MOVD64to64rr, X86::MMX_MOVQ64rm, 0 }, |
| { X86::MMX_PABSBrr, X86::MMX_PABSBrm, 0 }, |
| { X86::MMX_PABSDrr, X86::MMX_PABSDrm, 0 }, |
| { X86::MMX_PABSWrr, X86::MMX_PABSWrm, 0 }, |
| { X86::MMX_PSHUFWri, X86::MMX_PSHUFWmi, 0 }, |
| { X86::MOV16rr, X86::MOV16rm, 0 }, |
| { X86::MOV32rr, X86::MOV32rm, 0 }, |
| { X86::MOV64rr, X86::MOV64rm, 0 }, |
| { X86::MOV64toPQIrr, X86::MOVQI2PQIrm, TB_NO_REVERSE }, |
| { X86::MOV64toSDrr, X86::MOVSDrm_alt, TB_NO_REVERSE }, |
| { X86::MOV8rr, X86::MOV8rm, 0 }, |
| { X86::MOVAPDrr, X86::MOVAPDrm, TB_ALIGN_16 }, |
| { X86::MOVAPSrr, X86::MOVAPSrm, TB_ALIGN_16 }, |
| { X86::MOVDDUPrr, X86::MOVDDUPrm, TB_NO_REVERSE }, |
| { X86::MOVDI2PDIrr, X86::MOVDI2PDIrm, 0 }, |
| { X86::MOVDI2SSrr, X86::MOVSSrm_alt, 0 }, |
| { X86::MOVDQArr, X86::MOVDQArm, TB_ALIGN_16 }, |
| { X86::MOVDQUrr, X86::MOVDQUrm, 0 }, |
| { X86::MOVSHDUPrr, X86::MOVSHDUPrm, TB_ALIGN_16 }, |
| { X86::MOVSLDUPrr, X86::MOVSLDUPrm, TB_ALIGN_16 }, |
| { X86::MOVSX16rr8, X86::MOVSX16rm8, 0 }, |
| { X86::MOVSX32rr16, X86::MOVSX32rm16, 0 }, |
| { X86::MOVSX32rr8, X86::MOVSX32rm8, 0 }, |
| { X86::MOVSX32rr8_NOREX, X86::MOVSX32rm8_NOREX, 0 }, |
| { X86::MOVSX64rr16, X86::MOVSX64rm16, 0 }, |
| { X86::MOVSX64rr32, X86::MOVSX64rm32, 0 }, |
| { X86::MOVSX64rr8, X86::MOVSX64rm8, 0 }, |
| { X86::MOVUPDrr, X86::MOVUPDrm, 0 }, |
| { X86::MOVUPSrr, X86::MOVUPSrm, 0 }, |
| { X86::MOVZPQILo2PQIrr, X86::MOVQI2PQIrm, TB_NO_REVERSE }, |
| { X86::MOVZX16rr8, X86::MOVZX16rm8, 0 }, |
| { X86::MOVZX32rr16, X86::MOVZX32rm16, 0 }, |
| { X86::MOVZX32rr8, X86::MOVZX32rm8, 0 }, |
| { X86::MOVZX32rr8_NOREX, X86::MOVZX32rm8_NOREX, 0 }, |
| { X86::MOVZX64rr16, X86::MOVZX64rm16, 0 }, |
| { X86::MOVZX64rr8, X86::MOVZX64rm8, 0 }, |
| { X86::PABSBrr, X86::PABSBrm, TB_ALIGN_16 }, |
| { X86::PABSDrr, X86::PABSDrm, TB_ALIGN_16 }, |
| { X86::PABSWrr, X86::PABSWrm, TB_ALIGN_16 }, |
| { X86::PCMPESTRIrr, X86::PCMPESTRIrm, 0 }, |
| { X86::PCMPESTRMrr, X86::PCMPESTRMrm, 0 }, |
| { X86::PCMPISTRIrr, X86::PCMPISTRIrm, 0 }, |
| { X86::PCMPISTRMrr, X86::PCMPISTRMrm, 0 }, |
| { X86::PF2IDrr, X86::PF2IDrm, 0 }, |
| { X86::PF2IWrr, X86::PF2IWrm, 0 }, |
| { X86::PFRCPrr, X86::PFRCPrm, 0 }, |
| { X86::PFRSQRTrr, X86::PFRSQRTrm, 0 }, |
| { X86::PHMINPOSUWrr, X86::PHMINPOSUWrm, TB_ALIGN_16 }, |
| { X86::PI2FDrr, X86::PI2FDrm, 0 }, |
| { X86::PI2FWrr, X86::PI2FWrm, 0 }, |
| { X86::PMOVSXBDrr, X86::PMOVSXBDrm, TB_NO_REVERSE }, |
| { X86::PMOVSXBQrr, X86::PMOVSXBQrm, TB_NO_REVERSE }, |
| { X86::PMOVSXBWrr, X86::PMOVSXBWrm, TB_NO_REVERSE }, |
| { X86::PMOVSXDQrr, X86::PMOVSXDQrm, TB_NO_REVERSE }, |
| { X86::PMOVSXWDrr, X86::PMOVSXWDrm, TB_NO_REVERSE }, |
| { X86::PMOVSXWQrr, X86::PMOVSXWQrm, TB_NO_REVERSE }, |
| { X86::PMOVZXBDrr, X86::PMOVZXBDrm, TB_NO_REVERSE }, |
| { X86::PMOVZXBQrr, X86::PMOVZXBQrm, TB_NO_REVERSE }, |
| { X86::PMOVZXBWrr, X86::PMOVZXBWrm, TB_NO_REVERSE }, |
| { X86::PMOVZXDQrr, X86::PMOVZXDQrm, TB_NO_REVERSE }, |
| { X86::PMOVZXWDrr, X86::PMOVZXWDrm, TB_NO_REVERSE }, |
| { X86::PMOVZXWQrr, X86::PMOVZXWQrm, TB_NO_REVERSE }, |
| { X86::POPCNT16rr, X86::POPCNT16rm, 0 }, |
| { X86::POPCNT32rr, X86::POPCNT32rm, 0 }, |
| { X86::POPCNT64rr, X86::POPCNT64rm, 0 }, |
| { X86::PSHUFDri, X86::PSHUFDmi, TB_ALIGN_16 }, |
| { X86::PSHUFHWri, X86::PSHUFHWmi, TB_ALIGN_16 }, |
| { X86::PSHUFLWri, X86::PSHUFLWmi, TB_ALIGN_16 }, |
| { X86::PSWAPDrr, X86::PSWAPDrm, 0 }, |
| { X86::PTESTrr, X86::PTESTrm, TB_ALIGN_16 }, |
| { X86::RCPPSr, X86::RCPPSm, TB_ALIGN_16 }, |
| { X86::RCPSSr, X86::RCPSSm, 0 }, |
| { X86::RORX32ri, X86::RORX32mi, 0 }, |
| { X86::RORX64ri, X86::RORX64mi, 0 }, |
| { X86::ROUNDPDr, X86::ROUNDPDm, TB_ALIGN_16 }, |
| { X86::ROUNDPSr, X86::ROUNDPSm, TB_ALIGN_16 }, |
| { X86::ROUNDSDr, X86::ROUNDSDm, 0 }, |
| { X86::ROUNDSSr, X86::ROUNDSSm, 0 }, |
| { X86::RSQRTPSr, X86::RSQRTPSm, TB_ALIGN_16 }, |
| { X86::RSQRTSSr, X86::RSQRTSSm, 0 }, |
| { X86::SARX32rr, X86::SARX32rm, 0 }, |
| { X86::SARX64rr, X86::SARX64rm, 0 }, |
| { X86::SHLX32rr, X86::SHLX32rm, 0 }, |
| { X86::SHLX64rr, X86::SHLX64rm, 0 }, |
| { X86::SHRX32rr, X86::SHRX32rm, 0 }, |
| { X86::SHRX64rr, X86::SHRX64rm, 0 }, |
| { X86::SQRTPDr, X86::SQRTPDm, TB_ALIGN_16 }, |
| { X86::SQRTPSr, X86::SQRTPSm, TB_ALIGN_16 }, |
| { X86::SQRTSDr, X86::SQRTSDm, 0 }, |
| { X86::SQRTSSr, X86::SQRTSSm, 0 }, |
| { X86::T1MSKC32rr, X86::T1MSKC32rm, 0 }, |
| { X86::T1MSKC64rr, X86::T1MSKC64rm, 0 }, |
| { X86::TZCNT16rr, X86::TZCNT16rm, 0 }, |
| { X86::TZCNT32rr, X86::TZCNT32rm, 0 }, |
| { X86::TZCNT64rr, X86::TZCNT64rm, 0 }, |
| { X86::TZMSK32rr, X86::TZMSK32rm, 0 }, |
| { X86::TZMSK64rr, X86::TZMSK64rm, 0 }, |
| { X86::UCOMISDrr, X86::UCOMISDrm, 0 }, |
| { X86::UCOMISDrr_Int, X86::UCOMISDrm_Int, TB_NO_REVERSE }, |
| { X86::UCOMISSrr, X86::UCOMISSrm, 0 }, |
| { X86::UCOMISSrr_Int, X86::UCOMISSrm_Int, TB_NO_REVERSE }, |
| { X86::VAESIMCrr, X86::VAESIMCrm, 0 }, |
| { X86::VAESKEYGENASSIST128rr,X86::VAESKEYGENASSIST128rm,0 }, |
| { X86::VBROADCASTF32X2Z256r, X86::VBROADCASTF32X2Z256m, TB_NO_REVERSE }, |
| { X86::VBROADCASTF32X2Zr, X86::VBROADCASTF32X2Zm, TB_NO_REVERSE }, |
| { X86::VBROADCASTI32X2Z128r, X86::VBROADCASTI32X2Z128m, TB_NO_REVERSE }, |
| { X86::VBROADCASTI32X2Z256r, X86::VBROADCASTI32X2Z256m, TB_NO_REVERSE }, |
| { X86::VBROADCASTI32X2Zr, X86::VBROADCASTI32X2Zm, TB_NO_REVERSE }, |
| { X86::VBROADCASTSDYrr, X86::VBROADCASTSDYrm, TB_NO_REVERSE }, |
| { X86::VBROADCASTSDZ256r, X86::VBROADCASTSDZ256m, TB_NO_REVERSE }, |
| { X86::VBROADCASTSDZr, X86::VBROADCASTSDZm, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSYrr, X86::VBROADCASTSSYrm, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSZ128r, X86::VBROADCASTSSZ128m, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSZ256r, X86::VBROADCASTSSZ256m, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSZr, X86::VBROADCASTSSZm, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSrr, X86::VBROADCASTSSrm, TB_NO_REVERSE }, |
| { X86::VCOMISDZrr, X86::VCOMISDZrm, 0 }, |
| { X86::VCOMISDZrr_Int, X86::VCOMISDZrm_Int, TB_NO_REVERSE }, |
| { X86::VCOMISDrr, X86::VCOMISDrm, 0 }, |
| { X86::VCOMISDrr_Int, X86::VCOMISDrm_Int, TB_NO_REVERSE }, |
| { X86::VCOMISSZrr, X86::VCOMISSZrm, 0 }, |
| { X86::VCOMISSZrr_Int, X86::VCOMISSZrm_Int, TB_NO_REVERSE }, |
| { X86::VCOMISSrr, X86::VCOMISSrm, 0 }, |
| { X86::VCOMISSrr_Int, X86::VCOMISSrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTDQ2PDYrr, X86::VCVTDQ2PDYrm, 0 }, |
| { X86::VCVTDQ2PDZ128rr, X86::VCVTDQ2PDZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTDQ2PDZ256rr, X86::VCVTDQ2PDZ256rm, 0 }, |
| { X86::VCVTDQ2PDZrr, X86::VCVTDQ2PDZrm, 0 }, |
| { X86::VCVTDQ2PDrr, X86::VCVTDQ2PDrm, TB_NO_REVERSE }, |
| { X86::VCVTDQ2PSYrr, X86::VCVTDQ2PSYrm, 0 }, |
| { X86::VCVTDQ2PSZ128rr, X86::VCVTDQ2PSZ128rm, 0 }, |
| { X86::VCVTDQ2PSZ256rr, X86::VCVTDQ2PSZ256rm, 0 }, |
| { X86::VCVTDQ2PSZrr, X86::VCVTDQ2PSZrm, 0 }, |
| { X86::VCVTDQ2PSrr, X86::VCVTDQ2PSrm, 0 }, |
| { X86::VCVTNEPS2BF16Z128rr, X86::VCVTNEPS2BF16Z128rm, 0 }, |
| { X86::VCVTNEPS2BF16Z256rr, X86::VCVTNEPS2BF16Z256rm, 0 }, |
| { X86::VCVTNEPS2BF16Zrr, X86::VCVTNEPS2BF16Zrm, 0 }, |
| { X86::VCVTPD2DQYrr, X86::VCVTPD2DQYrm, 0 }, |
| { X86::VCVTPD2DQZ128rr, X86::VCVTPD2DQZ128rm, 0 }, |
| { X86::VCVTPD2DQZ256rr, X86::VCVTPD2DQZ256rm, 0 }, |
| { X86::VCVTPD2DQZrr, X86::VCVTPD2DQZrm, 0 }, |
| { X86::VCVTPD2DQrr, X86::VCVTPD2DQrm, 0 }, |
| { X86::VCVTPD2PSYrr, X86::VCVTPD2PSYrm, 0 }, |
| { X86::VCVTPD2PSZ128rr, X86::VCVTPD2PSZ128rm, 0 }, |
| { X86::VCVTPD2PSZ256rr, X86::VCVTPD2PSZ256rm, 0 }, |
| { X86::VCVTPD2PSZrr, X86::VCVTPD2PSZrm, 0 }, |
| { X86::VCVTPD2PSrr, X86::VCVTPD2PSrm, 0 }, |
| { X86::VCVTPD2QQZ128rr, X86::VCVTPD2QQZ128rm, 0 }, |
| { X86::VCVTPD2QQZ256rr, X86::VCVTPD2QQZ256rm, 0 }, |
| { X86::VCVTPD2QQZrr, X86::VCVTPD2QQZrm, 0 }, |
| { X86::VCVTPD2UDQZ128rr, X86::VCVTPD2UDQZ128rm, 0 }, |
| { X86::VCVTPD2UDQZ256rr, X86::VCVTPD2UDQZ256rm, 0 }, |
| { X86::VCVTPD2UDQZrr, X86::VCVTPD2UDQZrm, 0 }, |
| { X86::VCVTPD2UQQZ128rr, X86::VCVTPD2UQQZ128rm, 0 }, |
| { X86::VCVTPD2UQQZ256rr, X86::VCVTPD2UQQZ256rm, 0 }, |
| { X86::VCVTPD2UQQZrr, X86::VCVTPD2UQQZrm, 0 }, |
| { X86::VCVTPH2PSYrr, X86::VCVTPH2PSYrm, 0 }, |
| { X86::VCVTPH2PSZ128rr, X86::VCVTPH2PSZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTPH2PSZ256rr, X86::VCVTPH2PSZ256rm, 0 }, |
| { X86::VCVTPH2PSZrr, X86::VCVTPH2PSZrm, 0 }, |
| { X86::VCVTPH2PSrr, X86::VCVTPH2PSrm, TB_NO_REVERSE }, |
| { X86::VCVTPS2DQYrr, X86::VCVTPS2DQYrm, 0 }, |
| { X86::VCVTPS2DQZ128rr, X86::VCVTPS2DQZ128rm, 0 }, |
| { X86::VCVTPS2DQZ256rr, X86::VCVTPS2DQZ256rm, 0 }, |
| { X86::VCVTPS2DQZrr, X86::VCVTPS2DQZrm, 0 }, |
| { X86::VCVTPS2DQrr, X86::VCVTPS2DQrm, 0 }, |
| { X86::VCVTPS2PDYrr, X86::VCVTPS2PDYrm, 0 }, |
| { X86::VCVTPS2PDZ128rr, X86::VCVTPS2PDZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTPS2PDZ256rr, X86::VCVTPS2PDZ256rm, 0 }, |
| { X86::VCVTPS2PDZrr, X86::VCVTPS2PDZrm, 0 }, |
| { X86::VCVTPS2PDrr, X86::VCVTPS2PDrm, TB_NO_REVERSE }, |
| { X86::VCVTPS2QQZ128rr, X86::VCVTPS2QQZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTPS2QQZ256rr, X86::VCVTPS2QQZ256rm, 0 }, |
| { X86::VCVTPS2QQZrr, X86::VCVTPS2QQZrm, 0 }, |
| { X86::VCVTPS2UDQZ128rr, X86::VCVTPS2UDQZ128rm, 0 }, |
| { X86::VCVTPS2UDQZ256rr, X86::VCVTPS2UDQZ256rm, 0 }, |
| { X86::VCVTPS2UDQZrr, X86::VCVTPS2UDQZrm, 0 }, |
| { X86::VCVTPS2UQQZ128rr, X86::VCVTPS2UQQZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTPS2UQQZ256rr, X86::VCVTPS2UQQZ256rm, 0 }, |
| { X86::VCVTPS2UQQZrr, X86::VCVTPS2UQQZrm, 0 }, |
| { X86::VCVTQQ2PDZ128rr, X86::VCVTQQ2PDZ128rm, 0 }, |
| { X86::VCVTQQ2PDZ256rr, X86::VCVTQQ2PDZ256rm, 0 }, |
| { X86::VCVTQQ2PDZrr, X86::VCVTQQ2PDZrm, 0 }, |
| { X86::VCVTQQ2PSZ128rr, X86::VCVTQQ2PSZ128rm, 0 }, |
| { X86::VCVTQQ2PSZ256rr, X86::VCVTQQ2PSZ256rm, 0 }, |
| { X86::VCVTQQ2PSZrr, X86::VCVTQQ2PSZrm, 0 }, |
| { X86::VCVTSD2SI64Zrr_Int, X86::VCVTSD2SI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSD2SI64rr_Int, X86::VCVTSD2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSD2SIZrr_Int, X86::VCVTSD2SIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSD2SIrr_Int, X86::VCVTSD2SIrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSD2USI64Zrr_Int, X86::VCVTSD2USI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSD2USIZrr_Int, X86::VCVTSD2USIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSS2SI64Zrr_Int, X86::VCVTSS2SI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSS2SI64rr_Int, X86::VCVTSS2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSS2SIZrr_Int, X86::VCVTSS2SIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSS2SIrr_Int, X86::VCVTSS2SIrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSS2USI64Zrr_Int, X86::VCVTSS2USI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSS2USIZrr_Int, X86::VCVTSS2USIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTPD2DQYrr, X86::VCVTTPD2DQYrm, 0 }, |
| { X86::VCVTTPD2DQZ128rr, X86::VCVTTPD2DQZ128rm, 0 }, |
| { X86::VCVTTPD2DQZ256rr, X86::VCVTTPD2DQZ256rm, 0 }, |
| { X86::VCVTTPD2DQZrr, X86::VCVTTPD2DQZrm, 0 }, |
| { X86::VCVTTPD2DQrr, X86::VCVTTPD2DQrm, 0 }, |
| { X86::VCVTTPD2QQZ128rr, X86::VCVTTPD2QQZ128rm, 0 }, |
| { X86::VCVTTPD2QQZ256rr, X86::VCVTTPD2QQZ256rm, 0 }, |
| { X86::VCVTTPD2QQZrr, X86::VCVTTPD2QQZrm, 0 }, |
| { X86::VCVTTPD2UDQZ128rr, X86::VCVTTPD2UDQZ128rm, 0 }, |
| { X86::VCVTTPD2UDQZ256rr, X86::VCVTTPD2UDQZ256rm, 0 }, |
| { X86::VCVTTPD2UDQZrr, X86::VCVTTPD2UDQZrm, 0 }, |
| { X86::VCVTTPD2UQQZ128rr, X86::VCVTTPD2UQQZ128rm, 0 }, |
| { X86::VCVTTPD2UQQZ256rr, X86::VCVTTPD2UQQZ256rm, 0 }, |
| { X86::VCVTTPD2UQQZrr, X86::VCVTTPD2UQQZrm, 0 }, |
| { X86::VCVTTPS2DQYrr, X86::VCVTTPS2DQYrm, 0 }, |
| { X86::VCVTTPS2DQZ128rr, X86::VCVTTPS2DQZ128rm, 0 }, |
| { X86::VCVTTPS2DQZ256rr, X86::VCVTTPS2DQZ256rm, 0 }, |
| { X86::VCVTTPS2DQZrr, X86::VCVTTPS2DQZrm, 0 }, |
| { X86::VCVTTPS2DQrr, X86::VCVTTPS2DQrm, 0 }, |
| { X86::VCVTTPS2QQZ128rr, X86::VCVTTPS2QQZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTTPS2QQZ256rr, X86::VCVTTPS2QQZ256rm, 0 }, |
| { X86::VCVTTPS2QQZrr, X86::VCVTTPS2QQZrm, 0 }, |
| { X86::VCVTTPS2UDQZ128rr, X86::VCVTTPS2UDQZ128rm, 0 }, |
| { X86::VCVTTPS2UDQZ256rr, X86::VCVTTPS2UDQZ256rm, 0 }, |
| { X86::VCVTTPS2UDQZrr, X86::VCVTTPS2UDQZrm, 0 }, |
| { X86::VCVTTPS2UQQZ128rr, X86::VCVTTPS2UQQZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTTPS2UQQZ256rr, X86::VCVTTPS2UQQZ256rm, 0 }, |
| { X86::VCVTTPS2UQQZrr, X86::VCVTTPS2UQQZrm, 0 }, |
| { X86::VCVTTSD2SI64Zrr, X86::VCVTTSD2SI64Zrm, 0 }, |
| { X86::VCVTTSD2SI64Zrr_Int, X86::VCVTTSD2SI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSD2SI64rr, X86::VCVTTSD2SI64rm, 0 }, |
| { X86::VCVTTSD2SI64rr_Int, X86::VCVTTSD2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSD2SIZrr, X86::VCVTTSD2SIZrm, 0 }, |
| { X86::VCVTTSD2SIZrr_Int, X86::VCVTTSD2SIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSD2SIrr, X86::VCVTTSD2SIrm, 0 }, |
| { X86::VCVTTSD2SIrr_Int, X86::VCVTTSD2SIrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSD2USI64Zrr, X86::VCVTTSD2USI64Zrm, 0 }, |
| { X86::VCVTTSD2USI64Zrr_Int, X86::VCVTTSD2USI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSD2USIZrr, X86::VCVTTSD2USIZrm, 0 }, |
| { X86::VCVTTSD2USIZrr_Int, X86::VCVTTSD2USIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSS2SI64Zrr, X86::VCVTTSS2SI64Zrm, 0 }, |
| { X86::VCVTTSS2SI64Zrr_Int, X86::VCVTTSS2SI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSS2SI64rr, X86::VCVTTSS2SI64rm, 0 }, |
| { X86::VCVTTSS2SI64rr_Int, X86::VCVTTSS2SI64rm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSS2SIZrr, X86::VCVTTSS2SIZrm, 0 }, |
| { X86::VCVTTSS2SIZrr_Int, X86::VCVTTSS2SIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSS2SIrr, X86::VCVTTSS2SIrm, 0 }, |
| { X86::VCVTTSS2SIrr_Int, X86::VCVTTSS2SIrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSS2USI64Zrr, X86::VCVTTSS2USI64Zrm, 0 }, |
| { X86::VCVTTSS2USI64Zrr_Int, X86::VCVTTSS2USI64Zrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTSS2USIZrr, X86::VCVTTSS2USIZrm, 0 }, |
| { X86::VCVTTSS2USIZrr_Int, X86::VCVTTSS2USIZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTUDQ2PDZ128rr, X86::VCVTUDQ2PDZ128rm, TB_NO_REVERSE }, |
| { X86::VCVTUDQ2PDZ256rr, X86::VCVTUDQ2PDZ256rm, 0 }, |
| { X86::VCVTUDQ2PDZrr, X86::VCVTUDQ2PDZrm, 0 }, |
| { X86::VCVTUDQ2PSZ128rr, X86::VCVTUDQ2PSZ128rm, 0 }, |
| { X86::VCVTUDQ2PSZ256rr, X86::VCVTUDQ2PSZ256rm, 0 }, |
| { X86::VCVTUDQ2PSZrr, X86::VCVTUDQ2PSZrm, 0 }, |
| { X86::VCVTUQQ2PDZ128rr, X86::VCVTUQQ2PDZ128rm, 0 }, |
| { X86::VCVTUQQ2PDZ256rr, X86::VCVTUQQ2PDZ256rm, 0 }, |
| { X86::VCVTUQQ2PDZrr, X86::VCVTUQQ2PDZrm, 0 }, |
| { X86::VCVTUQQ2PSZ128rr, X86::VCVTUQQ2PSZ128rm, 0 }, |
| { X86::VCVTUQQ2PSZ256rr, X86::VCVTUQQ2PSZ256rm, 0 }, |
| { X86::VCVTUQQ2PSZrr, X86::VCVTUQQ2PSZrm, 0 }, |
| { X86::VEXP2PDZr, X86::VEXP2PDZm, 0 }, |
| { X86::VEXP2PSZr, X86::VEXP2PSZm, 0 }, |
| { X86::VEXPANDPDZ128rr, X86::VEXPANDPDZ128rm, TB_NO_REVERSE }, |
| { X86::VEXPANDPDZ256rr, X86::VEXPANDPDZ256rm, TB_NO_REVERSE }, |
| { X86::VEXPANDPDZrr, X86::VEXPANDPDZrm, TB_NO_REVERSE }, |
| { X86::VEXPANDPSZ128rr, X86::VEXPANDPSZ128rm, TB_NO_REVERSE }, |
| { X86::VEXPANDPSZ256rr, X86::VEXPANDPSZ256rm, TB_NO_REVERSE }, |
| { X86::VEXPANDPSZrr, X86::VEXPANDPSZrm, TB_NO_REVERSE }, |
| { X86::VFPCLASSPDZ128rr, X86::VFPCLASSPDZ128rm, 0 }, |
| { X86::VFPCLASSPDZ256rr, X86::VFPCLASSPDZ256rm, 0 }, |
| { X86::VFPCLASSPDZrr, X86::VFPCLASSPDZrm, 0 }, |
| { X86::VFPCLASSPSZ128rr, X86::VFPCLASSPSZ128rm, 0 }, |
| { X86::VFPCLASSPSZ256rr, X86::VFPCLASSPSZ256rm, 0 }, |
| { X86::VFPCLASSPSZrr, X86::VFPCLASSPSZrm, 0 }, |
| { X86::VFPCLASSSDZrr, X86::VFPCLASSSDZrm, TB_NO_REVERSE }, |
| { X86::VFPCLASSSSZrr, X86::VFPCLASSSSZrm, TB_NO_REVERSE }, |
| { X86::VFRCZPDYrr, X86::VFRCZPDYrm, 0 }, |
| { X86::VFRCZPDrr, X86::VFRCZPDrm, 0 }, |
| { X86::VFRCZPSYrr, X86::VFRCZPSYrm, 0 }, |
| { X86::VFRCZPSrr, X86::VFRCZPSrm, 0 }, |
| { X86::VFRCZSDrr, X86::VFRCZSDrm, TB_NO_REVERSE }, |
| { X86::VFRCZSSrr, X86::VFRCZSSrm, TB_NO_REVERSE }, |
| { X86::VGETEXPPDZ128r, X86::VGETEXPPDZ128m, 0 }, |
| { X86::VGETEXPPDZ256r, X86::VGETEXPPDZ256m, 0 }, |
| { X86::VGETEXPPDZr, X86::VGETEXPPDZm, 0 }, |
| { X86::VGETEXPPSZ128r, X86::VGETEXPPSZ128m, 0 }, |
| { X86::VGETEXPPSZ256r, X86::VGETEXPPSZ256m, 0 }, |
| { X86::VGETEXPPSZr, X86::VGETEXPPSZm, 0 }, |
| { X86::VGETMANTPDZ128rri, X86::VGETMANTPDZ128rmi, 0 }, |
| { X86::VGETMANTPDZ256rri, X86::VGETMANTPDZ256rmi, 0 }, |
| { X86::VGETMANTPDZrri, X86::VGETMANTPDZrmi, 0 }, |
| { X86::VGETMANTPSZ128rri, X86::VGETMANTPSZ128rmi, 0 }, |
| { X86::VGETMANTPSZ256rri, X86::VGETMANTPSZ256rmi, 0 }, |
| { X86::VGETMANTPSZrri, X86::VGETMANTPSZrmi, 0 }, |
| { X86::VMOV64toPQIZrr, X86::VMOVQI2PQIZrm, TB_NO_REVERSE }, |
| { X86::VMOV64toPQIrr, X86::VMOVQI2PQIrm, TB_NO_REVERSE }, |
| { X86::VMOV64toSDZrr, X86::VMOVSDZrm_alt, TB_NO_REVERSE }, |
| { X86::VMOV64toSDrr, X86::VMOVSDrm_alt, TB_NO_REVERSE }, |
| { X86::VMOVAPDYrr, X86::VMOVAPDYrm, TB_ALIGN_32 }, |
| { X86::VMOVAPDZ128rr, X86::VMOVAPDZ128rm, TB_ALIGN_16 }, |
| { X86::VMOVAPDZ256rr, X86::VMOVAPDZ256rm, TB_ALIGN_32 }, |
| { X86::VMOVAPDZrr, X86::VMOVAPDZrm, TB_ALIGN_64 }, |
| { X86::VMOVAPDrr, X86::VMOVAPDrm, TB_ALIGN_16 }, |
| { X86::VMOVAPSYrr, X86::VMOVAPSYrm, TB_ALIGN_32 }, |
| { X86::VMOVAPSZ128rr, X86::VMOVAPSZ128rm, TB_ALIGN_16 }, |
| { X86::VMOVAPSZ256rr, X86::VMOVAPSZ256rm, TB_ALIGN_32 }, |
| { X86::VMOVAPSZrr, X86::VMOVAPSZrm, TB_ALIGN_64 }, |
| { X86::VMOVAPSrr, X86::VMOVAPSrm, TB_ALIGN_16 }, |
| { X86::VMOVDDUPYrr, X86::VMOVDDUPYrm, 0 }, |
| { X86::VMOVDDUPZ128rr, X86::VMOVDDUPZ128rm, TB_NO_REVERSE }, |
| { X86::VMOVDDUPZ256rr, X86::VMOVDDUPZ256rm, 0 }, |
| { X86::VMOVDDUPZrr, X86::VMOVDDUPZrm, 0 }, |
| { X86::VMOVDDUPrr, X86::VMOVDDUPrm, TB_NO_REVERSE }, |
| { X86::VMOVDI2PDIZrr, X86::VMOVDI2PDIZrm, 0 }, |
| { X86::VMOVDI2PDIrr, X86::VMOVDI2PDIrm, 0 }, |
| { X86::VMOVDI2SSZrr, X86::VMOVSSZrm_alt, 0 }, |
| { X86::VMOVDI2SSrr, X86::VMOVSSrm_alt, 0 }, |
| { X86::VMOVDQA32Z128rr, X86::VMOVDQA32Z128rm, TB_ALIGN_16 }, |
| { X86::VMOVDQA32Z256rr, X86::VMOVDQA32Z256rm, TB_ALIGN_32 }, |
| { X86::VMOVDQA32Zrr, X86::VMOVDQA32Zrm, TB_ALIGN_64 }, |
| { X86::VMOVDQA64Z128rr, X86::VMOVDQA64Z128rm, TB_ALIGN_16 }, |
| { X86::VMOVDQA64Z256rr, X86::VMOVDQA64Z256rm, TB_ALIGN_32 }, |
| { X86::VMOVDQA64Zrr, X86::VMOVDQA64Zrm, TB_ALIGN_64 }, |
| { X86::VMOVDQAYrr, X86::VMOVDQAYrm, TB_ALIGN_32 }, |
| { X86::VMOVDQArr, X86::VMOVDQArm, TB_ALIGN_16 }, |
| { X86::VMOVDQU16Z128rr, X86::VMOVDQU16Z128rm, 0 }, |
| { X86::VMOVDQU16Z256rr, X86::VMOVDQU16Z256rm, 0 }, |
| { X86::VMOVDQU16Zrr, X86::VMOVDQU16Zrm, 0 }, |
| { X86::VMOVDQU32Z128rr, X86::VMOVDQU32Z128rm, 0 }, |
| { X86::VMOVDQU32Z256rr, X86::VMOVDQU32Z256rm, 0 }, |
| { X86::VMOVDQU32Zrr, X86::VMOVDQU32Zrm, 0 }, |
| { X86::VMOVDQU64Z128rr, X86::VMOVDQU64Z128rm, 0 }, |
| { X86::VMOVDQU64Z256rr, X86::VMOVDQU64Z256rm, 0 }, |
| { X86::VMOVDQU64Zrr, X86::VMOVDQU64Zrm, 0 }, |
| { X86::VMOVDQU8Z128rr, X86::VMOVDQU8Z128rm, 0 }, |
| { X86::VMOVDQU8Z256rr, X86::VMOVDQU8Z256rm, 0 }, |
| { X86::VMOVDQU8Zrr, X86::VMOVDQU8Zrm, 0 }, |
| { X86::VMOVDQUYrr, X86::VMOVDQUYrm, 0 }, |
| { X86::VMOVDQUrr, X86::VMOVDQUrm, 0 }, |
| { X86::VMOVSHDUPYrr, X86::VMOVSHDUPYrm, 0 }, |
| { X86::VMOVSHDUPZ128rr, X86::VMOVSHDUPZ128rm, 0 }, |
| { X86::VMOVSHDUPZ256rr, X86::VMOVSHDUPZ256rm, 0 }, |
| { X86::VMOVSHDUPZrr, X86::VMOVSHDUPZrm, 0 }, |
| { X86::VMOVSHDUPrr, X86::VMOVSHDUPrm, 0 }, |
| { X86::VMOVSLDUPYrr, X86::VMOVSLDUPYrm, 0 }, |
| { X86::VMOVSLDUPZ128rr, X86::VMOVSLDUPZ128rm, 0 }, |
| { X86::VMOVSLDUPZ256rr, X86::VMOVSLDUPZ256rm, 0 }, |
| { X86::VMOVSLDUPZrr, X86::VMOVSLDUPZrm, 0 }, |
| { X86::VMOVSLDUPrr, X86::VMOVSLDUPrm, 0 }, |
| { X86::VMOVUPDYrr, X86::VMOVUPDYrm, 0 }, |
| { X86::VMOVUPDZ128rr, X86::VMOVUPDZ128rm, 0 }, |
| { X86::VMOVUPDZ256rr, X86::VMOVUPDZ256rm, 0 }, |
| { X86::VMOVUPDZrr, X86::VMOVUPDZrm, 0 }, |
| { X86::VMOVUPDrr, X86::VMOVUPDrm, 0 }, |
| { X86::VMOVUPSYrr, X86::VMOVUPSYrm, 0 }, |
| { X86::VMOVUPSZ128rr, X86::VMOVUPSZ128rm, 0 }, |
| { X86::VMOVUPSZ256rr, X86::VMOVUPSZ256rm, 0 }, |
| { X86::VMOVUPSZrr, X86::VMOVUPSZrm, 0 }, |
| { X86::VMOVUPSrr, X86::VMOVUPSrm, 0 }, |
| { X86::VMOVZPQILo2PQIZrr, X86::VMOVQI2PQIZrm, TB_NO_REVERSE }, |
| { X86::VMOVZPQILo2PQIrr, X86::VMOVQI2PQIrm, TB_NO_REVERSE }, |
| { X86::VPABSBYrr, X86::VPABSBYrm, 0 }, |
| { X86::VPABSBZ128rr, X86::VPABSBZ128rm, 0 }, |
| { X86::VPABSBZ256rr, X86::VPABSBZ256rm, 0 }, |
| { X86::VPABSBZrr, X86::VPABSBZrm, 0 }, |
| { X86::VPABSBrr, X86::VPABSBrm, 0 }, |
| { X86::VPABSDYrr, X86::VPABSDYrm, 0 }, |
| { X86::VPABSDZ128rr, X86::VPABSDZ128rm, 0 }, |
| { X86::VPABSDZ256rr, X86::VPABSDZ256rm, 0 }, |
| { X86::VPABSDZrr, X86::VPABSDZrm, 0 }, |
| { X86::VPABSDrr, X86::VPABSDrm, 0 }, |
| { X86::VPABSQZ128rr, X86::VPABSQZ128rm, 0 }, |
| { X86::VPABSQZ256rr, X86::VPABSQZ256rm, 0 }, |
| { X86::VPABSQZrr, X86::VPABSQZrm, 0 }, |
| { X86::VPABSWYrr, X86::VPABSWYrm, 0 }, |
| { X86::VPABSWZ128rr, X86::VPABSWZ128rm, 0 }, |
| { X86::VPABSWZ256rr, X86::VPABSWZ256rm, 0 }, |
| { X86::VPABSWZrr, X86::VPABSWZrm, 0 }, |
| { X86::VPABSWrr, X86::VPABSWrm, 0 }, |
| { X86::VPBROADCASTBYrr, X86::VPBROADCASTBYrm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTBZ128r, X86::VPBROADCASTBZ128m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTBZ256r, X86::VPBROADCASTBZ256m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTBZr, X86::VPBROADCASTBZm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTBrr, X86::VPBROADCASTBrm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTDYrr, X86::VPBROADCASTDYrm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTDZ128r, X86::VPBROADCASTDZ128m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTDZ256r, X86::VPBROADCASTDZ256m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTDZr, X86::VPBROADCASTDZm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTDrr, X86::VPBROADCASTDrm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTQYrr, X86::VPBROADCASTQYrm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTQZ128r, X86::VPBROADCASTQZ128m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTQZ256r, X86::VPBROADCASTQZ256m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTQZr, X86::VPBROADCASTQZm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTQrr, X86::VPBROADCASTQrm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTWYrr, X86::VPBROADCASTWYrm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTWZ128r, X86::VPBROADCASTWZ128m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTWZ256r, X86::VPBROADCASTWZ256m, TB_NO_REVERSE }, |
| { X86::VPBROADCASTWZr, X86::VPBROADCASTWZm, TB_NO_REVERSE }, |
| { X86::VPBROADCASTWrr, X86::VPBROADCASTWrm, TB_NO_REVERSE }, |
| { X86::VPCMPESTRIrr, X86::VPCMPESTRIrm, 0 }, |
| { X86::VPCMPESTRMrr, X86::VPCMPESTRMrm, 0 }, |
| { X86::VPCMPISTRIrr, X86::VPCMPISTRIrm, 0 }, |
| { X86::VPCMPISTRMrr, X86::VPCMPISTRMrm, 0 }, |
| { X86::VPCONFLICTDZ128rr, X86::VPCONFLICTDZ128rm, 0 }, |
| { X86::VPCONFLICTDZ256rr, X86::VPCONFLICTDZ256rm, 0 }, |
| { X86::VPCONFLICTDZrr, X86::VPCONFLICTDZrm, 0 }, |
| { X86::VPCONFLICTQZ128rr, X86::VPCONFLICTQZ128rm, 0 }, |
| { X86::VPCONFLICTQZ256rr, X86::VPCONFLICTQZ256rm, 0 }, |
| { X86::VPCONFLICTQZrr, X86::VPCONFLICTQZrm, 0 }, |
| { X86::VPERMILPDYri, X86::VPERMILPDYmi, 0 }, |
| { X86::VPERMILPDZ128ri, X86::VPERMILPDZ128mi, 0 }, |
| { X86::VPERMILPDZ256ri, X86::VPERMILPDZ256mi, 0 }, |
| { X86::VPERMILPDZri, X86::VPERMILPDZmi, 0 }, |
| { X86::VPERMILPDri, X86::VPERMILPDmi, 0 }, |
| { X86::VPERMILPSYri, X86::VPERMILPSYmi, 0 }, |
| { X86::VPERMILPSZ128ri, X86::VPERMILPSZ128mi, 0 }, |
| { X86::VPERMILPSZ256ri, X86::VPERMILPSZ256mi, 0 }, |
| { X86::VPERMILPSZri, X86::VPERMILPSZmi, 0 }, |
| { X86::VPERMILPSri, X86::VPERMILPSmi, 0 }, |
| { X86::VPERMPDYri, X86::VPERMPDYmi, 0 }, |
| { X86::VPERMPDZ256ri, X86::VPERMPDZ256mi, 0 }, |
| { X86::VPERMPDZri, X86::VPERMPDZmi, 0 }, |
| { X86::VPERMQYri, X86::VPERMQYmi, 0 }, |
| { X86::VPERMQZ256ri, X86::VPERMQZ256mi, 0 }, |
| { X86::VPERMQZri, X86::VPERMQZmi, 0 }, |
| { X86::VPEXPANDBZ128rr, X86::VPEXPANDBZ128rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDBZ256rr, X86::VPEXPANDBZ256rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDBZrr, X86::VPEXPANDBZrm, TB_NO_REVERSE }, |
| { X86::VPEXPANDDZ128rr, X86::VPEXPANDDZ128rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDDZ256rr, X86::VPEXPANDDZ256rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDDZrr, X86::VPEXPANDDZrm, TB_NO_REVERSE }, |
| { X86::VPEXPANDQZ128rr, X86::VPEXPANDQZ128rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDQZ256rr, X86::VPEXPANDQZ256rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDQZrr, X86::VPEXPANDQZrm, TB_NO_REVERSE }, |
| { X86::VPEXPANDWZ128rr, X86::VPEXPANDWZ128rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDWZ256rr, X86::VPEXPANDWZ256rm, TB_NO_REVERSE }, |
| { X86::VPEXPANDWZrr, X86::VPEXPANDWZrm, TB_NO_REVERSE }, |
| { X86::VPHADDBDrr, X86::VPHADDBDrm, 0 }, |
| { X86::VPHADDBQrr, X86::VPHADDBQrm, 0 }, |
| { X86::VPHADDBWrr, X86::VPHADDBWrm, 0 }, |
| { X86::VPHADDDQrr, X86::VPHADDDQrm, 0 }, |
| { X86::VPHADDUBDrr, X86::VPHADDUBDrm, 0 }, |
| { X86::VPHADDUBQrr, X86::VPHADDUBQrm, 0 }, |
| { X86::VPHADDUBWrr, X86::VPHADDUBWrm, 0 }, |
| { X86::VPHADDUDQrr, X86::VPHADDUDQrm, 0 }, |
| { X86::VPHADDUWDrr, X86::VPHADDUWDrm, 0 }, |
| { X86::VPHADDUWQrr, X86::VPHADDUWQrm, 0 }, |
| { X86::VPHADDWDrr, X86::VPHADDWDrm, 0 }, |
| { X86::VPHADDWQrr, X86::VPHADDWQrm, 0 }, |
| { X86::VPHMINPOSUWrr, X86::VPHMINPOSUWrm, 0 }, |
| { X86::VPHSUBBWrr, X86::VPHSUBBWrm, 0 }, |
| { X86::VPHSUBDQrr, X86::VPHSUBDQrm, 0 }, |
| { X86::VPHSUBWDrr, X86::VPHSUBWDrm, 0 }, |
| { X86::VPLZCNTDZ128rr, X86::VPLZCNTDZ128rm, 0 }, |
| { X86::VPLZCNTDZ256rr, X86::VPLZCNTDZ256rm, 0 }, |
| { X86::VPLZCNTDZrr, X86::VPLZCNTDZrm, 0 }, |
| { X86::VPLZCNTQZ128rr, X86::VPLZCNTQZ128rm, 0 }, |
| { X86::VPLZCNTQZ256rr, X86::VPLZCNTQZ256rm, 0 }, |
| { X86::VPLZCNTQZrr, X86::VPLZCNTQZrm, 0 }, |
| { X86::VPMOVSXBDYrr, X86::VPMOVSXBDYrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBDZ128rr, X86::VPMOVSXBDZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBDZ256rr, X86::VPMOVSXBDZ256rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBDZrr, X86::VPMOVSXBDZrm, 0 }, |
| { X86::VPMOVSXBDrr, X86::VPMOVSXBDrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBQYrr, X86::VPMOVSXBQYrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBQZ128rr, X86::VPMOVSXBQZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBQZ256rr, X86::VPMOVSXBQZ256rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBQZrr, X86::VPMOVSXBQZrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBQrr, X86::VPMOVSXBQrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBWYrr, X86::VPMOVSXBWYrm, 0 }, |
| { X86::VPMOVSXBWZ128rr, X86::VPMOVSXBWZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXBWZ256rr, X86::VPMOVSXBWZ256rm, 0 }, |
| { X86::VPMOVSXBWZrr, X86::VPMOVSXBWZrm, 0 }, |
| { X86::VPMOVSXBWrr, X86::VPMOVSXBWrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXDQYrr, X86::VPMOVSXDQYrm, 0 }, |
| { X86::VPMOVSXDQZ128rr, X86::VPMOVSXDQZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXDQZ256rr, X86::VPMOVSXDQZ256rm, 0 }, |
| { X86::VPMOVSXDQZrr, X86::VPMOVSXDQZrm, 0 }, |
| { X86::VPMOVSXDQrr, X86::VPMOVSXDQrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXWDYrr, X86::VPMOVSXWDYrm, 0 }, |
| { X86::VPMOVSXWDZ128rr, X86::VPMOVSXWDZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXWDZ256rr, X86::VPMOVSXWDZ256rm, 0 }, |
| { X86::VPMOVSXWDZrr, X86::VPMOVSXWDZrm, 0 }, |
| { X86::VPMOVSXWDrr, X86::VPMOVSXWDrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXWQYrr, X86::VPMOVSXWQYrm, TB_NO_REVERSE }, |
| { X86::VPMOVSXWQZ128rr, X86::VPMOVSXWQZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXWQZ256rr, X86::VPMOVSXWQZ256rm, TB_NO_REVERSE }, |
| { X86::VPMOVSXWQZrr, X86::VPMOVSXWQZrm, 0 }, |
| { X86::VPMOVSXWQrr, X86::VPMOVSXWQrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBDYrr, X86::VPMOVZXBDYrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBDZ128rr, X86::VPMOVZXBDZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBDZ256rr, X86::VPMOVZXBDZ256rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBDZrr, X86::VPMOVZXBDZrm, 0 }, |
| { X86::VPMOVZXBDrr, X86::VPMOVZXBDrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBQYrr, X86::VPMOVZXBQYrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBQZ128rr, X86::VPMOVZXBQZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBQZ256rr, X86::VPMOVZXBQZ256rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBQZrr, X86::VPMOVZXBQZrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBQrr, X86::VPMOVZXBQrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBWYrr, X86::VPMOVZXBWYrm, 0 }, |
| { X86::VPMOVZXBWZ128rr, X86::VPMOVZXBWZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXBWZ256rr, X86::VPMOVZXBWZ256rm, 0 }, |
| { X86::VPMOVZXBWZrr, X86::VPMOVZXBWZrm, 0 }, |
| { X86::VPMOVZXBWrr, X86::VPMOVZXBWrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXDQYrr, X86::VPMOVZXDQYrm, 0 }, |
| { X86::VPMOVZXDQZ128rr, X86::VPMOVZXDQZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXDQZ256rr, X86::VPMOVZXDQZ256rm, 0 }, |
| { X86::VPMOVZXDQZrr, X86::VPMOVZXDQZrm, 0 }, |
| { X86::VPMOVZXDQrr, X86::VPMOVZXDQrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXWDYrr, X86::VPMOVZXWDYrm, 0 }, |
| { X86::VPMOVZXWDZ128rr, X86::VPMOVZXWDZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXWDZ256rr, X86::VPMOVZXWDZ256rm, 0 }, |
| { X86::VPMOVZXWDZrr, X86::VPMOVZXWDZrm, 0 }, |
| { X86::VPMOVZXWDrr, X86::VPMOVZXWDrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXWQYrr, X86::VPMOVZXWQYrm, TB_NO_REVERSE }, |
| { X86::VPMOVZXWQZ128rr, X86::VPMOVZXWQZ128rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXWQZ256rr, X86::VPMOVZXWQZ256rm, TB_NO_REVERSE }, |
| { X86::VPMOVZXWQZrr, X86::VPMOVZXWQZrm, 0 }, |
| { X86::VPMOVZXWQrr, X86::VPMOVZXWQrm, TB_NO_REVERSE }, |
| { X86::VPOPCNTBZ128rr, X86::VPOPCNTBZ128rm, 0 }, |
| { X86::VPOPCNTBZ256rr, X86::VPOPCNTBZ256rm, 0 }, |
| { X86::VPOPCNTBZrr, X86::VPOPCNTBZrm, 0 }, |
| { X86::VPOPCNTDZ128rr, X86::VPOPCNTDZ128rm, 0 }, |
| { X86::VPOPCNTDZ256rr, X86::VPOPCNTDZ256rm, 0 }, |
| { X86::VPOPCNTDZrr, X86::VPOPCNTDZrm, 0 }, |
| { X86::VPOPCNTQZ128rr, X86::VPOPCNTQZ128rm, 0 }, |
| { X86::VPOPCNTQZ256rr, X86::VPOPCNTQZ256rm, 0 }, |
| { X86::VPOPCNTQZrr, X86::VPOPCNTQZrm, 0 }, |
| { X86::VPOPCNTWZ128rr, X86::VPOPCNTWZ128rm, 0 }, |
| { X86::VPOPCNTWZ256rr, X86::VPOPCNTWZ256rm, 0 }, |
| { X86::VPOPCNTWZrr, X86::VPOPCNTWZrm, 0 }, |
| { X86::VPROLDZ128ri, X86::VPROLDZ128mi, 0 }, |
| { X86::VPROLDZ256ri, X86::VPROLDZ256mi, 0 }, |
| { X86::VPROLDZri, X86::VPROLDZmi, 0 }, |
| { X86::VPROLQZ128ri, X86::VPROLQZ128mi, 0 }, |
| { X86::VPROLQZ256ri, X86::VPROLQZ256mi, 0 }, |
| { X86::VPROLQZri, X86::VPROLQZmi, 0 }, |
| { X86::VPRORDZ128ri, X86::VPRORDZ128mi, 0 }, |
| { X86::VPRORDZ256ri, X86::VPRORDZ256mi, 0 }, |
| { X86::VPRORDZri, X86::VPRORDZmi, 0 }, |
| { X86::VPRORQZ128ri, X86::VPRORQZ128mi, 0 }, |
| { X86::VPRORQZ256ri, X86::VPRORQZ256mi, 0 }, |
| { X86::VPRORQZri, X86::VPRORQZmi, 0 }, |
| { X86::VPROTBri, X86::VPROTBmi, 0 }, |
| { X86::VPROTBrr, X86::VPROTBmr, 0 }, |
| { X86::VPROTDri, X86::VPROTDmi, 0 }, |
| { X86::VPROTDrr, X86::VPROTDmr, 0 }, |
| { X86::VPROTQri, X86::VPROTQmi, 0 }, |
| { X86::VPROTQrr, X86::VPROTQmr, 0 }, |
| { X86::VPROTWri, X86::VPROTWmi, 0 }, |
| { X86::VPROTWrr, X86::VPROTWmr, 0 }, |
| { X86::VPSHABrr, X86::VPSHABmr, 0 }, |
| { X86::VPSHADrr, X86::VPSHADmr, 0 }, |
| { X86::VPSHAQrr, X86::VPSHAQmr, 0 }, |
| { X86::VPSHAWrr, X86::VPSHAWmr, 0 }, |
| { X86::VPSHLBrr, X86::VPSHLBmr, 0 }, |
| { X86::VPSHLDrr, X86::VPSHLDmr, 0 }, |
| { X86::VPSHLQrr, X86::VPSHLQmr, 0 }, |
| { X86::VPSHLWrr, X86::VPSHLWmr, 0 }, |
| { X86::VPSHUFDYri, X86::VPSHUFDYmi, 0 }, |
| { X86::VPSHUFDZ128ri, X86::VPSHUFDZ128mi, 0 }, |
| { X86::VPSHUFDZ256ri, X86::VPSHUFDZ256mi, 0 }, |
| { X86::VPSHUFDZri, X86::VPSHUFDZmi, 0 }, |
| { X86::VPSHUFDri, X86::VPSHUFDmi, 0 }, |
| { X86::VPSHUFHWYri, X86::VPSHUFHWYmi, 0 }, |
| { X86::VPSHUFHWZ128ri, X86::VPSHUFHWZ128mi, 0 }, |
| { X86::VPSHUFHWZ256ri, X86::VPSHUFHWZ256mi, 0 }, |
| { X86::VPSHUFHWZri, X86::VPSHUFHWZmi, 0 }, |
| { X86::VPSHUFHWri, X86::VPSHUFHWmi, 0 }, |
| { X86::VPSHUFLWYri, X86::VPSHUFLWYmi, 0 }, |
| { X86::VPSHUFLWZ128ri, X86::VPSHUFLWZ128mi, 0 }, |
| { X86::VPSHUFLWZ256ri, X86::VPSHUFLWZ256mi, 0 }, |
| { X86::VPSHUFLWZri, X86::VPSHUFLWZmi, 0 }, |
| { X86::VPSHUFLWri, X86::VPSHUFLWmi, 0 }, |
| { X86::VPSLLDQZ128rr, X86::VPSLLDQZ128rm, 0 }, |
| { X86::VPSLLDQZ256rr, X86::VPSLLDQZ256rm, 0 }, |
| { X86::VPSLLDQZrr, X86::VPSLLDQZrm, 0 }, |
| { X86::VPSLLDZ128ri, X86::VPSLLDZ128mi, 0 }, |
| { X86::VPSLLDZ256ri, X86::VPSLLDZ256mi, 0 }, |
| { X86::VPSLLDZri, X86::VPSLLDZmi, 0 }, |
| { X86::VPSLLQZ128ri, X86::VPSLLQZ128mi, 0 }, |
| { X86::VPSLLQZ256ri, X86::VPSLLQZ256mi, 0 }, |
| { X86::VPSLLQZri, X86::VPSLLQZmi, 0 }, |
| { X86::VPSLLWZ128ri, X86::VPSLLWZ128mi, 0 }, |
| { X86::VPSLLWZ256ri, X86::VPSLLWZ256mi, 0 }, |
| { X86::VPSLLWZri, X86::VPSLLWZmi, 0 }, |
| { X86::VPSRADZ128ri, X86::VPSRADZ128mi, 0 }, |
| { X86::VPSRADZ256ri, X86::VPSRADZ256mi, 0 }, |
| { X86::VPSRADZri, X86::VPSRADZmi, 0 }, |
| { X86::VPSRAQZ128ri, X86::VPSRAQZ128mi, 0 }, |
| { X86::VPSRAQZ256ri, X86::VPSRAQZ256mi, 0 }, |
| { X86::VPSRAQZri, X86::VPSRAQZmi, 0 }, |
| { X86::VPSRAWZ128ri, X86::VPSRAWZ128mi, 0 }, |
| { X86::VPSRAWZ256ri, X86::VPSRAWZ256mi, 0 }, |
| { X86::VPSRAWZri, X86::VPSRAWZmi, 0 }, |
| { X86::VPSRLDQZ128rr, X86::VPSRLDQZ128rm, 0 }, |
| { X86::VPSRLDQZ256rr, X86::VPSRLDQZ256rm, 0 }, |
| { X86::VPSRLDQZrr, X86::VPSRLDQZrm, 0 }, |
| { X86::VPSRLDZ128ri, X86::VPSRLDZ128mi, 0 }, |
| { X86::VPSRLDZ256ri, X86::VPSRLDZ256mi, 0 }, |
| { X86::VPSRLDZri, X86::VPSRLDZmi, 0 }, |
| { X86::VPSRLQZ128ri, X86::VPSRLQZ128mi, 0 }, |
| { X86::VPSRLQZ256ri, X86::VPSRLQZ256mi, 0 }, |
| { X86::VPSRLQZri, X86::VPSRLQZmi, 0 }, |
| { X86::VPSRLWZ128ri, X86::VPSRLWZ128mi, 0 }, |
| { X86::VPSRLWZ256ri, X86::VPSRLWZ256mi, 0 }, |
| { X86::VPSRLWZri, X86::VPSRLWZmi, 0 }, |
| { X86::VPTESTYrr, X86::VPTESTYrm, 0 }, |
| { X86::VPTESTrr, X86::VPTESTrm, 0 }, |
| { X86::VRCP14PDZ128r, X86::VRCP14PDZ128m, 0 }, |
| { X86::VRCP14PDZ256r, X86::VRCP14PDZ256m, 0 }, |
| { X86::VRCP14PDZr, X86::VRCP14PDZm, 0 }, |
| { X86::VRCP14PSZ128r, X86::VRCP14PSZ128m, 0 }, |
| { X86::VRCP14PSZ256r, X86::VRCP14PSZ256m, 0 }, |
| { X86::VRCP14PSZr, X86::VRCP14PSZm, 0 }, |
| { X86::VRCP28PDZr, X86::VRCP28PDZm, 0 }, |
| { X86::VRCP28PSZr, X86::VRCP28PSZm, 0 }, |
| { X86::VRCPPSYr, X86::VRCPPSYm, 0 }, |
| { X86::VRCPPSr, X86::VRCPPSm, 0 }, |
| { X86::VREDUCEPDZ128rri, X86::VREDUCEPDZ128rmi, 0 }, |
| { X86::VREDUCEPDZ256rri, X86::VREDUCEPDZ256rmi, 0 }, |
| { X86::VREDUCEPDZrri, X86::VREDUCEPDZrmi, 0 }, |
| { X86::VREDUCEPSZ128rri, X86::VREDUCEPSZ128rmi, 0 }, |
| { X86::VREDUCEPSZ256rri, X86::VREDUCEPSZ256rmi, 0 }, |
| { X86::VREDUCEPSZrri, X86::VREDUCEPSZrmi, 0 }, |
| { X86::VRNDSCALEPDZ128rri, X86::VRNDSCALEPDZ128rmi, 0 }, |
| { X86::VRNDSCALEPDZ256rri, X86::VRNDSCALEPDZ256rmi, 0 }, |
| { X86::VRNDSCALEPDZrri, X86::VRNDSCALEPDZrmi, 0 }, |
| { X86::VRNDSCALEPSZ128rri, X86::VRNDSCALEPSZ128rmi, 0 }, |
| { X86::VRNDSCALEPSZ256rri, X86::VRNDSCALEPSZ256rmi, 0 }, |
| { X86::VRNDSCALEPSZrri, X86::VRNDSCALEPSZrmi, 0 }, |
| { X86::VROUNDPDYr, X86::VROUNDPDYm, 0 }, |
| { X86::VROUNDPDr, X86::VROUNDPDm, 0 }, |
| { X86::VROUNDPSYr, X86::VROUNDPSYm, 0 }, |
| { X86::VROUNDPSr, X86::VROUNDPSm, 0 }, |
| { X86::VRSQRT14PDZ128r, X86::VRSQRT14PDZ128m, 0 }, |
| { X86::VRSQRT14PDZ256r, X86::VRSQRT14PDZ256m, 0 }, |
| { X86::VRSQRT14PDZr, X86::VRSQRT14PDZm, 0 }, |
| { X86::VRSQRT14PSZ128r, X86::VRSQRT14PSZ128m, 0 }, |
| { X86::VRSQRT14PSZ256r, X86::VRSQRT14PSZ256m, 0 }, |
| { X86::VRSQRT14PSZr, X86::VRSQRT14PSZm, 0 }, |
| { X86::VRSQRT28PDZr, X86::VRSQRT28PDZm, 0 }, |
| { X86::VRSQRT28PSZr, X86::VRSQRT28PSZm, 0 }, |
| { X86::VRSQRTPSYr, X86::VRSQRTPSYm, 0 }, |
| { X86::VRSQRTPSr, X86::VRSQRTPSm, 0 }, |
| { X86::VSQRTPDYr, X86::VSQRTPDYm, 0 }, |
| { X86::VSQRTPDZ128r, X86::VSQRTPDZ128m, 0 }, |
| { X86::VSQRTPDZ256r, X86::VSQRTPDZ256m, 0 }, |
| { X86::VSQRTPDZr, X86::VSQRTPDZm, 0 }, |
| { X86::VSQRTPDr, X86::VSQRTPDm, 0 }, |
| { X86::VSQRTPSYr, X86::VSQRTPSYm, 0 }, |
| { X86::VSQRTPSZ128r, X86::VSQRTPSZ128m, 0 }, |
| { X86::VSQRTPSZ256r, X86::VSQRTPSZ256m, 0 }, |
| { X86::VSQRTPSZr, X86::VSQRTPSZm, 0 }, |
| { X86::VSQRTPSr, X86::VSQRTPSm, 0 }, |
| { X86::VTESTPDYrr, X86::VTESTPDYrm, 0 }, |
| { X86::VTESTPDrr, X86::VTESTPDrm, 0 }, |
| { X86::VTESTPSYrr, X86::VTESTPSYrm, 0 }, |
| { X86::VTESTPSrr, X86::VTESTPSrm, 0 }, |
| { X86::VUCOMISDZrr, X86::VUCOMISDZrm, 0 }, |
| { X86::VUCOMISDZrr_Int, X86::VUCOMISDZrm_Int, TB_NO_REVERSE }, |
| { X86::VUCOMISDrr, X86::VUCOMISDrm, 0 }, |
| { X86::VUCOMISDrr_Int, X86::VUCOMISDrm_Int, TB_NO_REVERSE }, |
| { X86::VUCOMISSZrr, X86::VUCOMISSZrm, 0 }, |
| { X86::VUCOMISSZrr_Int, X86::VUCOMISSZrm_Int, TB_NO_REVERSE }, |
| { X86::VUCOMISSrr, X86::VUCOMISSrm, 0 }, |
| { X86::VUCOMISSrr_Int, X86::VUCOMISSrm_Int, TB_NO_REVERSE }, |
| }; |
| |
| static const X86MemoryFoldTableEntry MemoryFoldTable2[] = { |
| { X86::ADD16rr_DB, X86::ADD16rm, TB_NO_REVERSE }, |
| { X86::ADD32rr_DB, X86::ADD32rm, TB_NO_REVERSE }, |
| { X86::ADD64rr_DB, X86::ADD64rm, TB_NO_REVERSE }, |
| { X86::ADD8rr_DB, X86::ADD8rm, TB_NO_REVERSE }, |
| { X86::ADC16rr, X86::ADC16rm, 0 }, |
| { X86::ADC32rr, X86::ADC32rm, 0 }, |
| { X86::ADC64rr, X86::ADC64rm, 0 }, |
| { X86::ADC8rr, X86::ADC8rm, 0 }, |
| { X86::ADCX32rr, X86::ADCX32rm, 0 }, |
| { X86::ADCX64rr, X86::ADCX64rm, 0 }, |
| { X86::ADD16rr, X86::ADD16rm, 0 }, |
| { X86::ADD32rr, X86::ADD32rm, 0 }, |
| { X86::ADD64rr, X86::ADD64rm, 0 }, |
| { X86::ADD8rr, X86::ADD8rm, 0 }, |
| { X86::ADDPDrr, X86::ADDPDrm, TB_ALIGN_16 }, |
| { X86::ADDPSrr, X86::ADDPSrm, TB_ALIGN_16 }, |
| { X86::ADDSDrr, X86::ADDSDrm, 0 }, |
| { X86::ADDSDrr_Int, X86::ADDSDrm_Int, TB_NO_REVERSE }, |
| { X86::ADDSSrr, X86::ADDSSrm, 0 }, |
| { X86::ADDSSrr_Int, X86::ADDSSrm_Int, TB_NO_REVERSE }, |
| { X86::ADDSUBPDrr, X86::ADDSUBPDrm, TB_ALIGN_16 }, |
| { X86::ADDSUBPSrr, X86::ADDSUBPSrm, TB_ALIGN_16 }, |
| { X86::ADOX32rr, X86::ADOX32rm, 0 }, |
| { X86::ADOX64rr, X86::ADOX64rm, 0 }, |
| { X86::AESDECLASTrr, X86::AESDECLASTrm, TB_ALIGN_16 }, |
| { X86::AESDECrr, X86::AESDECrm, TB_ALIGN_16 }, |
| { X86::AESENCLASTrr, X86::AESENCLASTrm, TB_ALIGN_16 }, |
| { X86::AESENCrr, X86::AESENCrm, TB_ALIGN_16 }, |
| { X86::AND16rr, X86::AND16rm, 0 }, |
| { X86::AND32rr, X86::AND32rm, 0 }, |
| { X86::AND64rr, X86::AND64rm, 0 }, |
| { X86::AND8rr, X86::AND8rm, 0 }, |
| { X86::ANDN32rr, X86::ANDN32rm, 0 }, |
| { X86::ANDN64rr, X86::ANDN64rm, 0 }, |
| { X86::ANDNPDrr, X86::ANDNPDrm, TB_ALIGN_16 }, |
| { X86::ANDNPSrr, X86::ANDNPSrm, TB_ALIGN_16 }, |
| { X86::ANDPDrr, X86::ANDPDrm, TB_ALIGN_16 }, |
| { X86::ANDPSrr, X86::ANDPSrm, TB_ALIGN_16 }, |
| { X86::BLENDPDrri, X86::BLENDPDrmi, TB_ALIGN_16 }, |
| { X86::BLENDPSrri, X86::BLENDPSrmi, TB_ALIGN_16 }, |
| { X86::BLENDVPDrr0, X86::BLENDVPDrm0, TB_ALIGN_16 }, |
| { X86::BLENDVPSrr0, X86::BLENDVPSrm0, TB_ALIGN_16 }, |
| { X86::CMOV16rr, X86::CMOV16rm, 0 }, |
| { X86::CMOV32rr, X86::CMOV32rm, 0 }, |
| { X86::CMOV64rr, X86::CMOV64rm, 0 }, |
| { X86::CMPPDrri, X86::CMPPDrmi, TB_ALIGN_16 }, |
| { X86::CMPPSrri, X86::CMPPSrmi, TB_ALIGN_16 }, |
| { X86::CMPSDrr, X86::CMPSDrm, 0 }, |
| { X86::CMPSDrr_Int, X86::CMPSDrm_Int, TB_NO_REVERSE }, |
| { X86::CMPSSrr, X86::CMPSSrm, 0 }, |
| { X86::CMPSSrr_Int, X86::CMPSSrm_Int, TB_NO_REVERSE }, |
| { X86::CRC32r32r16, X86::CRC32r32m16, 0 }, |
| { X86::CRC32r32r32, X86::CRC32r32m32, 0 }, |
| { X86::CRC32r32r8, X86::CRC32r32m8, 0 }, |
| { X86::CRC32r64r64, X86::CRC32r64m64, 0 }, |
| { X86::CRC32r64r8, X86::CRC32r64m8, 0 }, |
| { X86::CVTSD2SSrr_Int, X86::CVTSD2SSrm_Int, TB_NO_REVERSE }, |
| { X86::CVTSI2SDrr_Int, X86::CVTSI2SDrm_Int, 0 }, |
| { X86::CVTSI2SSrr_Int, X86::CVTSI2SSrm_Int, 0 }, |
| { X86::CVTSI642SDrr_Int, X86::CVTSI642SDrm_Int, 0 }, |
| { X86::CVTSI642SSrr_Int, X86::CVTSI642SSrm_Int, 0 }, |
| { X86::CVTSS2SDrr_Int, X86::CVTSS2SDrm_Int, TB_NO_REVERSE }, |
| { X86::DIVPDrr, X86::DIVPDrm, TB_ALIGN_16 }, |
| { X86::DIVPSrr, X86::DIVPSrm, TB_ALIGN_16 }, |
| { X86::DIVSDrr, X86::DIVSDrm, 0 }, |
| { X86::DIVSDrr_Int, X86::DIVSDrm_Int, TB_NO_REVERSE }, |
| { X86::DIVSSrr, X86::DIVSSrm, 0 }, |
| { X86::DIVSSrr_Int, X86::DIVSSrm_Int, TB_NO_REVERSE }, |
| { X86::DPPDrri, X86::DPPDrmi, TB_ALIGN_16 }, |
| { X86::DPPSrri, X86::DPPSrmi, TB_ALIGN_16 }, |
| { X86::GF2P8AFFINEINVQBrri, X86::GF2P8AFFINEINVQBrmi, TB_ALIGN_16 }, |
| { X86::GF2P8AFFINEQBrri, X86::GF2P8AFFINEQBrmi, TB_ALIGN_16 }, |
| { X86::GF2P8MULBrr, X86::GF2P8MULBrm, TB_ALIGN_16 }, |
| { X86::HADDPDrr, X86::HADDPDrm, TB_ALIGN_16 }, |
| { X86::HADDPSrr, X86::HADDPSrm, TB_ALIGN_16 }, |
| { X86::HSUBPDrr, X86::HSUBPDrm, TB_ALIGN_16 }, |
| { X86::HSUBPSrr, X86::HSUBPSrm, TB_ALIGN_16 }, |
| { X86::IMUL16rr, X86::IMUL16rm, 0 }, |
| { X86::IMUL32rr, X86::IMUL32rm, 0 }, |
| { X86::IMUL64rr, X86::IMUL64rm, 0 }, |
| { X86::MAXCPDrr, X86::MAXCPDrm, TB_ALIGN_16 }, |
| { X86::MAXCPSrr, X86::MAXCPSrm, TB_ALIGN_16 }, |
| { X86::MAXCSDrr, X86::MAXCSDrm, 0 }, |
| { X86::MAXCSSrr, X86::MAXCSSrm, 0 }, |
| { X86::MAXPDrr, X86::MAXPDrm, TB_ALIGN_16 }, |
| { X86::MAXPSrr, X86::MAXPSrm, TB_ALIGN_16 }, |
| { X86::MAXSDrr, X86::MAXSDrm, 0 }, |
| { X86::MAXSDrr_Int, X86::MAXSDrm_Int, TB_NO_REVERSE }, |
| { X86::MAXSSrr, X86::MAXSSrm, 0 }, |
| { X86::MAXSSrr_Int, X86::MAXSSrm_Int, TB_NO_REVERSE }, |
| { X86::MINCPDrr, X86::MINCPDrm, TB_ALIGN_16 }, |
| { X86::MINCPSrr, X86::MINCPSrm, TB_ALIGN_16 }, |
| { X86::MINCSDrr, X86::MINCSDrm, 0 }, |
| { X86::MINCSSrr, X86::MINCSSrm, 0 }, |
| { X86::MINPDrr, X86::MINPDrm, TB_ALIGN_16 }, |
| { X86::MINPSrr, X86::MINPSrm, TB_ALIGN_16 }, |
| { X86::MINSDrr, X86::MINSDrm, 0 }, |
| { X86::MINSDrr_Int, X86::MINSDrm_Int, TB_NO_REVERSE }, |
| { X86::MINSSrr, X86::MINSSrm, 0 }, |
| { X86::MINSSrr_Int, X86::MINSSrm_Int, TB_NO_REVERSE }, |
| { X86::MMX_CVTPI2PSirr, X86::MMX_CVTPI2PSirm, 0 }, |
| { X86::MMX_PACKSSDWirr, X86::MMX_PACKSSDWirm, 0 }, |
| { X86::MMX_PACKSSWBirr, X86::MMX_PACKSSWBirm, 0 }, |
| { X86::MMX_PACKUSWBirr, X86::MMX_PACKUSWBirm, 0 }, |
| { X86::MMX_PADDBirr, X86::MMX_PADDBirm, 0 }, |
| { X86::MMX_PADDDirr, X86::MMX_PADDDirm, 0 }, |
| { X86::MMX_PADDQirr, X86::MMX_PADDQirm, 0 }, |
| { X86::MMX_PADDSBirr, X86::MMX_PADDSBirm, 0 }, |
| { X86::MMX_PADDSWirr, X86::MMX_PADDSWirm, 0 }, |
| { X86::MMX_PADDUSBirr, X86::MMX_PADDUSBirm, 0 }, |
| { X86::MMX_PADDUSWirr, X86::MMX_PADDUSWirm, 0 }, |
| { X86::MMX_PADDWirr, X86::MMX_PADDWirm, 0 }, |
| { X86::MMX_PALIGNRrri, X86::MMX_PALIGNRrmi, 0 }, |
| { X86::MMX_PANDNirr, X86::MMX_PANDNirm, 0 }, |
| { X86::MMX_PANDirr, X86::MMX_PANDirm, 0 }, |
| { X86::MMX_PAVGBirr, X86::MMX_PAVGBirm, 0 }, |
| { X86::MMX_PAVGWirr, X86::MMX_PAVGWirm, 0 }, |
| { X86::MMX_PCMPEQBirr, X86::MMX_PCMPEQBirm, 0 }, |
| { X86::MMX_PCMPEQDirr, X86::MMX_PCMPEQDirm, 0 }, |
| { X86::MMX_PCMPEQWirr, X86::MMX_PCMPEQWirm, 0 }, |
| { X86::MMX_PCMPGTBirr, X86::MMX_PCMPGTBirm, 0 }, |
| { X86::MMX_PCMPGTDirr, X86::MMX_PCMPGTDirm, 0 }, |
| { X86::MMX_PCMPGTWirr, X86::MMX_PCMPGTWirm, 0 }, |
| { X86::MMX_PHADDDrr, X86::MMX_PHADDDrm, 0 }, |
| { X86::MMX_PHADDSWrr, X86::MMX_PHADDSWrm, 0 }, |
| { X86::MMX_PHADDWrr, X86::MMX_PHADDWrm, 0 }, |
| { X86::MMX_PHSUBDrr, X86::MMX_PHSUBDrm, 0 }, |
| { X86::MMX_PHSUBSWrr, X86::MMX_PHSUBSWrm, 0 }, |
| { X86::MMX_PHSUBWrr, X86::MMX_PHSUBWrm, 0 }, |
| { X86::MMX_PINSRWrr, X86::MMX_PINSRWrm, TB_NO_REVERSE }, |
| { X86::MMX_PMADDUBSWrr, X86::MMX_PMADDUBSWrm, 0 }, |
| { X86::MMX_PMADDWDirr, X86::MMX_PMADDWDirm, 0 }, |
| { X86::MMX_PMAXSWirr, X86::MMX_PMAXSWirm, 0 }, |
| { X86::MMX_PMAXUBirr, X86::MMX_PMAXUBirm, 0 }, |
| { X86::MMX_PMINSWirr, X86::MMX_PMINSWirm, 0 }, |
| { X86::MMX_PMINUBirr, X86::MMX_PMINUBirm, 0 }, |
| { X86::MMX_PMULHRSWrr, X86::MMX_PMULHRSWrm, 0 }, |
| { X86::MMX_PMULHUWirr, X86::MMX_PMULHUWirm, 0 }, |
| { X86::MMX_PMULHWirr, X86::MMX_PMULHWirm, 0 }, |
| { X86::MMX_PMULLWirr, X86::MMX_PMULLWirm, 0 }, |
| { X86::MMX_PMULUDQirr, X86::MMX_PMULUDQirm, 0 }, |
| { X86::MMX_PORirr, X86::MMX_PORirm, 0 }, |
| { X86::MMX_PSADBWirr, X86::MMX_PSADBWirm, 0 }, |
| { X86::MMX_PSHUFBrr, X86::MMX_PSHUFBrm, 0 }, |
| { X86::MMX_PSIGNBrr, X86::MMX_PSIGNBrm, 0 }, |
| { X86::MMX_PSIGNDrr, X86::MMX_PSIGNDrm, 0 }, |
| { X86::MMX_PSIGNWrr, X86::MMX_PSIGNWrm, 0 }, |
| { X86::MMX_PSLLDrr, X86::MMX_PSLLDrm, 0 }, |
| { X86::MMX_PSLLQrr, X86::MMX_PSLLQrm, 0 }, |
| { X86::MMX_PSLLWrr, X86::MMX_PSLLWrm, 0 }, |
| { X86::MMX_PSRADrr, X86::MMX_PSRADrm, 0 }, |
| { X86::MMX_PSRAWrr, X86::MMX_PSRAWrm, 0 }, |
| { X86::MMX_PSRLDrr, X86::MMX_PSRLDrm, 0 }, |
| { X86::MMX_PSRLQrr, X86::MMX_PSRLQrm, 0 }, |
| { X86::MMX_PSRLWrr, X86::MMX_PSRLWrm, 0 }, |
| { X86::MMX_PSUBBirr, X86::MMX_PSUBBirm, 0 }, |
| { X86::MMX_PSUBDirr, X86::MMX_PSUBDirm, 0 }, |
| { X86::MMX_PSUBQirr, X86::MMX_PSUBQirm, 0 }, |
| { X86::MMX_PSUBSBirr, X86::MMX_PSUBSBirm, 0 }, |
| { X86::MMX_PSUBSWirr, X86::MMX_PSUBSWirm, 0 }, |
| { X86::MMX_PSUBUSBirr, X86::MMX_PSUBUSBirm, 0 }, |
| { X86::MMX_PSUBUSWirr, X86::MMX_PSUBUSWirm, 0 }, |
| { X86::MMX_PSUBWirr, X86::MMX_PSUBWirm, 0 }, |
| { X86::MMX_PUNPCKHBWirr, X86::MMX_PUNPCKHBWirm, 0 }, |
| { X86::MMX_PUNPCKHDQirr, X86::MMX_PUNPCKHDQirm, 0 }, |
| { X86::MMX_PUNPCKHWDirr, X86::MMX_PUNPCKHWDirm, 0 }, |
| { X86::MMX_PUNPCKLBWirr, X86::MMX_PUNPCKLBWirm, TB_NO_REVERSE }, |
| { X86::MMX_PUNPCKLDQirr, X86::MMX_PUNPCKLDQirm, TB_NO_REVERSE }, |
| { X86::MMX_PUNPCKLWDirr, X86::MMX_PUNPCKLWDirm, TB_NO_REVERSE }, |
| { X86::MMX_PXORirr, X86::MMX_PXORirm, 0 }, |
| { X86::MOVLHPSrr, X86::MOVHPSrm, TB_NO_REVERSE }, |
| { X86::MOVSDrr, X86::MOVLPDrm, TB_NO_REVERSE }, |
| { X86::MPSADBWrri, X86::MPSADBWrmi, TB_ALIGN_16 }, |
| { X86::MULPDrr, X86::MULPDrm, TB_ALIGN_16 }, |
| { X86::MULPSrr, X86::MULPSrm, TB_ALIGN_16 }, |
| { X86::MULSDrr, X86::MULSDrm, 0 }, |
| { X86::MULSDrr_Int, X86::MULSDrm_Int, TB_NO_REVERSE }, |
| { X86::MULSSrr, X86::MULSSrm, 0 }, |
| { X86::MULSSrr_Int, X86::MULSSrm_Int, TB_NO_REVERSE }, |
| { X86::MULX32rr, X86::MULX32rm, 0 }, |
| { X86::MULX64rr, X86::MULX64rm, 0 }, |
| { X86::OR16rr, X86::OR16rm, 0 }, |
| { X86::OR32rr, X86::OR32rm, 0 }, |
| { X86::OR64rr, X86::OR64rm, 0 }, |
| { X86::OR8rr, X86::OR8rm, 0 }, |
| { X86::ORPDrr, X86::ORPDrm, TB_ALIGN_16 }, |
| { X86::ORPSrr, X86::ORPSrm, TB_ALIGN_16 }, |
| { X86::PACKSSDWrr, X86::PACKSSDWrm, TB_ALIGN_16 }, |
| { X86::PACKSSWBrr, X86::PACKSSWBrm, TB_ALIGN_16 }, |
| { X86::PACKUSDWrr, X86::PACKUSDWrm, TB_ALIGN_16 }, |
| { X86::PACKUSWBrr, X86::PACKUSWBrm, TB_ALIGN_16 }, |
| { X86::PADDBrr, X86::PADDBrm, TB_ALIGN_16 }, |
| { X86::PADDDrr, X86::PADDDrm, TB_ALIGN_16 }, |
| { X86::PADDQrr, X86::PADDQrm, TB_ALIGN_16 }, |
| { X86::PADDSBrr, X86::PADDSBrm, TB_ALIGN_16 }, |
| { X86::PADDSWrr, X86::PADDSWrm, TB_ALIGN_16 }, |
| { X86::PADDUSBrr, X86::PADDUSBrm, TB_ALIGN_16 }, |
| { X86::PADDUSWrr, X86::PADDUSWrm, TB_ALIGN_16 }, |
| { X86::PADDWrr, X86::PADDWrm, TB_ALIGN_16 }, |
| { X86::PALIGNRrri, X86::PALIGNRrmi, TB_ALIGN_16 }, |
| { X86::PANDNrr, X86::PANDNrm, TB_ALIGN_16 }, |
| { X86::PANDrr, X86::PANDrm, TB_ALIGN_16 }, |
| { X86::PAVGBrr, X86::PAVGBrm, TB_ALIGN_16 }, |
| { X86::PAVGUSBrr, X86::PAVGUSBrm, 0 }, |
| { X86::PAVGWrr, X86::PAVGWrm, TB_ALIGN_16 }, |
| { X86::PBLENDVBrr0, X86::PBLENDVBrm0, TB_ALIGN_16 }, |
| { X86::PBLENDWrri, X86::PBLENDWrmi, TB_ALIGN_16 }, |
| { X86::PCLMULQDQrr, X86::PCLMULQDQrm, TB_ALIGN_16 }, |
| { X86::PCMPEQBrr, X86::PCMPEQBrm, TB_ALIGN_16 }, |
| { X86::PCMPEQDrr, X86::PCMPEQDrm, TB_ALIGN_16 }, |
| { X86::PCMPEQQrr, X86::PCMPEQQrm, TB_ALIGN_16 }, |
| { X86::PCMPEQWrr, X86::PCMPEQWrm, TB_ALIGN_16 }, |
| { X86::PCMPGTBrr, X86::PCMPGTBrm, TB_ALIGN_16 }, |
| { X86::PCMPGTDrr, X86::PCMPGTDrm, TB_ALIGN_16 }, |
| { X86::PCMPGTQrr, X86::PCMPGTQrm, TB_ALIGN_16 }, |
| { X86::PCMPGTWrr, X86::PCMPGTWrm, TB_ALIGN_16 }, |
| { X86::PDEP32rr, X86::PDEP32rm, 0 }, |
| { X86::PDEP64rr, X86::PDEP64rm, 0 }, |
| { X86::PEXT32rr, X86::PEXT32rm, 0 }, |
| { X86::PEXT64rr, X86::PEXT64rm, 0 }, |
| { X86::PFACCrr, X86::PFACCrm, 0 }, |
| { X86::PFADDrr, X86::PFADDrm, 0 }, |
| { X86::PFCMPEQrr, X86::PFCMPEQrm, 0 }, |
| { X86::PFCMPGErr, X86::PFCMPGErm, 0 }, |
| { X86::PFCMPGTrr, X86::PFCMPGTrm, 0 }, |
| { X86::PFMAXrr, X86::PFMAXrm, 0 }, |
| { X86::PFMINrr, X86::PFMINrm, 0 }, |
| { X86::PFMULrr, X86::PFMULrm, 0 }, |
| { X86::PFNACCrr, X86::PFNACCrm, 0 }, |
| { X86::PFPNACCrr, X86::PFPNACCrm, 0 }, |
| { X86::PFRCPIT1rr, X86::PFRCPIT1rm, 0 }, |
| { X86::PFRCPIT2rr, X86::PFRCPIT2rm, 0 }, |
| { X86::PFRSQIT1rr, X86::PFRSQIT1rm, 0 }, |
| { X86::PFSUBRrr, X86::PFSUBRrm, 0 }, |
| { X86::PFSUBrr, X86::PFSUBrm, 0 }, |
| { X86::PHADDDrr, X86::PHADDDrm, TB_ALIGN_16 }, |
| { X86::PHADDSWrr, X86::PHADDSWrm, TB_ALIGN_16 }, |
| { X86::PHADDWrr, X86::PHADDWrm, TB_ALIGN_16 }, |
| { X86::PHSUBDrr, X86::PHSUBDrm, TB_ALIGN_16 }, |
| { X86::PHSUBSWrr, X86::PHSUBSWrm, TB_ALIGN_16 }, |
| { X86::PHSUBWrr, X86::PHSUBWrm, TB_ALIGN_16 }, |
| { X86::PINSRBrr, X86::PINSRBrm, TB_NO_REVERSE }, |
| { X86::PINSRDrr, X86::PINSRDrm, 0 }, |
| { X86::PINSRQrr, X86::PINSRQrm, 0 }, |
| { X86::PINSRWrr, X86::PINSRWrm, TB_NO_REVERSE }, |
| { X86::PMADDUBSWrr, X86::PMADDUBSWrm, TB_ALIGN_16 }, |
| { X86::PMADDWDrr, X86::PMADDWDrm, TB_ALIGN_16 }, |
| { X86::PMAXSBrr, X86::PMAXSBrm, TB_ALIGN_16 }, |
| { X86::PMAXSDrr, X86::PMAXSDrm, TB_ALIGN_16 }, |
| { X86::PMAXSWrr, X86::PMAXSWrm, TB_ALIGN_16 }, |
| { X86::PMAXUBrr, X86::PMAXUBrm, TB_ALIGN_16 }, |
| { X86::PMAXUDrr, X86::PMAXUDrm, TB_ALIGN_16 }, |
| { X86::PMAXUWrr, X86::PMAXUWrm, TB_ALIGN_16 }, |
| { X86::PMINSBrr, X86::PMINSBrm, TB_ALIGN_16 }, |
| { X86::PMINSDrr, X86::PMINSDrm, TB_ALIGN_16 }, |
| { X86::PMINSWrr, X86::PMINSWrm, TB_ALIGN_16 }, |
| { X86::PMINUBrr, X86::PMINUBrm, TB_ALIGN_16 }, |
| { X86::PMINUDrr, X86::PMINUDrm, TB_ALIGN_16 }, |
| { X86::PMINUWrr, X86::PMINUWrm, TB_ALIGN_16 }, |
| { X86::PMULDQrr, X86::PMULDQrm, TB_ALIGN_16 }, |
| { X86::PMULHRSWrr, X86::PMULHRSWrm, TB_ALIGN_16 }, |
| { X86::PMULHRWrr, X86::PMULHRWrm, 0 }, |
| { X86::PMULHUWrr, X86::PMULHUWrm, TB_ALIGN_16 }, |
| { X86::PMULHWrr, X86::PMULHWrm, TB_ALIGN_16 }, |
| { X86::PMULLDrr, X86::PMULLDrm, TB_ALIGN_16 }, |
| { X86::PMULLWrr, X86::PMULLWrm, TB_ALIGN_16 }, |
| { X86::PMULUDQrr, X86::PMULUDQrm, TB_ALIGN_16 }, |
| { X86::PORrr, X86::PORrm, TB_ALIGN_16 }, |
| { X86::PSADBWrr, X86::PSADBWrm, TB_ALIGN_16 }, |
| { X86::PSHUFBrr, X86::PSHUFBrm, TB_ALIGN_16 }, |
| { X86::PSIGNBrr, X86::PSIGNBrm, TB_ALIGN_16 }, |
| { X86::PSIGNDrr, X86::PSIGNDrm, TB_ALIGN_16 }, |
| { X86::PSIGNWrr, X86::PSIGNWrm, TB_ALIGN_16 }, |
| { X86::PSLLDrr, X86::PSLLDrm, TB_ALIGN_16 }, |
| { X86::PSLLQrr, X86::PSLLQrm, TB_ALIGN_16 }, |
| { X86::PSLLWrr, X86::PSLLWrm, TB_ALIGN_16 }, |
| { X86::PSRADrr, X86::PSRADrm, TB_ALIGN_16 }, |
| { X86::PSRAWrr, X86::PSRAWrm, TB_ALIGN_16 }, |
| { X86::PSRLDrr, X86::PSRLDrm, TB_ALIGN_16 }, |
| { X86::PSRLQrr, X86::PSRLQrm, TB_ALIGN_16 }, |
| { X86::PSRLWrr, X86::PSRLWrm, TB_ALIGN_16 }, |
| { X86::PSUBBrr, X86::PSUBBrm, TB_ALIGN_16 }, |
| { X86::PSUBDrr, X86::PSUBDrm, TB_ALIGN_16 }, |
| { X86::PSUBQrr, X86::PSUBQrm, TB_ALIGN_16 }, |
| { X86::PSUBSBrr, X86::PSUBSBrm, TB_ALIGN_16 }, |
| { X86::PSUBSWrr, X86::PSUBSWrm, TB_ALIGN_16 }, |
| { X86::PSUBUSBrr, X86::PSUBUSBrm, TB_ALIGN_16 }, |
| { X86::PSUBUSWrr, X86::PSUBUSWrm, TB_ALIGN_16 }, |
| { X86::PSUBWrr, X86::PSUBWrm, TB_ALIGN_16 }, |
| { X86::PUNPCKHBWrr, X86::PUNPCKHBWrm, TB_ALIGN_16 }, |
| { X86::PUNPCKHDQrr, X86::PUNPCKHDQrm, TB_ALIGN_16 }, |
| { X86::PUNPCKHQDQrr, X86::PUNPCKHQDQrm, TB_ALIGN_16 }, |
| { X86::PUNPCKHWDrr, X86::PUNPCKHWDrm, TB_ALIGN_16 }, |
| { X86::PUNPCKLBWrr, X86::PUNPCKLBWrm, TB_ALIGN_16 }, |
| { X86::PUNPCKLDQrr, X86::PUNPCKLDQrm, TB_ALIGN_16 }, |
| { X86::PUNPCKLQDQrr, X86::PUNPCKLQDQrm, TB_ALIGN_16 }, |
| { X86::PUNPCKLWDrr, X86::PUNPCKLWDrm, TB_ALIGN_16 }, |
| { X86::PXORrr, X86::PXORrm, TB_ALIGN_16 }, |
| { X86::RCPSSr_Int, X86::RCPSSm_Int, TB_NO_REVERSE }, |
| { X86::ROUNDSDr_Int, X86::ROUNDSDm_Int, TB_NO_REVERSE }, |
| { X86::ROUNDSSr_Int, X86::ROUNDSSm_Int, TB_NO_REVERSE }, |
| { X86::RSQRTSSr_Int, X86::RSQRTSSm_Int, TB_NO_REVERSE }, |
| { X86::SBB16rr, X86::SBB16rm, 0 }, |
| { X86::SBB32rr, X86::SBB32rm, 0 }, |
| { X86::SBB64rr, X86::SBB64rm, 0 }, |
| { X86::SBB8rr, X86::SBB8rm, 0 }, |
| { X86::SHA1MSG1rr, X86::SHA1MSG1rm, TB_ALIGN_16 }, |
| { X86::SHA1MSG2rr, X86::SHA1MSG2rm, TB_ALIGN_16 }, |
| { X86::SHA1NEXTErr, X86::SHA1NEXTErm, TB_ALIGN_16 }, |
| { X86::SHA1RNDS4rri, X86::SHA1RNDS4rmi, TB_ALIGN_16 }, |
| { X86::SHA256MSG1rr, X86::SHA256MSG1rm, TB_ALIGN_16 }, |
| { X86::SHA256MSG2rr, X86::SHA256MSG2rm, TB_ALIGN_16 }, |
| { X86::SHA256RNDS2rr, X86::SHA256RNDS2rm, TB_ALIGN_16 }, |
| { X86::SHUFPDrri, X86::SHUFPDrmi, TB_ALIGN_16 }, |
| { X86::SHUFPSrri, X86::SHUFPSrmi, TB_ALIGN_16 }, |
| { X86::SQRTSDr_Int, X86::SQRTSDm_Int, TB_NO_REVERSE }, |
| { X86::SQRTSSr_Int, X86::SQRTSSm_Int, TB_NO_REVERSE }, |
| { X86::SUB16rr, X86::SUB16rm, 0 }, |
| { X86::SUB32rr, X86::SUB32rm, 0 }, |
| { X86::SUB64rr, X86::SUB64rm, 0 }, |
| { X86::SUB8rr, X86::SUB8rm, 0 }, |
| { X86::SUBPDrr, X86::SUBPDrm, TB_ALIGN_16 }, |
| { X86::SUBPSrr, X86::SUBPSrm, TB_ALIGN_16 }, |
| { X86::SUBSDrr, X86::SUBSDrm, 0 }, |
| { X86::SUBSDrr_Int, X86::SUBSDrm_Int, TB_NO_REVERSE }, |
| { X86::SUBSSrr, X86::SUBSSrm, 0 }, |
| { X86::SUBSSrr_Int, X86::SUBSSrm_Int, TB_NO_REVERSE }, |
| { X86::UNPCKHPDrr, X86::UNPCKHPDrm, TB_ALIGN_16 }, |
| { X86::UNPCKHPSrr, X86::UNPCKHPSrm, TB_ALIGN_16 }, |
| { X86::UNPCKLPDrr, X86::UNPCKLPDrm, TB_ALIGN_16 }, |
| { X86::UNPCKLPSrr, X86::UNPCKLPSrm, TB_ALIGN_16 }, |
| { X86::VADDPDYrr, X86::VADDPDYrm, 0 }, |
| { X86::VADDPDZ128rr, X86::VADDPDZ128rm, 0 }, |
| { X86::VADDPDZ256rr, X86::VADDPDZ256rm, 0 }, |
| { X86::VADDPDZrr, X86::VADDPDZrm, 0 }, |
| { X86::VADDPDrr, X86::VADDPDrm, 0 }, |
| { X86::VADDPSYrr, X86::VADDPSYrm, 0 }, |
| { X86::VADDPSZ128rr, X86::VADDPSZ128rm, 0 }, |
| { X86::VADDPSZ256rr, X86::VADDPSZ256rm, 0 }, |
| { X86::VADDPSZrr, X86::VADDPSZrm, 0 }, |
| { X86::VADDPSrr, X86::VADDPSrm, 0 }, |
| { X86::VADDSDZrr, X86::VADDSDZrm, 0 }, |
| { X86::VADDSDZrr_Int, X86::VADDSDZrm_Int, TB_NO_REVERSE }, |
| { X86::VADDSDrr, X86::VADDSDrm, 0 }, |
| { X86::VADDSDrr_Int, X86::VADDSDrm_Int, TB_NO_REVERSE }, |
| { X86::VADDSSZrr, X86::VADDSSZrm, 0 }, |
| { X86::VADDSSZrr_Int, X86::VADDSSZrm_Int, TB_NO_REVERSE }, |
| { X86::VADDSSrr, X86::VADDSSrm, 0 }, |
| { X86::VADDSSrr_Int, X86::VADDSSrm_Int, TB_NO_REVERSE }, |
| { X86::VADDSUBPDYrr, X86::VADDSUBPDYrm, 0 }, |
| { X86::VADDSUBPDrr, X86::VADDSUBPDrm, 0 }, |
| { X86::VADDSUBPSYrr, X86::VADDSUBPSYrm, 0 }, |
| { X86::VADDSUBPSrr, X86::VADDSUBPSrm, 0 }, |
| { X86::VAESDECLASTYrr, X86::VAESDECLASTYrm, 0 }, |
| { X86::VAESDECLASTZ128rr, X86::VAESDECLASTZ128rm, 0 }, |
| { X86::VAESDECLASTZ256rr, X86::VAESDECLASTZ256rm, 0 }, |
| { X86::VAESDECLASTZrr, X86::VAESDECLASTZrm, 0 }, |
| { X86::VAESDECLASTrr, X86::VAESDECLASTrm, 0 }, |
| { X86::VAESDECYrr, X86::VAESDECYrm, 0 }, |
| { X86::VAESDECZ128rr, X86::VAESDECZ128rm, 0 }, |
| { X86::VAESDECZ256rr, X86::VAESDECZ256rm, 0 }, |
| { X86::VAESDECZrr, X86::VAESDECZrm, 0 }, |
| { X86::VAESDECrr, X86::VAESDECrm, 0 }, |
| { X86::VAESENCLASTYrr, X86::VAESENCLASTYrm, 0 }, |
| { X86::VAESENCLASTZ128rr, X86::VAESENCLASTZ128rm, 0 }, |
| { X86::VAESENCLASTZ256rr, X86::VAESENCLASTZ256rm, 0 }, |
| { X86::VAESENCLASTZrr, X86::VAESENCLASTZrm, 0 }, |
| { X86::VAESENCLASTrr, X86::VAESENCLASTrm, 0 }, |
| { X86::VAESENCYrr, X86::VAESENCYrm, 0 }, |
| { X86::VAESENCZ128rr, X86::VAESENCZ128rm, 0 }, |
| { X86::VAESENCZ256rr, X86::VAESENCZ256rm, 0 }, |
| { X86::VAESENCZrr, X86::VAESENCZrm, 0 }, |
| { X86::VAESENCrr, X86::VAESENCrm, 0 }, |
| { X86::VALIGNDZ128rri, X86::VALIGNDZ128rmi, 0 }, |
| { X86::VALIGNDZ256rri, X86::VALIGNDZ256rmi, 0 }, |
| { X86::VALIGNDZrri, X86::VALIGNDZrmi, 0 }, |
| { X86::VALIGNQZ128rri, X86::VALIGNQZ128rmi, 0 }, |
| { X86::VALIGNQZ256rri, X86::VALIGNQZ256rmi, 0 }, |
| { X86::VALIGNQZrri, X86::VALIGNQZrmi, 0 }, |
| { X86::VANDNPDYrr, X86::VANDNPDYrm, 0 }, |
| { X86::VANDNPDZ128rr, X86::VANDNPDZ128rm, 0 }, |
| { X86::VANDNPDZ256rr, X86::VANDNPDZ256rm, 0 }, |
| { X86::VANDNPDZrr, X86::VANDNPDZrm, 0 }, |
| { X86::VANDNPDrr, X86::VANDNPDrm, 0 }, |
| { X86::VANDNPSYrr, X86::VANDNPSYrm, 0 }, |
| { X86::VANDNPSZ128rr, X86::VANDNPSZ128rm, 0 }, |
| { X86::VANDNPSZ256rr, X86::VANDNPSZ256rm, 0 }, |
| { X86::VANDNPSZrr, X86::VANDNPSZrm, 0 }, |
| { X86::VANDNPSrr, X86::VANDNPSrm, 0 }, |
| { X86::VANDPDYrr, X86::VANDPDYrm, 0 }, |
| { X86::VANDPDZ128rr, X86::VANDPDZ128rm, 0 }, |
| { X86::VANDPDZ256rr, X86::VANDPDZ256rm, 0 }, |
| { X86::VANDPDZrr, X86::VANDPDZrm, 0 }, |
| { X86::VANDPDrr, X86::VANDPDrm, 0 }, |
| { X86::VANDPSYrr, X86::VANDPSYrm, 0 }, |
| { X86::VANDPSZ128rr, X86::VANDPSZ128rm, 0 }, |
| { X86::VANDPSZ256rr, X86::VANDPSZ256rm, 0 }, |
| { X86::VANDPSZrr, X86::VANDPSZrm, 0 }, |
| { X86::VANDPSrr, X86::VANDPSrm, 0 }, |
| { X86::VBLENDMPDZ128rr, X86::VBLENDMPDZ128rm, 0 }, |
| { X86::VBLENDMPDZ256rr, X86::VBLENDMPDZ256rm, 0 }, |
| { X86::VBLENDMPDZrr, X86::VBLENDMPDZrm, 0 }, |
| { X86::VBLENDMPSZ128rr, X86::VBLENDMPSZ128rm, 0 }, |
| { X86::VBLENDMPSZ256rr, X86::VBLENDMPSZ256rm, 0 }, |
| { X86::VBLENDMPSZrr, X86::VBLENDMPSZrm, 0 }, |
| { X86::VBLENDPDYrri, X86::VBLENDPDYrmi, 0 }, |
| { X86::VBLENDPDrri, X86::VBLENDPDrmi, 0 }, |
| { X86::VBLENDPSYrri, X86::VBLENDPSYrmi, 0 }, |
| { X86::VBLENDPSrri, X86::VBLENDPSrmi, 0 }, |
| { X86::VBLENDVPDYrr, X86::VBLENDVPDYrm, 0 }, |
| { X86::VBLENDVPDrr, X86::VBLENDVPDrm, 0 }, |
| { X86::VBLENDVPSYrr, X86::VBLENDVPSYrm, 0 }, |
| { X86::VBLENDVPSrr, X86::VBLENDVPSrm, 0 }, |
| { X86::VBROADCASTF32X2Z256rkz, X86::VBROADCASTF32X2Z256mkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTF32X2Zrkz, X86::VBROADCASTF32X2Zmkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTI32X2Z128rkz, X86::VBROADCASTI32X2Z128mkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTI32X2Z256rkz, X86::VBROADCASTI32X2Z256mkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTI32X2Zrkz, X86::VBROADCASTI32X2Zmkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTSDZ256rkz, X86::VBROADCASTSDZ256mkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTSDZrkz, X86::VBROADCASTSDZmkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSZ128rkz, X86::VBROADCASTSSZ128mkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSZ256rkz, X86::VBROADCASTSSZ256mkz, TB_NO_REVERSE }, |
| { X86::VBROADCASTSSZrkz, X86::VBROADCASTSSZmkz, TB_NO_REVERSE }, |
| { X86::VCMPPDYrri, X86::VCMPPDYrmi, 0 }, |
| { X86::VCMPPDZ128rri, X86::VCMPPDZ128rmi, 0 }, |
| { X86::VCMPPDZ256rri, X86::VCMPPDZ256rmi, 0 }, |
| { X86::VCMPPDZrri, X86::VCMPPDZrmi, 0 }, |
| { X86::VCMPPDrri, X86::VCMPPDrmi, 0 }, |
| { X86::VCMPPSYrri, X86::VCMPPSYrmi, 0 }, |
| { X86::VCMPPSZ128rri, X86::VCMPPSZ128rmi, 0 }, |
| { X86::VCMPPSZ256rri, X86::VCMPPSZ256rmi, 0 }, |
| { X86::VCMPPSZrri, X86::VCMPPSZrmi, 0 }, |
| { X86::VCMPPSrri, X86::VCMPPSrmi, 0 }, |
| { X86::VCMPSDZrr, X86::VCMPSDZrm, 0 }, |
| { X86::VCMPSDZrr_Int, X86::VCMPSDZrm_Int, TB_NO_REVERSE }, |
| { X86::VCMPSDrr, X86::VCMPSDrm, 0 }, |
| { X86::VCMPSDrr_Int, X86::VCMPSDrm_Int, TB_NO_REVERSE }, |
| { X86::VCMPSSZrr, X86::VCMPSSZrm, 0 }, |
| { X86::VCMPSSZrr_Int, X86::VCMPSSZrm_Int, TB_NO_REVERSE }, |
| { X86::VCMPSSrr, X86::VCMPSSrm, 0 }, |
| { X86::VCMPSSrr_Int, X86::VCMPSSrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTDQ2PDZ128rrkz, X86::VCVTDQ2PDZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTDQ2PDZ256rrkz, X86::VCVTDQ2PDZ256rmkz, 0 }, |
| { X86::VCVTDQ2PDZrrkz, X86::VCVTDQ2PDZrmkz, 0 }, |
| { X86::VCVTDQ2PSZ128rrkz, X86::VCVTDQ2PSZ128rmkz, 0 }, |
| { X86::VCVTDQ2PSZ256rrkz, X86::VCVTDQ2PSZ256rmkz, 0 }, |
| { X86::VCVTDQ2PSZrrkz, X86::VCVTDQ2PSZrmkz, 0 }, |
| { X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rm, 0 }, |
| { X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rm, 0 }, |
| { X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrm, 0 }, |
| { X86::VCVTNEPS2BF16Z128rrkz, X86::VCVTNEPS2BF16Z128rmkz, 0 }, |
| { X86::VCVTNEPS2BF16Z256rrkz, X86::VCVTNEPS2BF16Z256rmkz, 0 }, |
| { X86::VCVTNEPS2BF16Zrrkz, X86::VCVTNEPS2BF16Zrmkz, 0 }, |
| { X86::VCVTPD2DQZ128rrkz, X86::VCVTPD2DQZ128rmkz, 0 }, |
| { X86::VCVTPD2DQZ256rrkz, X86::VCVTPD2DQZ256rmkz, 0 }, |
| { X86::VCVTPD2DQZrrkz, X86::VCVTPD2DQZrmkz, 0 }, |
| { X86::VCVTPD2PSZ128rrkz, X86::VCVTPD2PSZ128rmkz, 0 }, |
| { X86::VCVTPD2PSZ256rrkz, X86::VCVTPD2PSZ256rmkz, 0 }, |
| { X86::VCVTPD2PSZrrkz, X86::VCVTPD2PSZrmkz, 0 }, |
| { X86::VCVTPD2QQZ128rrkz, X86::VCVTPD2QQZ128rmkz, 0 }, |
| { X86::VCVTPD2QQZ256rrkz, X86::VCVTPD2QQZ256rmkz, 0 }, |
| { X86::VCVTPD2QQZrrkz, X86::VCVTPD2QQZrmkz, 0 }, |
| { X86::VCVTPD2UDQZ128rrkz, X86::VCVTPD2UDQZ128rmkz, 0 }, |
| { X86::VCVTPD2UDQZ256rrkz, X86::VCVTPD2UDQZ256rmkz, 0 }, |
| { X86::VCVTPD2UDQZrrkz, X86::VCVTPD2UDQZrmkz, 0 }, |
| { X86::VCVTPD2UQQZ128rrkz, X86::VCVTPD2UQQZ128rmkz, 0 }, |
| { X86::VCVTPD2UQQZ256rrkz, X86::VCVTPD2UQQZ256rmkz, 0 }, |
| { X86::VCVTPD2UQQZrrkz, X86::VCVTPD2UQQZrmkz, 0 }, |
| { X86::VCVTPH2PSZ128rrkz, X86::VCVTPH2PSZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTPH2PSZ256rrkz, X86::VCVTPH2PSZ256rmkz, 0 }, |
| { X86::VCVTPH2PSZrrkz, X86::VCVTPH2PSZrmkz, 0 }, |
| { X86::VCVTPS2DQZ128rrkz, X86::VCVTPS2DQZ128rmkz, 0 }, |
| { X86::VCVTPS2DQZ256rrkz, X86::VCVTPS2DQZ256rmkz, 0 }, |
| { X86::VCVTPS2DQZrrkz, X86::VCVTPS2DQZrmkz, 0 }, |
| { X86::VCVTPS2PDZ128rrkz, X86::VCVTPS2PDZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTPS2PDZ256rrkz, X86::VCVTPS2PDZ256rmkz, 0 }, |
| { X86::VCVTPS2PDZrrkz, X86::VCVTPS2PDZrmkz, 0 }, |
| { X86::VCVTPS2QQZ128rrkz, X86::VCVTPS2QQZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTPS2QQZ256rrkz, X86::VCVTPS2QQZ256rmkz, 0 }, |
| { X86::VCVTPS2QQZrrkz, X86::VCVTPS2QQZrmkz, 0 }, |
| { X86::VCVTPS2UDQZ128rrkz, X86::VCVTPS2UDQZ128rmkz, 0 }, |
| { X86::VCVTPS2UDQZ256rrkz, X86::VCVTPS2UDQZ256rmkz, 0 }, |
| { X86::VCVTPS2UDQZrrkz, X86::VCVTPS2UDQZrmkz, 0 }, |
| { X86::VCVTPS2UQQZ128rrkz, X86::VCVTPS2UQQZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTPS2UQQZ256rrkz, X86::VCVTPS2UQQZ256rmkz, 0 }, |
| { X86::VCVTPS2UQQZrrkz, X86::VCVTPS2UQQZrmkz, 0 }, |
| { X86::VCVTQQ2PDZ128rrkz, X86::VCVTQQ2PDZ128rmkz, 0 }, |
| { X86::VCVTQQ2PDZ256rrkz, X86::VCVTQQ2PDZ256rmkz, 0 }, |
| { X86::VCVTQQ2PDZrrkz, X86::VCVTQQ2PDZrmkz, 0 }, |
| { X86::VCVTQQ2PSZ128rrkz, X86::VCVTQQ2PSZ128rmkz, 0 }, |
| { X86::VCVTQQ2PSZ256rrkz, X86::VCVTQQ2PSZ256rmkz, 0 }, |
| { X86::VCVTQQ2PSZrrkz, X86::VCVTQQ2PSZrmkz, 0 }, |
| { X86::VCVTSD2SSZrr, X86::VCVTSD2SSZrm, 0 }, |
| { X86::VCVTSD2SSZrr_Int, X86::VCVTSD2SSZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSD2SSrr, X86::VCVTSD2SSrm, 0 }, |
| { X86::VCVTSD2SSrr_Int, X86::VCVTSD2SSrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSI2SDZrr, X86::VCVTSI2SDZrm, 0 }, |
| { X86::VCVTSI2SDZrr_Int, X86::VCVTSI2SDZrm_Int, 0 }, |
| { X86::VCVTSI2SDrr, X86::VCVTSI2SDrm, 0 }, |
| { X86::VCVTSI2SDrr_Int, X86::VCVTSI2SDrm_Int, 0 }, |
| { X86::VCVTSI2SSZrr, X86::VCVTSI2SSZrm, 0 }, |
| { X86::VCVTSI2SSZrr_Int, X86::VCVTSI2SSZrm_Int, 0 }, |
| { X86::VCVTSI2SSrr, X86::VCVTSI2SSrm, 0 }, |
| { X86::VCVTSI2SSrr_Int, X86::VCVTSI2SSrm_Int, 0 }, |
| { X86::VCVTSI642SDZrr, X86::VCVTSI642SDZrm, 0 }, |
| { X86::VCVTSI642SDZrr_Int, X86::VCVTSI642SDZrm_Int, 0 }, |
| { X86::VCVTSI642SDrr, X86::VCVTSI642SDrm, 0 }, |
| { X86::VCVTSI642SDrr_Int, X86::VCVTSI642SDrm_Int, 0 }, |
| { X86::VCVTSI642SSZrr, X86::VCVTSI642SSZrm, 0 }, |
| { X86::VCVTSI642SSZrr_Int, X86::VCVTSI642SSZrm_Int, 0 }, |
| { X86::VCVTSI642SSrr, X86::VCVTSI642SSrm, 0 }, |
| { X86::VCVTSI642SSrr_Int, X86::VCVTSI642SSrm_Int, 0 }, |
| { X86::VCVTSS2SDZrr, X86::VCVTSS2SDZrm, 0 }, |
| { X86::VCVTSS2SDZrr_Int, X86::VCVTSS2SDZrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTSS2SDrr, X86::VCVTSS2SDrm, 0 }, |
| { X86::VCVTSS2SDrr_Int, X86::VCVTSS2SDrm_Int, TB_NO_REVERSE }, |
| { X86::VCVTTPD2DQZ128rrkz, X86::VCVTTPD2DQZ128rmkz, 0 }, |
| { X86::VCVTTPD2DQZ256rrkz, X86::VCVTTPD2DQZ256rmkz, 0 }, |
| { X86::VCVTTPD2DQZrrkz, X86::VCVTTPD2DQZrmkz, 0 }, |
| { X86::VCVTTPD2QQZ128rrkz, X86::VCVTTPD2QQZ128rmkz, 0 }, |
| { X86::VCVTTPD2QQZ256rrkz, X86::VCVTTPD2QQZ256rmkz, 0 }, |
| { X86::VCVTTPD2QQZrrkz, X86::VCVTTPD2QQZrmkz, 0 }, |
| { X86::VCVTTPD2UDQZ128rrkz, X86::VCVTTPD2UDQZ128rmkz, 0 }, |
| { X86::VCVTTPD2UDQZ256rrkz, X86::VCVTTPD2UDQZ256rmkz, 0 }, |
| { X86::VCVTTPD2UDQZrrkz, X86::VCVTTPD2UDQZrmkz, 0 }, |
| { X86::VCVTTPD2UQQZ128rrkz, X86::VCVTTPD2UQQZ128rmkz, 0 }, |
| { X86::VCVTTPD2UQQZ256rrkz, X86::VCVTTPD2UQQZ256rmkz, 0 }, |
| { X86::VCVTTPD2UQQZrrkz, X86::VCVTTPD2UQQZrmkz, 0 }, |
| { X86::VCVTTPS2DQZ128rrkz, X86::VCVTTPS2DQZ128rmkz, 0 }, |
| { X86::VCVTTPS2DQZ256rrkz, X86::VCVTTPS2DQZ256rmkz, 0 }, |
| { X86::VCVTTPS2DQZrrkz, X86::VCVTTPS2DQZrmkz, 0 }, |
| { X86::VCVTTPS2QQZ128rrkz, X86::VCVTTPS2QQZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTTPS2QQZ256rrkz, X86::VCVTTPS2QQZ256rmkz, 0 }, |
| { X86::VCVTTPS2QQZrrkz, X86::VCVTTPS2QQZrmkz, 0 }, |
| { X86::VCVTTPS2UDQZ128rrkz, X86::VCVTTPS2UDQZ128rmkz, 0 }, |
| { X86::VCVTTPS2UDQZ256rrkz, X86::VCVTTPS2UDQZ256rmkz, 0 }, |
| { X86::VCVTTPS2UDQZrrkz, X86::VCVTTPS2UDQZrmkz, 0 }, |
| { X86::VCVTTPS2UQQZ128rrkz, X86::VCVTTPS2UQQZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTTPS2UQQZ256rrkz, X86::VCVTTPS2UQQZ256rmkz, 0 }, |
| { X86::VCVTTPS2UQQZrrkz, X86::VCVTTPS2UQQZrmkz, 0 }, |
| { X86::VCVTUDQ2PDZ128rrkz, X86::VCVTUDQ2PDZ128rmkz, TB_NO_REVERSE }, |
| { X86::VCVTUDQ2PDZ256rrkz, X86::VCVTUDQ2PDZ256rmkz, 0 }, |
| { X86::VCVTUDQ2PDZrrkz, X86::VCVTUDQ2PDZrmkz, 0 }, |
| { X86::VCVTUDQ2PSZ128rrkz, X86::VCVTUDQ2PSZ128rmkz, 0 }, |
| { X86::VCVTUDQ2PSZ256rrkz, X86::VCVTUDQ2PSZ256rmkz, 0 }, |
| { X86::VCVTUDQ2PSZrrkz, X86::VCVTUDQ2PSZrmkz, 0 }, |
| { X86::VCVTUQQ2PDZ128rrkz, X86::VCVTUQQ2PDZ128rmkz, 0 }, |
| { X86::VCVTUQQ2PDZ256rrkz, X86::VCVTUQQ2PDZ256rmkz, 0 }, |
| { X86::VCVTUQQ2PDZrrkz, X86::VCVTUQQ2PDZrmkz, 0 }, |
| { X86::VCVTUQQ2PSZ128rrkz, X86::VCVTUQQ2PSZ128rmkz, 0 }, |
| { X86::VCVTUQQ2PSZ256rrkz, X86::VCVTUQQ2PSZ256rmkz, 0 }, |
| { X86::VCVTUQQ2PSZrrkz, X86::VCVTUQQ2PSZrmkz, 0 }, |
| { X86::VCVTUSI2SDZrr, X86::VCVTUSI2SDZrm, 0 }, |
| { X86::VCVTUSI2SDZrr_Int, X86::VCVTUSI2SDZrm_Int, 0 }, |
| { X86::VCVTUSI2SSZrr, X86::VCVTUSI2SSZrm, 0 }, |
| { X86::VCVTUSI2SSZrr_Int, X86::VCVTUSI2SSZrm_Int, 0 }, |
| { X86::VCVTUSI642SDZrr, X86::VCVTUSI642SDZrm, 0 }, |
| { X86::VCVTUSI642SDZrr_Int, X86::VCVTUSI642SDZrm_Int, 0 }, |
| { X86::VCVTUSI642SSZrr, X86::VCVTUSI642SSZrm, 0 }, |
| { X86::VCVTUSI642SSZrr_Int, X86::VCVTUSI642SSZrm_Int, 0 }, |
| { X86::VDBPSADBWZ128rri, X86::VDBPSADBWZ128rmi, 0 }, |
| { X86::VDBPSADBWZ256rri, X86::VDBPSADBWZ256rmi, 0 }, |
| { X86::VDBPSADBWZrri, X86::VDBPSADBWZrmi, 0 }, |
| { X86::VDIVPDYrr, X86::VDIVPDYrm, 0 }, |
| { X86::VDIVPDZ128rr, X86::VDIVPDZ128rm, 0 }, |
| { X86::VDIVPDZ256rr, X86::VDIVPDZ256rm, 0 }, |
| { X86::VDIVPDZrr, X86::VDIVPDZrm, 0 }, |
| { X86::VDIVPDrr, X86::VDIVPDrm, 0 }, |
| { X86::VDIVPSYrr, X86::VDIVPSYrm, 0 }, |
| { X86::VDIVPSZ128rr, X86::VDIVPSZ128rm, 0 }, |
| { X86::VDIVPSZ256rr, X86::VDIVPSZ256rm, 0 }, |
| { X86::VDIVPSZrr, X86::VDIVPSZrm, 0 }, |
| { X86::VDIVPSrr, X86::VDIVPSrm, 0 }, |
| { X86::VDIVSDZrr, X86::VDIVSDZrm, 0 }, |
| { X86::VDIVSDZrr_Int, X86::VDIVSDZrm_Int, TB_NO_REVERSE }, |
| { X86::VDIVSDrr, X86::VDIVSDrm, 0 }, |
| { X86::VDIVSDrr_Int, X86::VDIVSDrm_Int, TB_NO_REVERSE }, |
| { X86::VDIVSSZrr, X86::VDIVSSZrm, 0 }, |
| { X86::VDIVSSZrr_Int, X86::VDIVSSZrm_Int, TB_NO_REVERSE }, |
| { X86::VDIVSSrr, X86::VDIVSSrm, 0 }, |
| { X86::VDIVSSrr_Int, X86::VDIVSSrm_Int, TB_NO_REVERSE }, |
| { X86::VDPPDrri, X86::VDPPDrmi, 0 }, |
| { X86::VDPPSYrri, X86::VDPPSYrmi, 0 }, |
| { X86::VDPPSrri, X86::VDPPSrmi, 0 }, |
| { X86::VEXP2PDZrkz, X86::VEXP2PDZmkz, 0 }, |
| { X86::VEXP2PSZrkz, X86::VEXP2PSZmkz, 0 }, |
| { X86::VEXPANDPDZ128rrkz, X86::VEXPANDPDZ128rmkz, TB_NO_REVERSE }, |
| { X86::VEXPANDPDZ256rrkz, X86::VEXPANDPDZ256rmkz, TB_NO_REVERSE }, |
| { X86::VEXPANDPDZrrkz, X86::VEXPANDPDZrmkz, TB_NO_REVERSE }, |
| { X86::VEXPANDPSZ128rrkz, X86::VEXPANDPSZ128rmkz, TB_NO_REVERSE }, |
| { X86::VEXPANDPSZ256rrkz, X86::VEXPANDPSZ256rmkz, TB_NO_REVERSE }, |
| { X86::VEXPANDPSZrrkz, X86::VEXPANDPSZrmkz, TB_NO_REVERSE }, |
| { X86::VFMADDPD4Yrr, X86::VFMADDPD4Ymr, 0 }, |
| { X86::VFMADDPD4rr, X86::VFMADDPD4mr, 0 }, |
| { X86::VFMADDPS4Yrr, X86::VFMADDPS4Ymr, 0 }, |
| { X86::VFMADDPS4rr, X86::VFMADDPS4mr, 0 }, |
| { X86::VFMADDSD4rr, X86::VFMADDSD4mr, 0 }, |
| { X86::VFMADDSD4rr_Int, X86::VFMADDSD4mr_Int, TB_NO_REVERSE }, |
| { X86::VFMADDSS4rr, X86::VFMADDSS4mr, 0 }, |
| { X86::VFMADDSS4rr_Int, X86::VFMADDSS4mr_Int, TB_NO_REVERSE }, |
| { X86::VFMADDSUBPD4Yrr, X86::VFMADDSUBPD4Ymr, 0 }, |
| { X86::VFMADDSUBPD4rr, X86::VFMADDSUBPD4mr, 0 }, |
| { X86::VFMADDSUBPS4Yrr, X86::VFMADDSUBPS4Ymr, 0 }, |
| { X86::VFMADDSUBPS4rr, X86::VFMADDSUBPS4mr, 0 }, |
| { X86::VFMSUBADDPD4Yrr, X86::VFMSUBADDPD4Ymr, 0 }, |
| { X86::VFMSUBADDPD4rr, X86::VFMSUBADDPD4mr, 0 }, |
| { X86::VFMSUBADDPS4Yrr, X86::VFMSUBADDPS4Ymr, 0
|
