commit ff64ebce03520a872f457a1d8b8263923fe1b2b5
author Peter Collingbourne <peter@pcc.me.uk> Wed Feb 13 21:03:23 2019 +0000
committer Peter Collingbourne <peter@pcc.me.uk> Wed Feb 13 21:03:23 2019 +0000
tree d73a4504a36c2e716eba8cf97b813dfe6c0bc900
parent 5a03a071de7cfde255fe8bb40aaffcef02c600c2

gn build: Merge r353957.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353980 91177308-0d34-0410-b5e6-96231b3b80d8

utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn

diff --git a/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn b/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
index 3edcb90..2a3fa89 100644
--- a/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
+++ b/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
@@ -1,5 +1,11 @@
 import("//llvm/utils/TableGen/tablegen.gni")
 
+tablegen("AArch64GenAsmMatcher") {
+  visibility = [ ":LLVMAArch64CodeGen" ]
+  args = [ "-gen-asm-matcher" ]
+  td_file = "AArch64.td"
+}
+
 tablegen("AArch64GenCallingConv") {
   visibility = [ ":LLVMAArch64CodeGen" ]
   args = [ "-gen-callingconv" ]
@@ -38,6 +44,7 @@
 
 static_library("LLVMAArch64CodeGen") {
   deps = [
+    ":AArch64GenAsmMatcher",
     ":AArch64GenCallingConv",
     ":AArch64GenDAGISel",
     ":AArch64GenFastISel",